JP3455191B2 - Semiconductor device and light emitting diode lamp - Google Patents
Semiconductor device and light emitting diode lampInfo
- Publication number
- JP3455191B2 JP3455191B2 JP2001111219A JP2001111219A JP3455191B2 JP 3455191 B2 JP3455191 B2 JP 3455191B2 JP 2001111219 A JP2001111219 A JP 2001111219A JP 2001111219 A JP2001111219 A JP 2001111219A JP 3455191 B2 JP3455191 B2 JP 3455191B2
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- semiconductor
- chip
- semiconductor device
- semiconductor chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/71—Means for bonding not being attached to, or not being formed on, the surface to be connected
- H01L24/72—Detachable connecting means consisting of mechanical auxiliary parts connecting the device, e.g. pressure contacts using springs or clips
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Led Device Packages (AREA)
- Led Devices (AREA)
Description
【０００１】[0001]
【発明の属する技術分野】本発明は半導体素子及び発光
ダイオードランプに関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a light emitting diode lamp.
【０００２】[0002]
【従来の技術】従来、半導体チップを樹脂封止する半導
体素子において、リードフレームに半導体チップを装着
する（ダイスボンド）には、銀粉末を含有したエポキシ
樹脂の導電性接着剤やエポキシ樹脂の絶縁性透明接着剤
を使用している。2. Description of the Related Art Conventionally, in a semiconductor element in which a semiconductor chip is resin-sealed, a semiconductor chip is mounted on a lead frame (dice bond) by a conductive adhesive of an epoxy resin containing silver powder or insulation of the epoxy resin. Transparent adhesive is used.
【０００３】[0003]
【発明が解決しようとする課題】このダイスボンド工程
の後に、給電用のワイヤを半導体チップに接続するワイ
ヤボンド工程があるが、半導体チップの電極とワイヤと
を溶着させて接続強度を保つためには、温度を上げる必
要がある。After the die bonding step, there is a wire bonding step for connecting the power feeding wire to the semiconductor chip. In order to maintain the connection strength by welding the electrode of the semiconductor chip and the wire. Need to raise the temperature.
【０００４】しかしながら、温度が高すぎると接着剤中
のエポキシ樹脂が熱劣化してリードフレームと半導体チ
ップとの接着強度が低下し、透明接着剤を使用した発光
ダイオードの場合は、更にエポキシ樹脂の黄変によって
光出力が低下するという問題があった。However, if the temperature is too high, the epoxy resin in the adhesive is thermally deteriorated and the adhesive strength between the lead frame and the semiconductor chip is reduced. There was a problem that the light output was reduced due to yellowing.
【０００５】[0005]
【課題を解決するための手段】上記課題を解決するた
め、本発明はリードフレームに透孔を形成し、透孔内に
半導体チップを配置し、透孔の周縁部をかしめることに
より半導体チップを固定するようにしたものである。In order to solve the above problems, the present invention provides a semiconductor chip by forming a through hole in a lead frame, arranging a semiconductor chip in the through hole, and caulking a peripheral portion of the through hole. Is fixed.
【０００６】[0006]
【発明の実施の形態】図１は本発明のかしめによる半導
体チップの固定を説明する斜視図である。DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a perspective view illustrating fixing of a semiconductor chip by caulking according to the present invention.
【０００７】半導体チップ１を搭載するリードフレーム
２に、半導体チップ１が収容できる大きさの貫通した穴
である透孔３を形成する。The lead frame 2 on which the semiconductor chip 1 is mounted is formed with a through hole 3 which is a through hole having a size capable of accommodating the semiconductor chip 1.
【０００８】透孔３内に半導体チップ１を図示してない
治具により配置し、半導体チップ１の４つの側面に対
し、透孔３の周縁部をかしめる。このかしめ４によって
突出した周縁部の突出部５が半導体チップ１の側面に接
触して半導体チップ１を固定する。The semiconductor chip 1 is arranged in the through hole 3 by a jig (not shown), and the peripheral edges of the through hole 3 are caulked to the four side surfaces of the semiconductor chip 1. The protruding portion 5 at the peripheral portion protruding by the caulking 4 contacts the side surface of the semiconductor chip 1 to fix the semiconductor chip 1.
【０００９】次に半導体チップ１の電極６，７に、例え
ば金ボール８を使用して金線９をワイヤボンディング
し、リードフレーム２にもワイヤボンディングする。Next, a gold wire 9 is wire-bonded to the electrodes 6 and 7 of the semiconductor chip 1 using, for example, a gold ball 8 and also to the lead frame 2.
【００１０】上記したように、本発明は半導体チップ１
をかしめ４により固定して、接着剤を使用しないので、
接着剤に起因するリードフレーム２と半導体チップ１と
の熱劣化や紫外線による接着強度の低下が解消され、発
光ダイオードの場合に光出力が低下することもなくな
る。As described above, the present invention provides the semiconductor chip 1
Since it is fixed by caulking 4 and no adhesive is used,
The heat deterioration between the lead frame 2 and the semiconductor chip 1 due to the adhesive agent and the decrease in the adhesion strength due to the ultraviolet rays are eliminated, and the light output in the case of the light emitting diode is not decreased.
【００１１】また、半導体チップ１としては硬い基板を
使用したチップが適当で、可視光及び紫外光のＬＥＤチ
ップ、レーザチップ等に適用でき、特にサファイア基板
上に成長させたＧａＮ（窒化ガリウム）を使用した場合
には、ＧａＮは上面発光だけでなく、裏面発光による光
量が多いので、薄い透光性のサファイア基板及び透孔３
を通して裏面に光が多く放射される。As the semiconductor chip 1, a chip using a hard substrate is suitable, and it can be applied to visible light and ultraviolet light LED chips, laser chips, etc., and particularly GaN (gallium nitride) grown on a sapphire substrate is used. When used, GaN emits a large amount of light not only from the top surface but also from the back surface.
A lot of light is emitted to the back surface through.
【００１２】この裏面に放射される光を反射鏡によって
上方に反射させれば、ＬＥＤチップの上面及び裏面発光
の光を有効に取り出すことができる。By reflecting the light emitted to the back surface upward by the reflecting mirror, the light emitted from the top surface and the back surface of the LED chip can be effectively extracted.
【００１３】なお、サファイア基板は硬いので、サファ
イア基板を有する半導体チップ、ＬＥＤチップが特にか
しめ４による固定に適している。Since the sapphire substrate is hard, the semiconductor chip and the LED chip having the sapphire substrate are particularly suitable for fixing by the caulking 4.
【００１４】図２は本発明の第１の実施形態を示す断面
図で、ＬＥＤチップをリードフレームにかしめにより固
定して樹脂封止した発光ダイオードランプを示してい
る。FIG. 2 is a sectional view showing a first embodiment of the present invention, showing a light emitting diode lamp in which an LED chip is fixed to a lead frame by caulking and resin-sealed.
【００１５】ＬＥＤチップ１１はリードフレーム１２に
形成された透孔１３内に配置され、かしめ１４によりリ
ードフレーム１２に固定されている。The LED chip 11 is arranged in a through hole 13 formed in the lead frame 12 and fixed to the lead frame 12 by caulking 14.
【００１６】また、ＬＥＤチップ１１とリードフレーム
１２は例えば金線１５によりワイヤボンディングされて
電気的に接続されている。The LED chip 11 and the lead frame 12 are electrically connected to each other by wire bonding with a gold wire 15, for example.
【００１７】ＬＥＤチップ１１を含めた全体は透光性樹
脂１６例えばエポキシ樹脂によりモールドされ、透光性
樹脂１６の凸状の底面に凹面の反射鏡１７が形成されて
いる。The whole including the LED chip 11 is molded with a transparent resin 16 such as an epoxy resin, and a concave reflecting mirror 17 is formed on the convex bottom surface of the transparent resin 16.
【００１８】この反射鏡１７は従来と同様に金属蒸着や
メッキにより形成される。The reflecting mirror 17 is formed by metal vapor deposition or plating as in the conventional case.
【００１９】このように構成すると、ＬＥＤチップ１１
の上面発光した光だけでなく、裏面発光した光を反射鏡
１７により反射させて有効に利用することができる。With this configuration, the LED chip 11
Not only the light emitted from the top surface but also the light emitted from the back surface can be reflected by the reflecting mirror 17 and can be effectively used.
【００２０】従来の場合には、ＬＥＤチップの裏面がリ
ードフレームに接着されているので、裏面発光した光を
十分に利用することは困難であるが、第１の実施形態で
は透孔１３内にＬＥＤチップ１１をかしめ１４により固
定しているので、裏面発光した光を有効に取り出すこと
ができる。In the conventional case, since the back surface of the LED chip is bonded to the lead frame, it is difficult to fully utilize the light emitted from the back surface. However, in the first embodiment, the light is emitted in the through hole 13. Since the LED chip 11 is fixed by caulking 14, the light emitted from the back surface can be effectively extracted.
【００２１】図３は本発明の第２の実施形態を示す斜視
図、図４は第２の実施形態の断面図である。FIG. 3 is a perspective view showing a second embodiment of the present invention, and FIG. 4 is a sectional view of the second embodiment.
【００２２】第１の実施形態とは反射鏡の構成が異なっ
ており、反射鏡はＬＥＤチップを搭載したリードフレー
ムとは異なるリードフレームと一体に形成されている。The structure of the reflecting mirror is different from that of the first embodiment, and the reflecting mirror is integrally formed with a lead frame different from the lead frame on which the LED chip is mounted.
【００２３】図３及び図４において、ＬＥＤチップ２１
はリードフレーム２２に形成された透孔２３内に配置さ
れ、かしめ２４によりリードフレーム２２に固定されて
いる。In FIG. 3 and FIG. 4, the LED chip 21
Are arranged in through holes 23 formed in the lead frame 22 and fixed to the lead frame 22 by caulking 24.
【００２４】また、ＬＥＤチップ２１とリードフレーム
２２は金線２５によりワイヤボンディングされて電気的
に接続されている。The LED chip 21 and the lead frame 22 are wire-bonded with a gold wire 25 to be electrically connected.
【００２５】ＬＥＤチップ２１を含めた全体は透光性樹
脂２６によって封止されている。The entire body including the LED chip 21 is sealed with a transparent resin 26.
【００２６】凹面に形成された反射鏡２７はＬＥＤチッ
プ２１を搭載したリードフレーム２２とは異なる別のリ
ードフレーム２８と一体に形成され、ＬＥＤチップ２１
の裏面発光した光を反射して有効に取り出すように構成
されている。The reflecting mirror 27 formed on the concave surface is integrally formed with another lead frame 28 different from the lead frame 22 on which the LED chip 21 is mounted.
Is configured to reflect the light emitted from the back surface of the device and effectively extract the light.
【００２７】このリードフレーム２８はＣｕやＣｕ合金
あるいはＦｅ等を主材料に形成されるが、ＣｕやＣｕ合
金は加工し易く、Ｆｅは安価であるという特徴がある。
ＣｕやＣｕ合金の場合はＮｉ，Ａｇの２層メッキをし、
Ｆｅの場合はＣｕ，Ｎｉ，Ａｇの３層メッキをして表面
をＡｇにすると光の反射効果が高くなる。The lead frame 28 is formed of Cu, a Cu alloy, Fe, or the like as a main material. The Cu and Cu alloys are easy to process and Fe is inexpensive.
In the case of Cu or Cu alloy, Ni, Ag two-layer plating,
In the case of Fe, if the three layers of Cu, Ni and Ag are plated and the surface is made Ag, the light reflection effect is enhanced.
【００２８】反射鏡２７及びリードフレーム２８は、例
えばＣｕ板を打ち抜き、押し出し加工をして凹面を形成
し、打ち抜いたリードを曲げ加工して形成すれば良い。The reflecting mirror 27 and the lead frame 28 may be formed, for example, by punching out a Cu plate, extruding to form a concave surface, and bending the punched lead.
【００２９】なお、リードフレーム２８はリードフレー
ム２２と共に４本足を構成するので、一方に傾くことも
なく安定するが、リードフレーム２８は必ずしも２本で
ある必要はない。Since the lead frame 28 constitutes four legs together with the lead frame 22, it is stable without tilting to one side, but the lead frame 28 does not necessarily have to be two.
【００３０】図２に示した第１の実施形態のように、従
来と同じ凹面の反射鏡１７の場合には、透光性樹脂１６
に金属を蒸着やメッキをして形成しているので、接着強
度が弱く、剥がれ等の変形により表示ムラや発光出力の
低下が生じるが、第２の実施形態では反射鏡２７をリー
ドフレーム２８と一体に形成したので、このような問題
は解決される。As in the case of the first embodiment shown in FIG. 2, in the case of the reflecting mirror 17 having the same concave surface as the conventional one, the transparent resin 16 is used.
Since the metal is formed by vapor deposition or plating, the adhesive strength is weak and the display unevenness and the emission output are reduced due to deformation such as peeling. Since it is integrally formed, such a problem is solved.
【００３１】以上のように、第２の実施形態によれば、
第１の実施形態の効果に加えて、反射鏡２７をリードフ
レーム２８と一体に形成したことにより、弱い接着強度
に基づく表示ムラや発光出力の低下を解消させることが
できる。As described above, according to the second embodiment,
In addition to the effect of the first embodiment, by forming the reflecting mirror 27 integrally with the lead frame 28, it is possible to eliminate display unevenness and reduction in light emission output due to weak adhesive strength.
【００３２】[0032]
【発明の効果】上記したように、本発明によれば、半導
体チップをかしめによりリードフレームに固定するの
で、接着剤の熱劣化による接着強度の低下が解消され、
また、発光ダイオードの場合における光出力の低下を防
止することができる。As described above, according to the present invention, since the semiconductor chip is fixed to the lead frame by caulking, the decrease in the adhesive strength due to the heat deterioration of the adhesive is eliminated.
Further, it is possible to prevent a decrease in light output in the case of a light emitting diode.
【図１】本発明のかしめによる固定を説明する斜視図。FIG. 1 is a perspective view illustrating fixing by caulking according to the present invention.
【図２】本発明の第１の実施形態を示す断面図。FIG. 2 is a cross-sectional view showing the first embodiment of the present invention.
【図３】本発明の第２の実施形態を示す斜視図。FIG. 3 is a perspective view showing a second embodiment of the present invention.
【図４】第２の実施形態の断面図。FIG. 4 is a cross-sectional view of the second embodiment.
１ 半導体チップ １１，２１ ＬＥＤチップ ２，１２，２２，２８ リードフレーム ３，１３，２３ 透孔 ４，１４，２４ かしめ １７，２７ 反射鏡 1 semiconductor chip 11,21 LED chip 2,12,22,28 Lead frame 3,13,23 through hole 4,14,24 Caulking 17,27 Reflector
Claims (5)
において、 リードフレームに透孔を形成し、前記透孔内に前記半導
体チップを配置し、前記透孔の周縁部をかしめることに
より前記半導体チップを固定することを特徴とする半導
体素子。1. A semiconductor element for sealing a semiconductor chip with a resin, wherein a through hole is formed in a lead frame, the semiconductor chip is arranged in the through hole, and the peripheral portion of the through hole is caulked to form the semiconductor. A semiconductor device characterized by fixing a chip.
ことを特徴とする請求項１記載の半導体素子。2. The semiconductor device according to claim 1, wherein the semiconductor chip is an LED chip.
成長させたＧａＮであることを特徴とする請求項２記載
の半導体素子。3. The semiconductor device according to claim 2, wherein the LED chip is GaN grown on a sapphire substrate.
記半導体素子の裏面側に配置され、前記半導体素子の裏
面側から放射する光を上面側に反射する反射鏡とを備え
たことを特徴とする発光ダイオードランプ。4. The semiconductor device according to claim 2 or 3, and a reflecting mirror that is arranged on the back surface side of the semiconductor element and that reflects light emitted from the back surface side of the semiconductor element to the upper surface side. Characteristic light emitting diode lamp.
したリードフレームと異なるリードフレームと一体に形
成された凹面反射鏡であることを特徴とする請求項４記
載の発光ダイオードランプ。5. The light emitting diode lamp according to claim 4, wherein the reflector is a concave reflector integrally formed with a lead frame different from the lead frame on which the LED chip is mounted.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001111219A JP3455191B2 (en) | 2001-04-10 | 2001-04-10 | Semiconductor device and light emitting diode lamp |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001111219A JP3455191B2 (en) | 2001-04-10 | 2001-04-10 | Semiconductor device and light emitting diode lamp |
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| Publication Number | Publication Date |
|---|---|
| JP2002314144A JP2002314144A (en) | 2002-10-25 |
| JP3455191B2 true JP3455191B2 (en) | 2003-10-14 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001111219A Expired - Fee Related JP3455191B2 (en) | 2001-04-10 | 2001-04-10 | Semiconductor device and light emitting diode lamp |
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| JP5528900B2 (en) | 2010-04-30 | 2014-06-25 | ローム株式会社 | Light emitting element module |
| JP5819469B2 (en) * | 2014-04-16 | 2015-11-24 | ローム株式会社 | Light emitting element module |
| KR101901055B1 (en) * | 2017-03-31 | 2018-09-20 | 주식회사 현대케피코 | Non-contact type inhibitor switch |
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| JP2002314144A (en) | 2002-10-25 |
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