CN205645865U - Semiconductor luminescence chip - Google Patents
Semiconductor luminescence chip Download PDFInfo
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- CN205645865U CN205645865U CN201620318116.4U CN201620318116U CN205645865U CN 205645865 U CN205645865 U CN 205645865U CN 201620318116 U CN201620318116 U CN 201620318116U CN 205645865 U CN205645865 U CN 205645865U
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Abstract
The utility model provides a semiconductor luminescence chip, including the substrate, having - include at least the semiconductor stromatolite of n type conducting layer, luminescent layer and p type conducting layer at the substrate first surface, semiconductor stromatolite surface has the n type electrode groove position of one exposed some n type conducting layer at least, semiconductor luminescence chip's the part or whole surface and side naked, utensil electric conductivity are wrapped up by an at least insulating layer, the insulating layer surface is equipped with a naked at least p type electrode and an at least n type electrode, P type electrode and n type electrode run through the insulating layer to be connected with p type conducting layer and n type conducting layer are electrically conductive respectively, the position department of exposing at the p type electrode on insulating layer surface is equipped with p type weld pad, the position department of exposing at the n type electrode on insulating layer surface is equipped with n type weld pad, an at least p type weld pad and/or an at least n type weld pad extend formation face down bonding pad to semiconductor luminescence chip's outside side surface. The utility model discloses the welding is convenient, the welding adhesivity is good, and the resistance thermal resistance is low, low in manufacturing cost.
Description
Technical field
This utility model relates to a kind of semiconductor luminous chip, is applicable to the half of Reflow Soldering further to a kind of
Conductor luminescence chip.
Background technology
Lifting and the decline of manufacturing cost, semiconductor luminous chip along with semiconductor luminous chip luminous efficiency
It is widely used in backlight, shown and the field such as illumination.
In existing semiconductor luminous chip, N-shaped weld pad, p-type weld pad are arranged on semiconductor laminated surface
On, the most semiconductor laminated surface needs certain surface area for the setting of weld pad.Along with quasiconductor is sent out
Constantly reducing of optical chip size, leaves N-shaped weld pad therein, p-type weld pad, Metal Substrate heat conduction weld pad for
Surface area is more and more less, does not only result in Reflow Soldering welding difficulty, also causes welding contact area the least, thrust
Deficiency, the problems such as resistance heat resistive is big, the semiconductor luminous chip manufacturing the big current type of small size is existed
The defect of essence.
It addition, along with the expansion of LED application scenario, some occasions need two-sided go out light semiconductor light emitting core
Sheet, the weld pad of traditional chip generally requires the surface taking chip, and cannot realize two-sided go out light
Requirement, limit the application scenario of chip.
Utility model content
The technical problems to be solved in the utility model is, it is provided that a kind of convenient welding, welding cohesiveness
Good, resistance thermal resistance is low, the semiconductor luminous chip of low cost of manufacture.
This utility model solves its technical problem and be the technical scheme is that a kind of semiconductor light emitting of offer
Chip, including having the substrate of first surface and second surface, has at least at described substrate first surface
Semiconductor laminated, on described semiconductor laminated surface including N-shaped conductive layer, luminescent layer and p-type electric-conducting layer
An at least n-type electrode groove position exposing partially n-type conductive layer；The part of described semiconductor luminous chip
Or the most exposed, to have electric conductivity surface and side wrapped up by least one insulating barrier；
Described surface of insulating layer is provided with at least one exposed p-type electrode and at least one n-type electrode；Described p
Between type electrode and n-type electrode insulated from each other, and run through described insulating barrier respectively with described p-type electric-conducting layer and n
Type conductive layer is conductively connected；
The exposed position at the described p-type electrode of described surface of insulating layer is provided with and described p-type electrodes conduct
Connect and be close to the p-type weld pad of described surface of insulating layer；The exposed described n at described surface of insulating layer
The position of type electrode is provided with and is conductively connected and is close to the n of described surface of insulating layer with described n-type electrode
Type weld pad；
Described in p-type weld pad and/or at least described at least, N-shaped weld pad is to the outside of semiconductor luminous chip
Side surface extends, and the part or all of side surface outside described semiconductor luminous chip forms corresponding side
Weld pad.
Preferably, it is provided with p-type current extending between described p-type electric-conducting layer surface and described insulating barrier；Institute
State p-type electrode to be conductively connected with described p-type current extending；And/or,
It is provided with N-shaped current extending between described bottom surface, n-type electrode groove position and described insulating barrier；Described n
Type electrode is conductively connected with described N-shaped current extending.
Preferably, described p-type current extending includes that p-type electric-conducting extension layer, p-type reflecting layer, p-type connect
One or more in contact layer；
Described N-shaped current extending includes in N-shaped conductive extension layer, N-shaped reflecting layer, n-contact layer
One or more.
Preferably, described p-type current extending includes that p-type reflecting layer, described N-shaped current extending include
N-shaped reflecting layer, described semiconductor luminous chip is front and/or side goes out light；Or, described p-type electricity
Stream extension layer includes p-type electric-conducting extension layer and/or P type contact layer；Described N-shaped current extending includes
N-shaped conductive extension layer and/or n-contact layer, described semiconductor luminous chip be front, the back side and/or
Side goes out light.
Preferably, it is provided with between described n-type electrode and described p-type electrode and is at least close to described insulating barrier
The Metal Substrate heat conduction weld pad on surface, between described Metal Substrate heat conduction weld pad and described n-type electrode and p-type electrode
Insulated from each other.
Preferably, it is provided with between described N-shaped weld pad and p-type weld pad and is at least close to described surface of insulating layer
Metal Substrate heat conduction weld pad, between described Metal Substrate heat conduction weld pad and described N-shaped weld pad and p-type weld pad each other
Insulation.
Preferably, this semiconductor luminous chip surrounding has an indent；Described indent is positioned at described semiconductor laminated
Side, the bottom surface of described indent is positioned at described substrate first surface or described substrate, described indent side
Wrapped up by insulating barrier described at least with bottom surface.
Preferably, described insulating barrier is part or all of containing a reflection layer；Described reflection layer is positioned at institute
State the centre of insulating barrier or be positioned at the exposed surface of described insulating barrier.
Preferably, described substrate is light-transmissive substrates；Described substrate first surface and/or second surface are smooth
Smooth surface or patterned surface；Described patterned surface includes taper rough surface, convex-concave surface, gold
One or more in the tower-like surface of word.
Preferably, described side of substrate and/or described semiconductor laminated side are and described substrate first surface
Vertical or the smooth flat of oblique, smooth surface, structuring plane or structuring curved surface；Described structure
Change one or more included in concavo-convex, sawtooth.
Preferably, described n-type electrode groove position includes step and/or through hole.
Semiconductor luminous chip of the present utility model, weld pad prolongs to the outside side surface of semiconductor luminous chip
Stretching formation side weld pad, simple in construction, convenient welding, welding cohesiveness are good, and resistance thermal resistance is low, manufacturing cost
Low, it is adaptable to manufacture the semiconductor luminous chip of the big current type of small size.
Further, by the setting of side weld pad, weld pad can be greatly reduced and take the area in chip light-emitting face,
So that chip have two-sided go out light feasibility, expanded the application scenario of chip.
Accompanying drawing explanation
Below in conjunction with drawings and Examples, the utility model is described in further detail, in accompanying drawing:
Fig. 1 is the structural representation of the semiconductor luminous chip of this utility model first embodiment；
Fig. 2 is the structural representation of the semiconductor luminous chip of this utility model the second embodiment.
Detailed description of the invention
As it is shown in figure 1, the semiconductor luminous chip of this utility model first embodiment, including substrate 10,
Semiconductor laminated 11, at least one n-type electrode 12, at least p-type electrode 13, at least N-shaped weld pad 14
And at least one p-type weld pad 15.Wherein, substrate 10 has first surface and second surface；Quasiconductor is folded
Layer 11 is arranged on the first surface, and it includes folding N-shaped conductive layer 111, the luminescent layer 112 and p set successively
Type conductive layer 113.The surface the most exposed, that there is electric conductivity of this semiconductor luminous chip and
Side is wrapped up by least one insulating barrier 16.
At least one exposed surface at insulating barrier 16 of p-type electrode 13；At least one n-type electrode 12 exposed
The surface of insulating barrier 16.Between p-type electrode 13 and n-type electrode 12 insulated from each other, and run through insulating barrier 16
It is conductively connected with p-type electric-conducting layer 113 and N-shaped conductive layer 111 respectively.N-type electrode 12 and p-type electrode
13 preferably adjacent to semiconductor luminous chip outside arrange.
P-type weld pad 15 is arranged on the position of the exposed p-type electrode 13 on insulating barrier 16 surface and is close to
On insulating barrier 16 surface, and it is conductively connected with p-type electrode 13；N-shaped weld pad 14 is arranged on exposed absolutely
The position of the n-type electrode 12 on edge layer 16 surface is also close to insulating barrier 16 surface, and with N-shaped electricity
Pole 12 is conductively connected.Between p-type weld pad 15 and N-shaped weld pad 14 insulated from each other.
At least one p-type weld pad 15 and/or at least one N-shaped weld pad 14 are to the side, outside of semiconductor luminous chip
Surface extends, and the part or all of side surface outside semiconductor luminous chip forms corresponding side weld pad.
The convenient welding of the formation of side weld pad, welding cohesiveness is good, and resistance thermal resistance is low, low cost of manufacture, it is adaptable to system
Make the semiconductor luminous chip of the big current type of small size.Additionally, by the setting of side weld pad, can significantly subtract
Little weld pad takies the area in chip light-emitting face, for need two-sided go out light semiconductor luminous chip for, should
The setting of side weld pad does not affect the luminescence on two sides.So that chip have two-sided go out light feasibility, expand
The application scenario of chip.
Specifically, in the present embodiment, semiconductor laminated 11 are arranged on the first surface of substrate 10, and
The second surface of substrate 10 can be as light output surface, and semiconductor laminated 11 light produced pass through second surface
Send.Substrate 10 is preferably Sapphire Substrate.It should be understood that substrate 10 can also use other materials
The light-transmissive substrates made.
The first surface of this substrate 10 and/or second surface are smooth finished surfaces or patterned surface；Knot
Structure surface includes one or more in taper rough surface, convex-concave surface, pyramid shape surface.
The side of this substrate 10, semiconductor laminated 11 sides are vertical with the first surface of substrate 10 or oblique
Smooth flat, smooth surface, structuring plane or the structuring curved surface handed over；Structuring include concavo-convex,
One or more in sawtooth.
An at least n-type electrode groove position exposing partially n-type conductive layer 111, semiconductor laminated 11 surfaces
110.N-type electrode 12 is positioned in this n-type electrode groove position 110, to be conductively connected with N-shaped conductive layer 111.
N-type electrode groove position 110 includes step and/or through hole.The bottom surface of n-type electrode groove position 110 is used for making
N-type electrode 12 and/or N-shaped current extending, this bottom surface can be located on N-shaped conductive layer 111, or is positioned at
In N-shaped conductive layer 111.The side of n-type electrode groove position 110 can be vertical with the first surface of substrate 10 or
The smooth flat of oblique, smooth surface, structuring plane or structuring curved surface；Structuring includes recessed
One or more in convex, sawtooth.
For reducing the minimizing of luminescent layer 113 area to greatest extent, making n-type electrode groove position 110 should use up
That measures is narrow, and preferable through hole replaces step.
In the present embodiment, the surrounding at semiconductor luminous chip is formed with an indent 100.Indent 100 phase
For substrate 10 edge to semiconductor laminated 11 sides shrink, thus indent 100 be positioned at quasiconductor fold
Layer 11 side.The bottom surface of this indent 100 is positioned on substrate 10 first surface or substrate 10.
Indent 100 side and bottom surface are wrapped up by least one insulating barrier, and this insulating barrier can be by above-mentioned insulation
Layer 16 extends and is formed.The setting of indent 100, forms substrate level over the substrate 10.In insulating barrier parcel
Recessed 100 and fill up whole substrate level, such that it is able to more easily leading whole semiconductor luminous chip
Electricity side wrap, forms insulation.Insulating barrier 16 material can include silicon dioxide, aluminium sesquioxide, nitridation
Aluminum and silicon nitride etc..
The surface all exposed, that have electric conductivity of semiconductor luminous chip and side include that quasiconductor is folded
The surface all exposed, that there is electric conductivity of layer 11 and side, the n not covered by n-type electrode 12
The exposed surface of type conductive layer 111 and exposed sides, the p-type electric-conducting layer 113 not covered by p-type electrode 13
Exposed surface and exposed sides, the exposed sides of luminescent layer 112, n-type electrode groove side, position 110 and
Indent 100 side and bottom surface etc. thereof.The thickness of the thinnest part of insulating barrier 16 is typically larger than 150 nanometers.Whole
Individual semiconductor luminous chip is due to fully wrapped around by insulating barrier 16, even if so not having casting glue protection also same
Sample can use.
Further, the semiconductor luminous chip of the present embodiment also includes p-type current extending 18.
N-shaped conductive layer 111 generally thicker than p-type electric-conducting layer 113 5-15 times, and have and more preferably conduct electricity spy
Property, so its electric current can preferably be distributed to whole N-shaped conductive layer 111.Conversely, because p-type electric-conducting layer
113 is the thinnest, and electric conductivity is the most poor, in order to ensure electric current energy uniform vertical by luminescent layer 112, excellent
It is selected in p-type electric-conducting layer 113 surface blanket p-type current extending 18.
P-type current extending 18 1 aspect has good conductive characteristic, on the other hand energy and p-type electric-conducting
Layer 113 forms low resistance contacts or low-resistance Ohm contact, additionally, for improving going out from substrate 10 second surface
Light quantity, p-type current extending 18 comprises p-type reflecting layer.So, p-type current extending 18 generally by
There is the p-type electric-conducting extension layer of good conductive characteristic, P type contact layer and p-type reflecting layer composition；Certainly,
P-type current extending 18 can also be arranged as required to into include p-type electric-conducting extension layer, p-type reflecting layer and
One or more in P type contact layer.
Wherein, p-type electric-conducting extension layer use material include ITO, Ag, Au, Al, Cr, Ti, Pt,
One or more in Pd, Ni, W, ZnO, P type contact layer use material include ITO, Ag, Al,
One or more in Cr, Ti, Pt, Pd, Ni, NiO, ZnO, heavily doped low resistance P-type conductive layer, p-type
The material that reflecting layer uses includes one or more in Ag, Al, Prague total reflection film (DBR).From
It is P type contact layer, p-type reflecting layer, p-type electric-conducting extension that p-type electric-conducting layer 113 starts to be arranged in order order
Layer, when p-type electric-conducting extension layer is transparent, being arranged in order order can also be P type contact layer, p-type electric-conducting
Extension layer, p-type reflecting layer.
P-type current extending 18 is arranged between p-type electric-conducting layer 113 surface and insulating barrier 16, and and p
Type electrode 13 is conductively connected.
P-type electrode 13 can run through p-type current extending 18, expands with p-type electric-conducting layer 113 and p-type electric current
Exhibition layer 18 is conductively connected.P-type electrode 13 can also only contact with p-type current extending 18, and passes through p
Type current extending 18 is formed with p-type electric-conducting layer 113 and is conductively connected.P-type electrode 13 can also partly pass through
Wear p-type current extending 18, directly contact formation with p-type electric-conducting layer 113 and be conductively connected, remainder
Directly contact formation with p-type current extending 18 to be conductively connected.
As required, the semiconductor luminous chip of the present embodiment also includes N-shaped current extending 17, with p
Type current extending 18 has identical effect and function.N-shaped current extending 17 is arranged on n-type electrode
Between bottom surface, groove position 110 and insulating barrier 16, and it is conductively connected with n-type electrode 12.
N-type electrode 12 can run through N-shaped current extending 17, expands with N-shaped conductive layer 111 and N-shaped electric current
Exhibition layer 17 is conductively connected.N-type electrode 12 can also only contact with N-shaped current extending 17, and passes through p
Type current extending 18 is formed with N-shaped conductive layer 111 and is conductively connected.N-type electrode 12 can also partly be passed through
Wear N-shaped current extending 17, directly contact formation with N-shaped conductive layer 111 and be conductively connected, remainder
Directly contact formation with N-shaped current extending 17 to be conductively connected.
N-shaped current extending 17 can also include N-shaped conductive extension layer, N-shaped reflecting layer, n-contact layer
In one or more.N-shaped conductive extension layer use material include ITO, Ag, Au, Al, Cr,
One or more in Ti, Pt, Pd, Ni, W, ZnO, n-contact layer use material include ITO,
One in Ag, Al, Cr, Ti, Pt, Pd, Ni, NiO, ZnO, heavily doped low-resistance n-type conductive layer or
Multiple, the material that N-shaped reflecting layer uses includes the one in Ag, Al, Prague total reflection film (DBR)
Or it is multiple.
In above-mentioned p-type current extending 18 and N-shaped current extending 17, when p-type current extending
18 include p-type reflecting layer, when N-shaped current extending 17 includes N-shaped reflecting layer, and semiconductor light emitting
Chip can go out light with front and/or side；When p-type current extending 18 does not include p-type reflecting layer, such as bag
Including P type contact layer and/or p-type electric-conducting extension layer, N-shaped current extending 17 does not include N-shaped reflecting layer,
During as included n-contact layer and/or N-shaped conductive extension layer, semiconductor luminous chip can be with front, side
And/or the back side goes out light.
Certainly, as required, N-shaped current extending 17 and p-type current extending 18 also may select one
It is configured, or is all not provided with.
Owing to reflow soldering needs cutting of the face of weld of larger area, n-type electrode 12 and p-type electrode 13
Area is big not, and the particularly sectional area of n-type electrode 12 is more exposed to n-type electrode groove position 110 size
Limit, far from the requirement meeting Reflow Soldering coating brazing metal.Therefore, in insulating barrier 16 surface configuration
P-type weld pad 15 and N-shaped weld pad 14 solve the problems referred to above well.It should be understood that can basis
Need to arrange p-type weld pad 15 and N-shaped weld pad 14 simultaneously, or be arranged as required to wherein any one.
Further, the semiconductor luminous chip of the present embodiment may also include at least Metal Substrate heat conduction weld pad
(not shown).
Metal Substrate heat conduction weld pad is close to insulating barrier 16 surface, may be provided at n-type electrode 12 and p-type electrode
Between 13, and/or, between N-shaped weld pad 14 and p-type weld pad 15.Further, Metal Substrate heat conduction weld pad with
Between n-type electrode 12 and p-type electrode 13, N-shaped weld pad 14 and p-type weld pad 15 insulated from each other, thus
Can directly be connected with heat abstractor, improving heat radiation efficiency.Metal Substrate heat conduction weld pad generally uses good leading
Hot metallic material, including silver, aluminum, gold.
Semiconductor luminous chip can be soldered on the pad of LED support by the backflow of Metal Substrate heat conduction weld pad, whole
Individual technique is simple, it is possible to use the cheap and simple compatible with other electronic devices and components solder reflow device and
Technology generations replaces LED die bond routing device and the technique of normally used complex and expensive, and the equipment that is greatly saved is thrown
Money, reduces manufacturing cost and reduces process procedure.
As in figure 2 it is shown, the semiconductor luminous chip of this utility model the second embodiment, including substrate 10,
Semiconductor laminated 11, at least one n-type electrode 12, at least p-type electrode 13, at least N-shaped weld pad 14
And at least one p-type weld pad 15.Wherein, substrate 10 has first surface and second surface；Quasiconductor is folded
Layer 11 is arranged on the first surface, and it includes folding N-shaped conductive layer 111, the luminescent layer 112 and p set successively
Type conductive layer 113.The surface the most exposed, that there is electric conductivity of this semiconductor luminous chip and
Side is wrapped up by least one insulating barrier 16.
At least one exposed surface at insulating barrier 16 of p-type electrode 13；At least one n-type electrode 12 exposed
The surface of insulating barrier 16.Between p-type electrode 13 and n-type electrode 12 insulated from each other, and run through insulating barrier 16
It is conductively connected with p-type electric-conducting layer 113 and N-shaped conductive layer 111 respectively.
P-type weld pad 15 is arranged on the position of the exposed p-type electrode 13 on insulating barrier 16 surface and is close to
On insulating barrier 16 surface, and it is conductively connected with p-type electrode 13；N-shaped weld pad 14 is arranged on exposed absolutely
The position of the n-type electrode 12 on edge layer 16 surface is also close to insulating barrier 16 surface, and with N-shaped electricity
Pole 12 is conductively connected.Between p-type weld pad 15 and N-shaped weld pad 14 insulated from each other.
At least one p-type weld pad 15 and/or at least one N-shaped weld pad 14 are to the side, outside of semiconductor luminous chip
Surface extends, and the part or all of side surface outside semiconductor luminous chip forms corresponding side weld pad.
The convenient welding of the formation of side weld pad, welding cohesiveness is good, and resistance thermal resistance is low, low cost of manufacture, it is adaptable to system
Make the semiconductor luminous chip of the big current type of small size.Additionally, for double-side semiconductor chip and
Speech, the setting of this side weld pad does not affect the luminescence on two sides.
This embodiment is unlike above-mentioned first embodiment: the part or all of of insulating barrier 16 contains a light
Reflecting layer 19.Reflection layer 19 can be located at the centre of insulating barrier 16 or is positioned at the exposed surface of insulating barrier 16.
Owing to insulating barrier 16 is typically printing opacity thin layer, the setting of reflection layer 19 prevents light from passing through absolutely well
Penetrate outside edge layer 16.Reflection layer 19 includes in silver layer, aluminium lamination, Prague total reflection film (DBR)
Plant or multiple.
If p-type current extending 18 has contained p-type reflecting layer, that of blanket p-type current extending 18
Partial insulative layer 16 can be not repeated to arrange reflection layer.
It should be understood that above-mentioned each technical characteristic can be used in any combination and unrestricted.
The foregoing is only embodiment of the present utility model, not thereby limit patent model of the present utility model
Enclosing, every equivalent structure utilizing this utility model description and accompanying drawing content to be made or equivalence flow process become
Change, or be directly or indirectly used in other relevant technical fields, be the most in like manner included in of the present utility model
In scope of patent protection.
Claims (10)
1. a semiconductor luminous chip, including the substrate with first surface and second surface, have at described substrate first surface and at least include the semiconductor laminated of N-shaped conductive layer, luminescent layer and p-type electric-conducting layer, an at least n-type electrode groove position exposing partially n-type conductive layer on described semiconductor laminated surface；It is characterized in that, the surface the most exposed, that have electric conductivity of described semiconductor luminous chip and side are wrapped up by least one insulating barrier；
Described surface of insulating layer is provided with at least one exposed p-type electrode and at least one n-type electrode；Between described p-type electrode and n-type electrode insulated from each other, and run through described insulating barrier and be conductively connected with described p-type electric-conducting layer and N-shaped conductive layer respectively；
The exposed position at the described p-type electrode of described surface of insulating layer is provided with the p-type weld pad being connected and being close to described surface of insulating layer with described p-type electrodes conduct；The exposed position in the described n-type electrode of described surface of insulating layer is provided with and is conductively connected and is close to the N-shaped weld pad of described surface of insulating layer with described n-type electrode；
N-shaped weld pad described in p-type weld pad and/or at least described at least extends to the outside side surface of semiconductor luminous chip, and the part or all of side surface outside described semiconductor luminous chip forms corresponding side weld pad.
Semiconductor luminous chip the most according to claim 1, it is characterised in that be provided with p-type current extending between described p-type electric-conducting layer surface and described insulating barrier；Described p-type electrode is conductively connected with described p-type current extending；And/or,
It is provided with N-shaped current extending between described bottom surface, n-type electrode groove position and described insulating barrier；Described n-type electrode is conductively connected with described N-shaped current extending.
Semiconductor luminous chip the most according to claim 2, it is characterised in that described p-type current extending includes one or more in p-type electric-conducting extension layer, p-type reflecting layer, P type contact layer；Described N-shaped current extending includes one or more in N-shaped conductive extension layer, N-shaped reflecting layer, n-contact layer；Or,
Described p-type current extending includes that p-type reflecting layer, described N-shaped current extending include that N-shaped reflecting layer, described semiconductor luminous chip are front and/or side goes out light；Or, described p-type current extending includes p-type electric-conducting extension layer and/or P type contact layer；Described N-shaped current extending includes N-shaped conductive extension layer and/or n-contact layer, and described semiconductor luminous chip is that front, the back side and/or side go out light.
Semiconductor luminous chip the most according to claim 1, it is characterized in that, the Metal Substrate heat conduction weld pad being at least close to described surface of insulating layer it is provided with between described n-type electrode and described p-type electrode, insulated from each other between described Metal Substrate heat conduction weld pad and described n-type electrode and p-type electrode.
Semiconductor luminous chip the most according to claim 1, it is characterized in that, the Metal Substrate heat conduction weld pad being at least close to described surface of insulating layer it is provided with between described N-shaped weld pad and p-type weld pad, insulated from each other between described Metal Substrate heat conduction weld pad and described N-shaped weld pad and p-type weld pad.
Semiconductor luminous chip the most according to claim 1, it is characterised in that this semiconductor luminous chip surrounding has an indent；Described indent is positioned at described semiconductor laminated side, and the bottom surface of described indent is positioned at described substrate first surface or described substrate, and described indent side and bottom surface are wrapped up by insulating barrier described at least.
Semiconductor luminous chip the most according to claim 1, it is characterised in that the part or all of of described insulating barrier contains a reflection layer；Described reflection layer is positioned at the centre of described insulating barrier or is positioned at the exposed surface of described insulating barrier.
8. according to the semiconductor luminous chip described in any one of claim 1-7, it is characterised in that described substrate is light-transmissive substrates；Described substrate first surface and/or second surface are smooth finished surfaces or patterned surface；Described patterned surface includes one or more in taper rough surface, convex-concave surface, pyramid shape surface.
9. according to the semiconductor luminous chip described in any one of claim 1-7, it is characterized in that, described side of substrate and/or described semiconductor laminated side is vertical with described substrate first surface or the smooth flat of oblique, smooth surface, structuring plane or structuring curved surface；Described structuring includes one or more in concavo-convex, sawtooth.
10. according to the semiconductor luminous chip described in any one of claim 1-7, it is characterised in that described n-type electrode groove position includes step and/or through hole.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620318116.4U CN205645865U (en) | 2016-04-15 | 2016-04-15 | Semiconductor luminescence chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620318116.4U CN205645865U (en) | 2016-04-15 | 2016-04-15 | Semiconductor luminescence chip |
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| CN205645865U true CN205645865U (en) | 2016-10-12 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105742469A (en) * | 2016-04-15 | 2016-07-06 | 深圳大道半导体有限公司 | Semiconductor light emitting chip |
| CN115064627A (en) * | 2022-08-18 | 2022-09-16 | 江西兆驰半导体有限公司 | Positive-mounted LED chip and preparation method thereof |
-
2016
- 2016-04-15 CN CN201620318116.4U patent/CN205645865U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105742469A (en) * | 2016-04-15 | 2016-07-06 | 深圳大道半导体有限公司 | Semiconductor light emitting chip |
| CN115064627A (en) * | 2022-08-18 | 2022-09-16 | 江西兆驰半导体有限公司 | Positive-mounted LED chip and preparation method thereof |
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