JPH08306828A - Semiconductor device - Google Patents

Abstract

PURPOSE: To enable firm adhesion of a cured body of resin composition, a semiconductor chip and an auxiliary wiring board, by making the resin composition as epoxy resin composition containing epoxy resin, specific aryl phenol resin and hardening accelerator. CONSTITUTION: A semiconductor chip 1 is mounted on an auxiliary wiring board 2. At least the gap between the semiconductor chip 1 and the auxiliary wiring board 2 is sealed with a cured body 3 of resin composition. The resin composition is epoxy resin composition containing epoxy resin, aryl phenol resin expressed by a formula, and hardening accelerator. In the formula, (n) and (m) satisfy the relations of n+m=2-10 and n/(n+m)=0.1-1.0. By the effect of the hardener, the cured body of the epoxy resin composition is firmly boned to the semiconductor chip 1 and the auxiliary wiring board 2. Thereby the circuit forming surface of the semiconductor chip and electric connection parts are sufficiently protected, so that reliability is remarkably improved.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device in which a semiconductor chip is mounted on an auxiliary wiring board and at least the gap between the semiconductor chip and the auxiliary wiring board is sealed with a cured product of a resin composition. is there.

[0002]

2. Description of the Related Art As a package type semiconductor device,
A semiconductor chip is mounted on the lead frame die pad,
It is generally known that a semiconductor chip and an inner lead of a lead frame are wire-bonded, and the semiconductor chip is sealed with a resin together with the lead frame except for the outer lead. But,
In this type of semiconductor device, the pitch of the outer leads of the lead frame needs to be made quite wide in terms of soldering accuracy, which makes it impossible to avoid making the package large, which is disadvantageous for high-density mounting. Becomes

In order to solve this problem, an auxiliary wiring board is used instead of the lead frame, and a semiconductor chip is faced with the electrode side (circuit forming surface side) on this board surface (face down). And a semiconductor device of a type in which at least a gap between the semiconductor chip and the auxiliary wiring board is sealed with a cured product of a resin composition has been developed and partially put into practical use. A routing conductor is disposed inside the auxiliary wiring board, and one end of the routing conductor is formed on an inner electrode exposed from a surface of the auxiliary wiring board on which the semiconductor chip is mounted. The other end of the conductor is formed on the outer electrode exposed from the surface opposite to the semiconductor chip mounting side. The inner electrode of the auxiliary wiring board is joined to the electrode of the semiconductor chip, and the semiconductor chip can be electrically connected to the outside through the inner electrode, the routing conductor, and the outer electrode. Examples of this type of semiconductor device include a chip scale package (CS
P) type semiconductor devices can be mentioned.

In the CSP type semiconductor device, the package size is substantially the same as the semiconductor chip size, and only the gap between the semiconductor chip and the auxiliary wiring board is sealed, or the entire semiconductor chip is sealed. There is something stopped.

FIG. 8 shows a C in which the entire semiconductor chip is sealed.
1 shows an SP type semiconductor device. As shown in the figure, this semiconductor device has a semiconductor chip 1'on an auxiliary wiring board 2 '.
However, not only the gap between the semiconductor chip 1'and the auxiliary wiring board 2 ', but the entire semiconductor chip is a cured body 4'of a resin composition. Although sealed, the package size is substantially the same as the size of the semiconductor chip 1 '. The auxiliary wiring board 2'has an insulating support plate 25 'as a base material, and the hole 2 is formed at a predetermined position of the insulating support plate 25'.
21 'is perforated and the inside is filled with metal 222'. Then, one end of the filling metal 222 'is formed as a metal bump 223' protruding from the surface of the insulating support plate 25 'opposite to the side where the semiconductor chip 1'is mounted, and serves as an external electrode 22'. Further, the routing conductor 2 is provided at a predetermined position on the surface of the insulating support plate 25 'on the semiconductor chip mounting side.
4'is formed, one end of which is joined to the other end of the filling metal 222 '. The semiconductor chip 1'is a flip chip having a metal bump 211 'protruding from the insulating support plate 25' at the tip of the electrode 11 ', and the metal bump 211' is connected to the routing conductor 24 '. Is joined to the other end of.

As described above, in the CSP type semiconductor device, the semiconductor chip is mounted face down on the auxiliary wiring board, and one end of the internal electrode or the leading conductor is attached to the auxiliary wiring board in accordance with the electrode position of the semiconductor chip. The external electrodes can be arranged and formed to match the circuit board, and the external electrodes can be connected to the other end of the routing conductor. Therefore, in such a semiconductor device, the external electrodes for mounting can be formed at predetermined positions without being restricted by the arrangement of the electrodes of the semiconductor chip to be used, and the distance between the external electrodes can be sufficiently wide. It is possible,
The soldering accuracy is improved.

As described above, in the CSP type semiconductor device, at least the gap between the semiconductor chip and the auxiliary wiring board is sealed with the cured body of the resin composition. This is because the semiconductor chip is mounted face down, so that the circuit forming surface and the electrical connection portion are protected. Usually, the gap is sealed by injecting a liquid sealant from the end of the gap and then curing it.

[0008]

However, the conventional encapsulation using a liquid encapsulant has a problem that the reliability of the semiconductor device is not sufficient. Therefore, for example, when exposed to a severe temperature change condition such as a cooling / heating cycle test, a metal joint portion is broken due to thermal stress and a conduction failure occurs in the semiconductor device. Further, when peeling occurs between the cured body of the resin composition and the semiconductor chip or the auxiliary wiring board in the gap, water, ions and the like will enter the inside of the semiconductor device, and reliability will be impaired. Become.

Further, when a flip chip is used as the semiconductor chip, the flip chip is expensive, so that the cost of the semiconductor device is increased.

The present invention has been made in view of the above circumstances. A semiconductor chip is mounted on an auxiliary wiring board, and at least a gap between the semiconductor chip and the auxiliary wiring board is sealed with a cured body of a resin composition. It is an object of the present invention to provide a semiconductor device having excellent reliability, in which a cured product of the resin composition, a semiconductor chip, and an auxiliary wiring board are firmly bonded to each other.

[0011]

In order to achieve the above object, the present invention provides a semiconductor chip having electrodes on a plate surface of an auxiliary wiring board with a predetermined gap maintained with the electrode sides facing each other. And the routing conductor is disposed inside the auxiliary wiring board, and one end of the routing conductor is formed on the inner electrode exposed from the surface of the auxiliary wiring board on the semiconductor chip mounting side. The other end is formed on the outer electrode exposed from the surface of the auxiliary wiring board opposite to the semiconductor chip mounting side, the inner electrode and the electrode of the semiconductor chip are joined, and at least the semiconductor chip and the auxiliary wiring board Is a semiconductor device in which the gap is sealed with a cured body of a resin composition, wherein the resin composition has the following (A) to (C):
Is included. (A) Epoxy resin (B) Allylphenol resin represented by the following general formula (1)

Embedded image (C) curing accelerator

[0012]

That is, the present inventors have conducted a series of studies, focusing on improving the adhesiveness of the epoxy resin composition used for sealing the gap between the semiconductor chip and the auxiliary wiring board. As a result, when the allylphenol resin represented by the above general formula (1) is used as a curing agent for the epoxy resin,
The inventors have found that the adhesiveness of the epoxy resin composition is improved, and the reliability of the obtained semiconductor device is improved, and have reached the present invention.

In the present invention, the problem of high cost of the semiconductor chip is solved by using the inner electrode formed on the auxiliary wiring board as a metal bump protruding from the plate surface. This eliminates the need to use expensive flip chips.

Next, the present invention will be described in detail.

In the semiconductor device of the present invention, the semiconductor chip is mounted on the auxiliary wiring board by face down, and at least the gap between the semiconductor chip and the auxiliary wiring board is cured by the epoxy resin composition containing a special curing agent. It is sealed in the body.

First, the epoxy resin composition will be described.

The epoxy resin composition of the present invention contains an epoxy resin (component A), an allylphenol resin represented by the general formula (1) (component B), and a curing accelerator (component C). .

The above-mentioned epoxy resin (component A) is not particularly limited, but a bisphenol type epoxy resin,
It is preferable to use a liquid epoxy resin such as a cresol novolac type epoxy resin or an alicyclic epoxy resin.
In addition to this, at the time of sealing, the sealing temperature (usually 20 to 1
It is also possible to use an epoxy resin which becomes liquid at 80 ° C. Among these, a bisphenol type epoxy resin is preferable because of its fluidity.

The allylphenol resin (component B) represented by the above general formula (1) serves as a curing agent for the above epoxy resin. Thereby, the adhesiveness of the epoxy resin composition is improved and the reliability of the semiconductor device is improved.
The allylphenol resin may be not only liquid at room temperature but also liquid at the sealing temperature. The allylphenol resin may be a random copolymer or a block copolymer. Further, in the general formula (1), n and m are preferably n + m = 2 to 5, n /
(N + m) = 0.3 to 1.0, and particularly preferably n
+ M = 2 to 4, n / (n + m) = 0.5 to 1.0. As described above, when n and m are in the suitable ranges, the advantages of good fluidity and excellent curability can be obtained. And it is preferable to mix | blend this allyl phenol resin with the ratio of the range which becomes the hydroxyl equivalent of 0.9-1.0 equivalent with respect to the epoxy equivalent of epoxy resin.

The curing accelerator (component C) is not particularly limited, and examples thereof include imidazole catalysts such as methylimidazole and ethylimidazole, phosphorus-based catalysts such as triphenylphosphine and amine-based catalysts. it can. Among these, an imidazole catalyst is preferable, and methylimidazole is particularly preferable, because of its excellent curability. Further, the compounding ratio of the curing accelerator is usually in the range of 0.1 to 0.2% by weight with respect to phenol.

In the epoxy resin composition, in addition to the components A to C, various kinds of fillers, flame retardants, release agents, colorants, surface treatment agents, stress reducing agents, etc. may be added, if necessary. You may mix an additive.

As the above-mentioned filler, fusible silica powder,
Examples include crystalline silica powder, talc, alumina, calcium carbonate, carbon black and the like. Examples of the flame retardant include brominated compounds and antimony compounds. Examples of the releasing agent include carnauba wax and polyethylene wax. Examples of the colorant include carbon black and pigments. Examples of the surface treatment agent include silane coupling agents. Examples of the stress reducing agent include siloxane-based elastomers and butadiene-based elastomers.

The epoxy resin composition of the present invention can be prepared by blending the above-mentioned components A to C and, if necessary, various additives, and heating and kneading them. When the epoxy resin composition is solid, it may be tableted if necessary.

Next, an example of the semiconductor device of the present invention using the above epoxy resin composition is shown in FIG.

FIG. 2A is a sectional view showing the structure of the semiconductor device, and FIG. 2B is a partially cutaway view thereof, in which the same parts are designated by the same reference numerals. As shown in the figure, this semiconductor device is of the CSP type in which the entire semiconductor chip 1 is sealed. That is, the semiconductor chip 1 is mounted on the plate surface of the auxiliary wiring board piece 2 with its electrode 11 side (circuit forming surface side) facing the auxiliary wiring 2 board surface (face down). The auxiliary wiring board 2 is formed by laminating insulating layers 24 and 25. The electrode 11 of the semiconductor chip 1 is joined to the inner electrode 21 of the auxiliary wiring board 2. This inner electrode 21 is
The metal 21 is inserted into the holes 212 drilled at predetermined positions of the insulating layer 24.
3 is filled, and one end of the filling metal is the semiconductor chip 1
The metal bump 211 is formed so as to project from the mounting surface in a bump shape (upward in the figure). The other end of the filled metal 213 is connected to one end of the routing conductor 23 arranged inside the auxiliary wiring board piece 2 (between the insulating layers 24 and 25). Further, the other end of this routing conductor 23 is connected to the outer electrode 22. The outer electrode 22 is similar to the inner electrode 21 in the insulating layer 2
5 is filled with a metal 222 in a hole 221 formed at a predetermined position, one end of the filling metal 222 is connected to one end of the lead conductor 23, and the other end of the filling metal 222 is
A metal bump 223 is formed by protruding (downward in the figure) in a bump shape from the surface opposite to the side on which the semiconductor chip 1 is mounted. Thus, in this semiconductor device, the inner electrode 21 of the auxiliary wiring board 2 and the lead conductor 2 are
3, through the outer electrode 22, the semiconductor chip 1 is electrically connected to the outside.

In this semiconductor device, the gap between the semiconductor chip 1 and the auxiliary wiring board 2 is sealed with the cured body 3 of the epoxy resin composition. Since this epoxy resin composition uses the allylphenol resin represented by the general formula (1), which is a special curing agent, it has a very high adhesive force. Therefore, the semiconductor chip 1 and the cured body 3
The auxiliary wiring board 2 and the hardened body 3 are firmly adhered to each other, and even if the auxiliary wiring board 2 and the hardened body 3 are exposed to a temperature change condition such as a thermal cycle test, for example, an electrical connection portion (metal Breakage and the like due to thermal stress in the joint portion are prevented, and intrusion of water and the like into the semiconductor device is also prevented, and the reliability of the semiconductor device is excellent. Further, as described above, in this semiconductor device, the entire semiconductor chip 1 is sealed. That is, the gap between the semiconductor chip 1 and the auxiliary wiring board 2 is sealed with the cured body 3 of the epoxy resin composition, and the entire semiconductor chip 1 except this portion is sealed with the cured body 4 of the resin composition. Has been done.
The cured body 4 of the resin composition is not particularly limited, but as will be described later, from the viewpoint of efficiency of sealing work and the like,
It is preferably a cured product of the epoxy resin composition.

Further, as a characteristic of this semiconductor device, since the routing conductor 23 can be arbitrarily formed,
The point is that the formation positions of the inner electrode 21 and the outer electrode 22 can be freely selected. As a result, it becomes possible to standardize the semiconductor device regardless of the type of the semiconductor chip, and the application to the mounted circuit board becomes wide-ranging. FIG. 1A shows an example of a semiconductor device having an electrode position different from that of the semiconductor device shown in FIG. In the figure, the same parts as those in FIG. In addition, FIG. 1 (a ″) shows a semiconductor device in which an outer electrode is arranged at a position substantially directly below the inner electrode. In the figure, the same parts as those in FIG.

Further, in this semiconductor device, since the inner electrode of the auxiliary wiring board is formed on the protruding metal bump, a general semiconductor chip is used instead of the flip chip.

The area of the board surface of the auxiliary wiring board 2 is the bottom area of the semiconductor chip 1 (area of the circuit forming surface, usually 3 mm to
It is preferably equal to or less than 200%, particularly preferably 130% or less. This is because if the auxiliary wiring board is larger than the semiconductor chip,
This is because the package density is reduced and the advantages of the CSP type semiconductor device are not utilized.

The mutual spacing of the external electrodes 22 is preferably as wide as possible in order to prevent a bridge when soldering to the circuit board to be mounted. The intervals between the external electrodes 22 are usually equal.

Next, FIG. 2 shows an example in which the auxiliary wiring board 2 has a three-layer structure. In the figure, reference numeral 110 denotes an electrode of a circuit board to be mounted (not shown), and other parts are the same as those in FIG. As shown in the figure, the auxiliary wiring board 2 is formed by laminating three insulating layers, and the routing conductor 23 is arranged between these layers. By thus forming the auxiliary wiring board 2 in a multi-layered structure, it is possible to increase the number of embedded portions of the routing conductor 23, and it is possible to appropriately deal with the multi-electrode semiconductor chip 1 having a highly integrated circuit. Become. Therefore, the auxiliary wiring board 2 is not limited to a two-layer or three-layer structure, and the number of layers is appropriately determined depending on the type of semiconductor chip to be mounted.

Then, in the semiconductor device of the present invention,
In order to enhance the interfacial adhesive force between the auxiliary wiring board and the cured body of the epoxy resin composition, at least a portion of the surface of the auxiliary wiring board on the semiconductor chip mounting side that is in contact with the cured body of the epoxy resin composition is provided with a predetermined It is preferable to have a surface tension state or a predetermined uneven surface. Specifically, the surface tension is
It is usually 35 mJ / m ² or more, preferably 40 mJ / m ² or more. The uneven surface is usually 0.005
An uneven surface having a diameter of 0.5 μm, preferably 0.01 to
It is an uneven surface having a diameter of 0.2 μm. By making such a predetermined condition, the adhesive force at the interface is 300 g / cm or more, preferably 500 g / cm or more, particularly preferably 1000 g / cm at 90 ° peeling strength (room temperature, dry state).
It is possible to make it cm or more, and as a result, it is possible to more effectively prevent the occurrence of conduction failure. As a method of processing the auxiliary wiring board under such predetermined conditions,
Examples thereof include chemical methods such as acid / alkali solution treatment, coupling agent treatment and graft treatment, and physical treatments such as corona discharge treatment, high frequency plasma treatment and ion etching treatment.

Next, the semiconductor device of the present invention can be manufactured using the above epoxy resin composition, for example, as shown in FIG.

First, as shown in FIG. 4A, the lead conductor 23 is formed by printing on one surface of the insulating support film (insulating layer) 24. For this print formation, it is preferable to use a method of chemically etching the metal foil of the metal foil laminated synthetic resin film into a predetermined wiring pattern. As this metal foil laminated synthetic resin film, a two-layer base material obtained by fusing a copper foil to a synthetic resin film or applying a varnish solution to the synthetic resin film, the copper foil being a synthetic resin film with a thermoplastic or thermosetting adhesive. Examples include a three-layer base material adhered to. In addition, the synthetic resin film is not particularly limited as long as it satisfies the heat resistance when the metal bumps are formed by the wire bump method and the chemical resistance when the metal bumps are formed by the plating method. Examples of synthetic resin films include polyimide films, polyethylene terephthalate films, polyetherimide films, polyethersulfone films, polyphenylene sulfide films, polyetheretherketone films, polytetrafluoroethylene (Teflon) films, and the like. Among them, the polyimide film having good heat resistance is preferable as described above. The thickness of this synthetic resin film is usually 10 to 150 μm, and preferably 1
It is 2.5 to 50 μm.

After forming the wiring conductor 23 on one surface of the insulating support film 24, as shown in FIG.
A hole 212 is formed at a predetermined position of the insulating support film 24. For this drilling, generally, drilling, laser etching, etc. are applied. In particular, when the insulating support film 24 is a polyimide film, a wet punching method such as alkali etching can be applied. Further, in the case of a two-layer base polyimide film, it is also possible to use photosensitive polyimide and perforate it by exposure.

After the holes 212 are drilled, as shown in FIG. 5C, a plating process is performed in the holes 212 using the insulating support film 24 as a plating mask and the conductor 23 as a deposition origin to remove the metal 213. Fill. Examples of this metal include gold, silver, nickel, copper, and palladium.

After filling the metal 213, the same figure (d)
As shown in FIG. 7, the metal bump 211 is formed on the exposed end surface (upper end surface in the figure) of the filling metal 213. A wire bonder is used to form the metal bumps 211, and the tips of gold wires, copper wires, solder wires, etc. are melted into spherical shapes,
A method of fusing the spherical tip portion to the exposed end surface of the metal 213 can be mentioned. When a gold wire is used, it is preferable that the filling metal 213 be nickel in order to prevent contact between the copper routing conductor 23 and the gold. In addition to the method using the wire bonder, it is also possible to form the metal bumps 211 on the end surface of the filling metal by wet plating with metal. When the metal bumps 211 are formed using the wire bonder, since the periphery of the hole 212 is a synthetic resin surface having low wettability with respect to the molten metal, adhesion of the molten metal around the hole 212 is prevented, and the end surface of the filling metal 213 is prevented. It becomes possible to form the spherical metal bumps 211 having a large contact angle in an orderly manner. Further, the metal bumps 211 can be formed orderly by the plating method regardless of the types of electrolytic plating and electroless plating. By forming the metal bumps 211, the inner electrode 2
The formation of 1 is completed. The height of this metal bump is
Usually, it is 5 to 150 μm, preferably 10 to 100
μm.

After the inner electrode 21 is formed, as shown in FIG. 6 (e), the printed surface of the wiring conductor 23 of the insulating support film 24 is cover-coated with resin to form a cover-coat insulating layer 25. Next, as shown in (v) of the same figure, a hole 221 for the outer electrode is formed at a predetermined position of the cover coat insulating layer 25, and as shown in (g) of the figure, this hole 22 is formed.
1 is filled with metal (solder) 222. These series of steps can be performed in the same manner as the formation of the inner electrode 21. In this way, the auxiliary wiring board 2 can be manufactured. As the material for forming the cover coat insulating layer 2, the same material as the insulating layer 24 can be used, and from the viewpoint of heat resistance, a polyimide film is preferable, and a heat-closing polyimide film or a photosensitive ring-closing polyimide film is particularly preferable. Is.

Then, the semiconductor chip 1 is mounted on the auxiliary wiring board 2 as shown in FIG. That is, the semiconductor chip 1 is aligned on the inner electrode 21 side of the auxiliary wiring board 2 so that the electrode 11 and the inner electrode 21 are aligned with each other, and the semiconductor chip 1 is individually bonded by a collective crimp connection such as a hot bar or pulse heat or a single point bonder. The electrode 11 of the semiconductor chip 1 and the inner electrode 21 are metal-bonded by thermocompression bonding. When performing individual thermocompression bonding by a single point bonder in this metal bonding, it is preferable to use ultrasonic bonding together to lower the thermocompression bonding temperature.

It is also possible to use solder bumps as the metal bumps 211 of the inner electrode 21 and join the metal bumps 211 and the electrodes 11 of the semiconductor chip 1 by the reflow method. In this case, the electrode 1 of the semiconductor chip 1
1 due to the surface tension of the molten solder, even if a slight deviation occurs in the alignment between the inner electrode 21 of the auxiliary wiring board 2 and 1
It will be corrected by itself. Therefore, the measures for alignment described later are unnecessary.

Further, in the step shown in FIG. 5C, the electrode 11 of the semiconductor chip 1 and the inner electrode 21 of the auxiliary wiring board 2 are
As shown in FIG. 4, a dummy electrode 11a is provided on the semiconductor chip 1, bumps 211a for alignment are attached to the dummy electrode 11a, and holes 212a for alignment are formed in the auxiliary wiring board 2 as shown in FIG. There is a method of joining the hole 212a and the alignment bump 211a. The height of the alignment bumps 211a is set to be slightly higher than that of the metal bumps 211 of the inner electrode 21. For example, the height of the metal bumps 211 is 2
In the case of 0 μm, the height of the alignment bump 211a is set to 50 μm. Alignment bump 211a
Regarding the material of, when the bumps 211a are pressed at the time of joining the electrodes 11 of the semiconductor chip 1 and the metal bumps 211 of the auxiliary wiring board 2, those softening at the joining temperature are used. It is not particularly limited. The hole diameter of the alignment hole 212a is preferably set so that the positional deviation between the electrode 11 of the semiconductor chip 1 and the metal bump 211 of the auxiliary wiring board 2 is suppressed to 10% or less.

Next, after mounting the semiconductor chip 1 on the auxiliary wiring board 2, the epoxy resin composition is injected into the gap between the both, and then the epoxy resin composition is cured and sealed. In this case, if the epoxy resin composition is liquid at room temperature,
Injection is performed as it is, and if it is a solid, it is heated and liquefied, and then injected. This injection can be performed using a syringe, a dispenser, or the like. The curing conditions of the epoxy resin composition after injection are appropriately determined depending on the type of epoxy resin composition used, etc.
× 5 hours. In this way, a semiconductor device in which the gap between the semiconductor chip 1 and the auxiliary wiring board 2 is sealed can be obtained as shown in FIG.

If necessary, as shown in FIG. 3 (n), the entire portion of the semiconductor chip 1 excluding the gap may be sealed. The encapsulation is not particularly limited, and examples thereof include liquid casting encapsulation, transfer encapsulation, sheet lamination encapsulation and the like, which are generally applied. The encapsulant used for this encapsulation is also not particularly limited, and examples thereof include general encapsulating epoxy resin compositions and thermoplastic resin films. However, when the entire semiconductor chip 1 is sealed, the epoxy resin composition of the present invention is used to seal the entire semiconductor chip 1 including the gap between the semiconductor chip 1 and the auxiliary wiring board for reasons such as workability efficiency. It is preferable to carry out all at once by transfer sealing or the like.

Then, after the sealing of the gap between the semiconductor chip 1 and the auxiliary wiring board 2 is completed, or after the sealing of the entire semiconductor chip 1 is completed, in the same manner as the metal bumps 211 of the inner electrodes,
By forming solder bumps (not shown) of the outer electrodes 22, the manufacturing of the semiconductor device is completed.

The semiconductor device can be mounted on the circuit board by, for example, a reflow method. In this case, since the external electrodes are composed of solder bumps, the external electrodes of the semiconductor device and the circuit board to be mounted are mounted. Even if there is a slight misalignment between the conductor and the conductor terminal, the position is automatically corrected by the surface tension of the molten solder.

In the method of manufacturing the semiconductor device, the manufacturing procedure is not limited. For example, after forming the cover coat insulating layer 25 and before forming the outer electrode, the semiconductor chip 1 is joined, and the semiconductor chip 1 and the auxiliary wiring board 2 are sealed with resin, and then the cover coat insulating layer 2 is formed.
An outer electrode may be formed on 5.

In addition, a large number of wiring conductors 23 are formed in the longitudinal direction on a belt-shaped synthetic resin film 24, and this film 24
It is also possible to adopt a continuous system in which the above steps are sequentially carried out by a film carrier system while traveling.

Next, in the semiconductor of the present invention, the encapsulation form of the semiconductor chip is not limited to that shown in FIG. 1, and in addition to this, for example, the forms shown in FIGS. can give. In FIG. 5, the same parts as those in FIG. 1 are designated by the same reference numerals.

First, in the semiconductor device shown in FIG.
The gap between the semiconductor chip 1 and the auxiliary wiring board 2 is sealed with the cured body 3 of the epoxy resin composition of the present invention, and the side opposite to the lateral edge portion of the semiconductor chip 1 or the circuit formation surface (see the semiconductor in the same figure). The upper surface of the chip) is sealed with silicone resin 32. Further, in the semiconductor device shown in FIG.
The gap between the semiconductor chip 1 and the auxiliary wiring board is sealed with the cured body 3 of the epoxy resin composition of the present invention, and the side of the semiconductor chip 1 opposite to the side on which the circuit is formed or the adhesive sheet 33 (eg, , An adhesive sheet using an epoxy-rubber-based resin as an adhesive agent is adhered and sealed. The semiconductor device shown in FIG. 7C is the same as the semiconductor device shown in FIG. 2B, except that the surface of the semiconductor chip 1 opposite to the circuit formation surface is partially exposed. With this, the heat dissipation of the semiconductor chip is improved. In addition, in the semiconductor device shown in FIGS. 4D and 4E, the reinforcing frame 34 (made of synthetic resin or metal) is fixed.

Further, in the semiconductor device of the present invention, in order to improve the heat dissipation of the semiconductor chip, FIG.
It is also possible to take the form as shown in (d). Specifically, the surface of the semiconductor chip 1 opposite to the surface on which the circuit is formed is exposed or a heat radiation fin is used. In addition,
In the figure, the same parts as those in FIG. 1 are designated by the same reference numerals.

First, in the semiconductor device shown in FIG.
The surface of the semiconductor chip 1 opposite to the circuit forming surface is completely exposed. In the semiconductor device shown in FIG. 2B, a heat conductive adhesive is applied to the surface of the semiconductor chip 1 opposite to the circuit forming surface. The radiation fin 35 is attached by 36. Further, in the semiconductor device shown in FIG.
A heat spreader 35 'is attached by a sealing resin 3 to the surface opposite to the circuit forming surface. In the semiconductor device shown in FIG. 4D, the inner metal filling hole 371 that does not contact the electrode of the semiconductor chip 1 and the filling metal 3 are formed.
An inner conductor 372 (different from the lead-out conductor) thermally connected to 71, an outer metal filling hole 373 and a metal bump 374 thermally connected to the inner conductor 372 are provided, and a heat transfer path formed by these The heat generated by the semiconductor chip 1 is radiated through the through. In addition, as shown by the dotted line in the figure (d), the conductor (copper foil) 24a is separated from the routing conductor 24 by a predetermined insulating gap.
It is effective as a heat radiating means of the semiconductor chip to leave as many as possible and use the remaining conductor 24a as a heat spreader or to provide a heat radiation dummy.

[0052]

As described above, the semiconductor device of the present invention is a cured product of an epoxy resin composition using the allylphenol resin represented by the general formula (1) as a curing agent.
At least the gap between the semiconductor chip and the wiring auxiliary plate is sealed. Due to the action of the curing agent, the cured product of the epoxy resin composition is firmly adhered to the semiconductor chip and the auxiliary wiring board. Therefore, for example, even if the semiconductor device of the present invention is exposed to severe temperature change conditions such as a thermal cycle test, breakage or the like of the electrical connection between the semiconductor chip and the auxiliary wiring board is prevented, and water or Invasion of ions and the like into the semiconductor device is also prevented. That is, the semiconductor device of the present invention has extremely high reliability because the semiconductor chip circuit formation surface and the electrical connection portions are sufficiently protected by the cured body of the epoxy resin composition.

In the semiconductor device of the present invention, if the inner electrode of the auxiliary wiring board is a protruding metal bump,
It is not necessary to use an expensive flip chip, an inexpensive general semiconductor chip can be used, and the cost of the semiconductor device can be reduced.

Next, examples will be described together with comparative examples.

[0055]

Example 1 A semiconductor device was manufactured by the method described above. That is, a carrier film (auxiliary wiring board) having gold bumps (height: 50 μm) electrically connected to the copper circuit was prepared on the surface of a polyimide film having a copper circuit pattern formed on the back surface. The thickness of this carrier film is 60 μm. Then, on this carrier film, a semiconductor chip for reliability evaluation (15.0 mm × 15.
0mm × thickness 0.375mm) mounted and thermocompression bonded (30mm
Bump connection was performed at 0 ° C. The bump height after the bump connection is 20 μm.

On the other hand, a bisphenol A type epoxy resin (epoxy equivalent: 180) and an allylphenol novolac resin A represented by the following general formula (2) (hydroxyl equivalent:
142) and 2-methylimidazole (curing accelerator) were mixed to prepare a liquid epoxy resin composition. The blending ratio is as shown in Table 1 below.

[0057]

Embedded image

Then, the above liquid epoxy resin composition is
Using a dispenser, it was injected into the gap between the semiconductor chip and the carrier film, and a curing reaction was performed under the condition of 175 ° C. × 5 hours to manufacture a semiconductor device as shown in FIG. As shown in the figure, this semiconductor device has a semiconductor chip 1
Only the gap between the carrier film 2 and the carrier film 2 is sealed with the cured body 3 of the epoxy resin composition. The package size of this semiconductor device is 17.0 mm × 17.0.
mm × thickness 0.450 mm.

The epoxy resin composition was applied to the surface of the carrier film and then cured to form a resin layer (thickness: 2 mm), which was used as a test sample for measuring the adhesive strength.

[0060]

Example 2 A bisphenol A type epoxy resin (epoxy equivalent: 180) and an allylphenol novolac resin B (hydroxyl equivalent: 14) represented by the following general formula (3).
2) and 2-methylimidazole (curing accelerator) were mixed to prepare a liquid epoxy resin composition. The blending ratio is as shown in Table 1 below.

[0061]

[Chemical 4]

Other than the above, a semiconductor device [see FIG. 7A] and a test sample for measuring the adhesive force were prepared in the same manner as in Example 1.

[0063]

Example 3 In the same manner as in Example 1, a semiconductor device was produced in which only the gap between the semiconductor chip and the carrier film was sealed. Then, the entire surface of the semiconductor chip excluding this gap is overmolded by transfer molding (condition: 175 ° C. × 2 minutes, post cure 175 ° C. × 5 hours) using the epoxy resin composition shown in Table 2 below. A semiconductor device as shown in FIG. 7B was manufactured. In the figure, the same parts as those in FIG. 1 are designated by the same reference numerals.

[0064]

COMPARATIVE EXAMPLE 1 In Example 1, a semiconductor device was manufactured without sealing the gap between the semiconductor chip and the carrier film. That is, a semiconductor chip for reliability evaluation is mounted on a carrier film having gold bumps (height 50 μm) electrically connected to the copper circuit on the front surface of a polyimide film having a copper circuit pattern formed on the back surface, Thermocompression bonding (3
Bump connection was performed at 00 ° C.) to manufacture a semiconductor device.

[0065]

Comparative Example 2 A liquid epoxy resin composition is prepared by mixing bisphenol A type epoxy resin (epoxy equivalent: 180), methylhexahydrophthalic anhydride (hydroxyl equivalent: 162) and 2-methylimidazole (curing accelerator). did. The blending ratio is as shown in Table 1 below.

Other than the above, a semiconductor device [see FIG. 7A] and a test sample for measuring the adhesive force were prepared in the same manner as in Example 1.

[0067]

[Table 1]

[0068]

[Table 2]

Using the semiconductor devices and test samples of Examples 1 to 3 and Comparative Examples 1 and 2 thus obtained, the reliability and adhesive strength of the semiconductor devices were evaluated. The results are shown in Table 3 below. The above reliability and adhesive strength are
It evaluated as follows.

[Reliability] The semiconductor device was subjected to a pressure cooker test (PCT) in saturated steam at 121 ° C., and the occurrence of conduction failure after 200 hours of PCT was examined. Then, the number of occurrence of conduction failure for 100 semiconductor devices used in the test was defined as the conduction failure rate.

[Adhesive Strength] The adhesive strength was measured by a 90 ° peel test. That is, as shown in FIG. 7C, in the test sample for measuring the adhesive force, the carrier film 2 is peeled from the resin layer 3 at an angle of 90 degrees to measure the peel strength. did.

[0072]

[Table 3]

From Table 3 above, it can be seen that the epoxy resin composition containing the allylphenol resin as the curing agent firmly adheres to the carrier film. Further, in the semiconductor device of the example, the rate of occurrence of conduction failure was extremely low, and particularly in the semiconductor device of example 3 in which the entire semiconductor chip was sealed, no conduction failure occurred. On the other hand, in the semiconductor device of Comparative Example 1 in which the gap between the semiconductor chip and the carrier film was not sealed, the conduction failure rate was 95.
% Was extremely high. Further, from the results of Comparative Example 2, the epoxy resin composition using a general phenol resin as a curing agent has a low adhesive force to the carrier film, and the semiconductor device using the epoxy resin composition has a high conduction failure rate of 78%. It was

[Brief description of drawings]

1A is a sectional view showing an embodiment of a semiconductor device of the present invention, and FIG. 1A is a sectional view showing another embodiment of the semiconductor device of the present invention. ′ ′) Is
It is sectional drawing which shows the other Example of the semiconductor device of this invention, (B) is a partially cutaway perspective view of the said Example of the semiconductor device of this invention.

FIG. 2 is a partial cross-sectional view showing an example of a semiconductor device of the present invention in which an auxiliary wiring board piece has a multi-layer structure.

FIG. 3A is a configuration diagram showing a state in which a routing conductor is formed in an insulating layer, FIG. 3B is a configuration diagram showing a state in which holes are drilled in the insulating layer, and FIG. It is a block diagram showing a state in which the hole is filled with metal, (d) is a block diagram showing a state in which a metal bump is formed on the end face of the filled metal,
(E) is a configuration diagram showing a state in which insulating layers are laminated,
(H) is a configuration diagram showing a state where holes are drilled in the insulating layer, (G) is a configuration diagram showing a state where the holes are filled with metal, and (H) is a plate surface of the auxiliary wiring board piece. FIG. 3 is a structural diagram showing a state in which a semiconductor chip is mounted on the semiconductor chip, (i) is a configuration diagram showing only a gap between the semiconductor chip and the auxiliary wiring board, and (n) is a diagram showing the entire semiconductor chip. It is a block diagram which shows the sealed state.

FIG. 4 is a configuration diagram showing an example of alignment.

5A is a configuration diagram showing one mode of sealing the semiconductor device of the present invention, and FIG. 5B is a configuration diagram showing another mode of sealing the semiconductor device of the present invention. , (C)
Is a configuration diagram showing another mode of sealing the semiconductor device of the present invention, (d) is a configuration diagram showing another mode of sealing the semiconductor device of the present invention, and (e) is It is a block diagram which shows the other form of sealing of the semiconductor device of this invention.

FIG. 6A is a configuration diagram showing an example of the heat dissipation means of the semiconductor device of the present invention, and FIG. 6B is a configuration diagram showing another example of the heat dissipation means of the semiconductor device of the present invention. FIG. 7A is a configuration diagram showing another example of the heat radiation means of the semiconductor device of the present invention, and FIG. 8D is a configuration diagram showing another example of the heat radiation means of the semiconductor device of the present invention.

7A is a configuration diagram showing an embodiment of a semiconductor device of the present invention, FIG. 7B is a configuration diagram showing another embodiment of the semiconductor device of the present invention, and FIG. [Fig. 3] is an explanatory view showing a state of measuring an adhesive force.

FIG. 8 is a configuration diagram showing a configuration of a conventional semiconductor device.

[Explanation of symbols]

 1 Semiconductor Chip 2 Auxiliary Wiring Board 3 Cured Body of Epoxy Resin Composition

Front page continued (72) Inventor ▲ Yoshi ▼ Nobuhiko Oo 1-2-2 Shimohozumi, Ibaraki City, Osaka Prefecture Nitto Electric Works Co., Ltd. (72) Hideyuki Usui 1-2-1 Shimohozumi, Ibaraki City, Osaka Prefecture Nitto Denko Co., Ltd. (72) Inventor Hisaki Ito 1-2, Shimohozumi, Ibaraki City, Osaka Prefecture Nitto Denko Corporation

Claims (6)

[Claims] 1. A semiconductor chip provided with electrodes is mounted on a plate surface of an auxiliary wiring board with a predetermined gap therebetween with the electrode sides facing each other, and a routing conductor is arranged inside the auxiliary wiring board. One end of the routing conductor is formed on the inner electrode exposed from the semiconductor chip mounting side surface of the auxiliary wiring board, and the other end of the routing conductor is opposite to the semiconductor chip mounting side of the auxiliary wiring board. Formed on the outer electrode exposed from the surface, the inner electrode and the electrode of the semiconductor chip are bonded, and at least the gap between the semiconductor chip and the auxiliary wiring board is sealed with a cured body of the resin composition. A semiconductor device, wherein the resin composition has the following (A) to (C):
A semiconductor device comprising an epoxy resin composition containing: (A) Epoxy resin (B) Allylphenol resin represented by the following general formula (1) (C) curing accelerator 2. The semiconductor device according to claim 1, wherein the inner electrode of the auxiliary wiring board is formed on a metal bump protruding from a surface of the auxiliary wiring board on which a semiconductor chip is mounted. 3. The semiconductor device according to claim 1, wherein the area of the board surface of the auxiliary wiring board is 200% or less of the area of the semiconductor chip on the electrode side. 4. The semiconductor device according to claim 1, wherein the area of the board surface of the auxiliary wiring board is the same as the area of the semiconductor chip on the electrode side. 5. The auxiliary wiring board has a multi-layer structure in which insulating layers are laminated, and the routing conductor is arranged between layers of the insulating layers. Semiconductor device. 6. The semiconductor device according to claim 5, wherein the insulating layer is an insulating layer made of a polyimide film.