JP2001068604A - Fixing resin, anisotropic conductive resin, semiconductor device and manufacture thereof, circuit board and electronic equipment - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent a crack from being caused in a semiconductor chip at the time of a cure shrinkage of a fixing resin and at the time of an application of a thermal stress to the chip, by a method wherein the fixing resin for fixing the chip is mounted on a substrate and a hollow filler is made to contain in the fixing resin. SOLUTION: A plurality of wirings 22 are formed on the surface on one side of the surfaces of a substrate 20 to constitute a wiring pattern. Lands 24 and 26 are respectively formed on both ends of the respective wirings 22 of the wiring pattern, and those lands 24 and 26 are formed in a width wider than that of the connection part between the lands 24 and 26. A resin 32 using a thermoplastic rubber, silicone, polyimide, an epoxy system having thermosetting property or the like is provided on the wiring pattern, and moreover, a hollow filler 35 is mixed into the resin 32. As a result, the reliability of a semiconductor device to a temperature stress can be rapidly enhanced.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device and a method of manufacturing the same, a circuit board, and an electronic device.

[0002]

2. Description of the Related Art In the process of assembling a semiconductor device, a resin may be provided on a wiring pattern formed on a substrate. For example, in face-down mounting, a resin is filled between a semiconductor chip and a substrate to eliminate a gap and improve reliability. The resin is provided by being heated once, and is cooled and hardened. For this resin, a method of using silica as a filler to bring the coefficient of thermal expansion close to that of a semiconductor chip has been used in some cases. Since the resin mixed with silica has a high melting point and a low coefficient of thermal expansion without absorption of water, the apparent glass transition temperature Tg increases, the heat resistance improves, the water absorption of the resin decreases, Since the coefficient of expansion is reduced, it can be improved so as to be suitable for sealing a semiconductor chip. However, when silica is used as a filler, silica has a low coefficient of thermal expansion but is hard (has a high Young's modulus), so the apparent Young's modulus of the mixed resin also increases, and the internal stress generated is reduced. In some cases, the semiconductor chip was cracked during curing shrinkage or thermal stress application.

[0003]

SUMMARY OF THE INVENTION The present invention has been made to solve this problem, and an object of the present invention is to provide a highly reliable semiconductor device in which a semiconductor chip is not cracked at the time of curing shrinkage or application of thermal stress. It is to provide a manufacturing method, a circuit board, and an electronic device.

[0004]

Means for Solving the Problems (1) A fixing resin according to the present invention is a fixing resin for fixing a semiconductor chip mounted on a substrate, and the fixing resin contains a hollow filler. It is characterized by having.

According to the present invention, since the fixing resin containing the hollow filler is liable to deform itself, the internal stress generated between the semiconductor chip and the substrate at the time of curing shrinkage or application of thermal stress is small. No cracks in the semiconductor chip.

(2) The fixing resin according to the present invention is characterized in that in addition to (1), the fixing resin contains particles having conductivity.

According to the present invention, in addition to the above, the conductive connection is maintained between the semiconductor chip and the substrate with the conductive particles interposed therebetween, so that the electrical connection is maintained. The conductive particles absorb the difference in thermal expansion between the semiconductor chip and the substrate, and also significantly improve the bonding reliability of the semiconductor device.

(3) The anisotropic conductive resin according to the present invention is a fixing resin for fixing a semiconductor chip mounted on a substrate, wherein the fixing resin includes a hollow filler and the semiconductor chip. And conductive particles for electrically connecting the electrode formed on the substrate to the wiring pattern formed on the substrate.

According to the present invention, in addition to the above, since the conductive particles continue to be held between the electrodes of the semiconductor chip and the wiring patterns of the substrate by interposing the conductive particles, the electrical connection portion is The conductive particles are crushed by the pressure, current flows only there, and the conductive particles remain in the same shape except at the place of electrical connection, so that the insulation property is maintained. The conductive particles absorb the difference in thermal expansion between the semiconductor chip and the substrate, and also significantly improve the bonding reliability of the semiconductor device.

(4) A semiconductor device according to the present invention includes a semiconductor chip, a substrate on which a wiring pattern is formed, and a resin provided between the semiconductor chip on the wiring pattern. Contains a hollow filler.

According to the present invention, since the hollow filler itself is easily deformed, the internal stress generated between the semiconductor chip and the substrate at the time of curing shrinkage or application of thermal stress is small, and the semiconductor chip is not cracked. Absent.

(5) Further, in the semiconductor device according to the present invention, in addition to (4), the hollow filler is formed of silica.

According to the present invention, since the thermal expansion coefficient of silica is low, the internal stress generated between the semiconductor chip and the substrate at the time of curing shrinkage or application of thermal stress is further reduced, and the semiconductor chip does not crack.

(6) Further, in the semiconductor device according to the present invention, in addition to (4), the hollow filler is formed of glass.

According to the present invention, since the thermal expansion coefficient of glass is low, the internal stress generated between the semiconductor chip and the substrate at the time of curing shrinkage or application of thermal stress is further reduced, and the semiconductor chip does not crack. Further, since the price of glass is low, the increase in the price of the semiconductor device according to the present invention can be suppressed.

(7) Further, the semiconductor device according to the present invention comprises:
In addition to (4) to (6), the semiconductor chip is face-down mounted using the resin.

According to the present invention, the internal stress generated between the semiconductor chip and the substrate at the time of curing shrinkage or thermal stress application is small, so that the semiconductor chip is not cracked, and the wiring of the electrode of the semiconductor chip and the wiring of the substrate For a structure in which the pattern must maintain direct electrical connection (face-down structure), for various stresses applied from the outside after assembling the semiconductor device, the hollow filler absorbs the stress, The joining reliability of the semiconductor device is also significantly improved.

(8) Further, in the semiconductor device according to the present invention, in addition to (7), the resin comprises an anisotropic conductive material containing conductive particles, and the semiconductor chip comprises the anisotropic conductive material. It is mounted face down using a conductive material.

According to the present invention, in addition to the above, since the conductive particles continue to be maintained between the electrodes of the semiconductor chip and the wiring pattern of the substrate by interposing conductive particles, the electrical connection portion is The conductive particles are crushed by the pressure, current flows only there, and the conductive particles remain in the same shape except at the place of electrical connection, so that the insulation property is maintained. The conductive particles absorb the difference in thermal expansion between the semiconductor chip and the substrate, and also significantly improve the bonding reliability of the semiconductor device.

(9) A circuit board according to the present invention has the semiconductor device of (4) to (8) mounted thereon.

According to the present invention, since the reliability of the semiconductor device of (4) to (8) is high, the reliability of the circuit board on which the semiconductor device is mounted is also high.

(10) The electronic device according to the present invention is (4)
To (8).

According to the present invention, since the reliability of the semiconductor device of (4) to (8) is high, the reliability of the electronic equipment provided with the semiconductor device is also high.

(11) The method of manufacturing a semiconductor device according to the present invention is characterized in that a hollow is formed on the wiring pattern of the substrate on which the wiring pattern electrically connected to the electrode of the semiconductor chip is formed or on the electrode of the semiconductor chip. Providing a resin containing the filler, positioning the electrode of the semiconductor chip with the wiring pattern, and curing the resin.

According to the present invention, the internal stress generated between the semiconductor chip and the substrate at the time of curing shrinkage or application of thermal stress is small, so that the semiconductor chip does not crack and the electrode of the semiconductor chip and the wiring between the substrate and the substrate are not damaged. For a structure in which the pattern must maintain direct electrical connection (face-down structure), for various stresses applied from the outside after assembling the semiconductor device, the hollow filler absorbs the stress, The joining reliability of the semiconductor device is also significantly improved.

(12) In the method of manufacturing a semiconductor device according to the present invention, in addition to (11), the resin is a thermosetting resin, and the step of curing is performed by a heating step.

According to the present invention, since a thermosetting resin is used, a semiconductor device can be manufactured by a general-purpose thermocompression-type face-down device, so that manufacturing costs can be reduced.

(13) In the method of manufacturing a semiconductor device according to the present invention, in addition to (11), the resin is a photocurable resin, and the curing step is performed by a light irradiation step.

According to the present invention, a semiconductor device can be manufactured without thermally damaging the semiconductor chip, and thus the reliability of the semiconductor device is significantly improved.

(14) In the method of manufacturing a semiconductor device according to the present invention, in addition to (12) and (13), the resin is an adhesive and contains conductive particles to form an anisotropic conductive material. The semiconductor chip is face-down mounted using the anisotropic conductive material.

According to the present invention, in addition to the above, since the conductive particles continue to be held between the electrodes of the semiconductor chip and the wiring pattern of the substrate by interposing conductive particles, the electrical connection portion is The conductive particles are crushed by the pressure, current flows only there, and the conductive particles remain in the same shape except at the place of electrical connection, so that the insulation property is maintained. The conductive particles absorb the difference in thermal expansion between the semiconductor chip and the substrate, and also significantly improve the bonding reliability of the semiconductor device.

[0032]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a diagram showing a semiconductor device according to an embodiment of the present invention. The semiconductor device 1 includes a semiconductor chip 10 and a substrate 20. A plurality of electrodes 12 are formed on one surface (active surface) of the semiconductor chip 10.
A bump 14 is provided on the electrode 12 by a solder ball, a gold wire ball, gold plating, or the like. Electrode 1
2 itself may be in the shape of a bump. Nickel, chromium, titanium, or the like may be added between the electrode 12 and the bump 14 as a diffusion preventing layer for the bump metal. The bumps 14 may be formed not on the semiconductor chip 10 side but on a part (for example, the land portion 24) of the wiring pattern 21 of the substrate 20.

The overall shape of the substrate 20 is not particularly limited, but may be similar to the planar shape of the semiconductor chip 10. The thickness of the substrate 20 is often determined by its material, but is not limited thereto. The substrate 20 may be formed of any of an organic or inorganic material, and may be formed of a composite structure thereof, but is preferably punched out. Punching a tape-shaped flexible substrate made of an organic material into a substrate 2
0 can be formed.

FIG. 2 is a plan view of the substrate of the semiconductor device shown in FIG. As shown in FIGS. 1 and 2, a plurality of wirings (leads) 22 are formed on one surface of the substrate 20.
The wiring pattern 21 is configured. Each wiring 22
Are formed at both ends. In many cases, the lands 24 and 26 are formed to have a larger width than a portion connecting them. One land 24 is formed on the substrate 20 at a position near the end of the semiconductor device as a final product, and the other land 26
May be formed at a position near the center of the substrate 20. A plating lead for electroplating may extend from the wiring pattern 21 toward the end of the substrate 20.

The substrate 20 has a plurality of through holes 28 formed therein. One of the wirings 22 passes through each through hole 28. The end of the wiring 22 may be located on the through hole 28. When the land 26 is formed at the end of the wiring 22, the land 26 is located on the through hole 28.

A plating layer 30 is formed on the wiring pattern 21 by plating. Plating layer 30
Is formed on the surface of the wiring pattern 21 opposite to the surface to be bonded to the substrate 20. The plating layer 30 is also formed in a region inside the through hole 28 on the bonding surface of the wiring pattern 21 with the substrate 20. Wiring pattern 2
1 may be formed of copper, and the plating layer 30 may be formed of nickel, gold, solder, or tin. By forming the plating layer 30, conductivity is ensured. Specifically, good soldering with external terminals is enabled, and the wiring pattern 2
1 is prevented from being oxidized, and the electrical connection resistance with the bump is reduced. Note that a plating lead (not shown) may be formed by connecting to the wiring pattern 21 and may be subjected to electroplating or electroless plating.

On the wiring pattern 21, a resin 32 is provided. The resin 32 may be an adhesive having an adhesive force such as thermoplastic rubber, silicon, or polyimide, but a thermosetting epoxy resin is often used. this is,
This is because the reliability at high temperatures is often improved. The resin 32 covers and protects the wiring pattern 21 and may be an underfill material. Alternatively, resin 32
Is an anisotropic conductive material containing conductive particles in an adhesive, the anisotropic conductive material is used for electrical connection between the semiconductor chip 10 and the wiring pattern 21. The resin 32 may be a photocurable resin. The hollow filler 35 is mixed in the resin 32. An electrode (or bump) formed on the semiconductor chip and a wiring pattern on the substrate continue to be connected by a contraction force such as curing of the resin 32 while maintaining an electrical connection.

The hollow filler preferably has a low coefficient of thermal expansion. Examples of the material include hollow glass beads and silica manufactured by Toshiba Barotini Co., Ltd. These fillers may be subjected to a surface treatment such as a silane treatment for increasing the adhesive strength with the resin.

The present embodiment is applicable to a general face-down mounting system in which an active element forming surface of a semiconductor chip 10 and a wiring pattern 21 of a substrate 20 are opposed to each other.
The method using an anisotropic conductive material as shown in the above, the method of heating (pressing if necessary) a semiconductor chip with solder bumps, the method of heating and
The present invention can also be applied to a method of applying pressure (ultrasonic bonding if necessary) or a method of face-down bonding using a curing shrinkage force of a resin. This is the same in the following embodiments.

In the present embodiment, the hollow filler 35 is mixed into the resin 32. Generally, for the purpose of improving the properties of the resin, the filler mixed into the resin is often a resin for electronic parts. For example, glass-like silica is often used as a sealing resin for sealing a semiconductor chip. Since the resin mixed with silica has a high melting point and a low coefficient of thermal expansion without absorption of water, the apparent glass transition temperature Tg increases, the heat resistance improves, the water absorption of the resin decreases, Since the coefficient of expansion is reduced, it can be improved so as to be suitable for sealing a semiconductor chip. further,
In the present embodiment, since the resin filled with the hollow filler 35 is disposed between the semiconductor chip and the wiring board while inheriting the characteristics, the filler itself can be deformed,
The apparent Young's modulus does not increase, and it absorbs the extra stress generated during the resin curing process and the stress applied from outside. Under this condition, for example, external stress applied in a temperature cycle can be absorbed.

In general, the coefficient of thermal expansion of a resin rapidly increases when the temperature exceeds the glass transition temperature, and the adhesive strength often decreases rapidly. As a result, when the temperature falls from the maximum temperature Th in the process exceeding the glass transition temperature Tg to the glass transition temperature Tg, the resin may be peeled off due to low adhesive strength. For example, in order to melt solder when a completed semiconductor device is mounted on a circuit board, the semiconductor device may be exposed to a high temperature in a reflow process. Alternatively, in the manufacturing process of the semiconductor device, the resin 32 is exposed to a high temperature equal to or higher than the glass transition temperature Tg in order to soften the resin 32,
It may be unavoidable that the resin 32 is exposed to a high temperature in order to melt a member such as solder.

In the present embodiment, since the resin 32 contains the hollow filler 35, the apparent coefficient of thermal expansion is greatly reduced as compared with the resin before mixing, so that the glass transition temperature Tg exceeds the glass transition temperature Tg. When the temperature decreases to the temperature Tg, the force generated by the contraction of the volume can be made smaller than the adhesive force to the wiring pattern 21.

The shrinkage volume is reduced, and the resulting force (eg, the force that causes the wiring pattern and the resin to peel) is also reduced. By doing so, the adhesiveness between the wiring pattern 21 and the resin 32 is improved, so that the formation of a gap due to peeling can be prevented and the accumulation of moisture can be prevented.

The semiconductor chip 10 may be mounted face down on the substrate 20 (as shown in FIG. 1, a mounting method in which the active surface of the semiconductor chip and the substrate face each other). The bumps 14 of the semiconductor chip 10 and the wiring patterns 21 formed on the substrate 20 are electrically connected. The lands 24, 2
When 6 is formed, one land portion 24 and bump 14 are electrically connected. When the resin 32 is an anisotropic conductive material in which an adhesive further contains conductive particles, the conductive particles are
4 to achieve electrical continuity. The anisotropic conductive material may be an anisotropic conductive film or an anisotropic conductive adhesive.

External terminals 34 are electrically connected to the wiring pattern 21. The external terminal 34 is often a solder ball, but may be a conductive protrusion such as plating or conductive resin. The external terminal 34 is connected to the through hole 28.
It can be electrically connected to the wiring pattern 21 via the conductive member inside. An external terminal 34 may be provided directly on the wiring pattern 21 by filling the through hole 28 with a conductive member such as solder. A second wiring that is electrically connected to the wiring pattern 21 via the through hole 28 may be formed on the other surface of the substrate 20, and an external terminal may be provided on the second wiring. In this case, the substrate 20 is a double-sided substrate since wiring is formed on both surfaces. Further, the substrate 2
As 0, a multilayer substrate or a build-up type substrate may be used. When a build-up type substrate or a multi-layer substrate is used, if the wiring pattern 21 is formed on a beta land layer extending in a plane, a microstrip structure without an extra wiring pattern is obtained, so that signal transmission characteristics are further improved. be able to.

FIG. 1 shows a FAN-type in which the wiring pattern 21 is formed only in the mounting area of the semiconductor chip 10 and the external terminal 34 is provided only in the mounting area of the semiconductor chip 10.
Although an IN type semiconductor device is shown, the present invention is not limited to this. For example, the FAN-OUT in which the wiring patterns 21 are drawn out of the semiconductor chip 10 and the external terminals 34 are provided only outside the mounting area of the semiconductor chip 10 is provided.
The present invention can also be applied to a semiconductor device of the FAN-IN / OUT type in which the FAN-IN type is combined with the semiconductor device of the FAN-IN type. In addition, FAN-OUT type or FA
In an N-IN / OUT type semiconductor device, a stiffener may be attached to the outside of the semiconductor chip with a resin covering the wiring pattern.

In addition to the above-described embodiments, before mounting the semiconductor chip, one or more holes (for example, a long hole) are preferably partially or preferably not less than half of the outer position of the semiconductor device.
May be formed, and after mounting the semiconductor chip, the remaining portion (for example, a portion between a plurality of holes) of the outer shape position may be punched.

In this embodiment, the semiconductor chip is a BGA
(Ball Grid Array) Although the example of face-down mounting (mounting in which the active element forming surface of the semiconductor chip is opposed to the wiring pattern of the substrate) to the substrate is described above, the semiconductor chip is simply mounted face-down to the substrate. This form can be applied to all.

In this embodiment, the face-down mounting of the semiconductor chip and the substrate has been described. However, even in the mounting method using the wire bonding, the semiconductor chip and the substrate or the die pad of the lead frame can be bonded. Exactly the same resin can be applied to the die bond material used. The die bond material is an insulating resin type that is used to simply bond a semiconductor chip to a substrate or a die pad of a lead frame, and electrically connects a die to a substrate or a die pad of a lead frame. A conductive resin type in which conductive metal powder is mixed for the purpose of improving heat dissipation is known, and by mixing a hollow filler in either resin, the size of a semiconductor chip increases. The reliability defect caused by resin stress such as chip crack at die bonding and external stress can be avoided in the same manner as described above.

The present embodiment is configured as described above, and its manufacturing method will be described below.

The above-described substrate 20 can be formed by punching a substrate (base material) larger than that. For example, a plurality of wiring patterns 21 corresponding to a plurality of substrates 20
Is prepared, and a plurality of substrates 20 can be obtained by punching out the tape carrier. The wiring pattern 21 formed on the tape carrier is preferably plated with gold or the like.

The resin 32 containing the hollow filler 35 is provided on the wiring pattern 21 of the substrate 20. For example, resin 3
When 2 is an anisotropic conductive material, a resin 32 is provided between the substrate 20 and the semiconductor chip 10. At this time or thereafter, a step of heating the resin 32 to a temperature above the glass transition temperature may be performed, and then a step of cooling to a temperature equal to or lower than the glass transition temperature may be performed. Even in such a case, when the temperature decreases from the maximum temperature Th in the heating step to the glass transition temperature Tg, the force generated by the contraction of the resin 32 is smaller than the adhesive force of the resin 32 to the wiring pattern 21. As a result, separation does not occur between the resin 32 and the wiring pattern 21.

Then, the semiconductor device 1 can be manufactured by including the step of mounting the semiconductor chip 10 on the substrate 20 and the step of providing the external terminals 34. When the resin 32 is a photocurable resin, the semiconductor chip 10 is mounted on the substrate 20 by irradiating light instead of heating. If the energy applying means by light is used, thermal damage to the semiconductor chip 10 can be avoided.

FIG. 4 shows a circuit board 50 on which the semiconductor device 1 according to the present embodiment is mounted. Circuit board 5
For 0, an organic substrate such as a glass epoxy substrate is generally used. A wiring pattern 52 made of, for example, copper is formed on the circuit board 50 so as to form a desired circuit, and the electrical connection between the wiring pattern and the external terminal 34 of the semiconductor device 1 is made by mechanical connection. Conduct continuity.

To mount the semiconductor device 1 on the circuit board 50, the semiconductor device 1 is mounted on the wiring pattern 52 of the circuit board 50.
The reflow process may be performed with the external terminal 34 of the above. Then, the wiring patterns 52 and the external terminals 34 are electrically connected by heating and melting the external terminals 34. According to the present embodiment, the resin 32 and the wiring pattern 2
No delamination occurs between them.

FIG. 5 shows a notebook personal computer as the electronic apparatus 60 having the semiconductor device 1 to which the present invention is applied.

It should be noted that the constituent element "semiconductor chip" of the present invention is replaced with an "electronic element", and an electronic element (whether an active element or a passive element) is mounted on a substrate in the same manner as the semiconductor chip. Parts can also be manufactured. Electronic components manufactured using such electronic elements include, for example, resistors, capacitors, coils, oscillators, filters, temperature sensors, thermistors, varistors, volumes, or fuses.

[0059]

According to the present invention, since a hollow filler is mixed in a resin placed between a semiconductor chip and a wiring board, the filler itself can be deformed, the apparent Young's modulus does not increase, and the resin hardens. It absorbs the extra stress generated during the process and the stress applied from outside. With this, for example, it is possible to absorb the external stress applied in the temperature cycle, and the chip is not cracked at the time of curing shrinkage or thermal stress application, and the reliability of the semiconductor device against the temperature stress is dramatically improved. Can be enhanced.

Further, in the present embodiment, since the resin has mixed therein a hollow filler, the apparent coefficient of thermal expansion is greatly reduced. Therefore, the temperature is changed from the maximum temperature Th exceeding the glass transition temperature Tg to the glass transition temperature Tg. When lowering, the force caused by the contraction of the volume can be smaller than the adhesive force to the wiring pattern. The shrinkage volume is reduced, and the resulting force (for example, the force that causes separation of the wiring pattern and the resin) is also reduced. By doing so, the adhesiveness between the wiring pattern and the resin is improved,
The formation of gaps due to peeling can be prevented to prevent the accumulation of moisture, and the reliability of the semiconductor device against humidity stress can be dramatically increased.

Further, since the hollow filler has an external shock absorbing property, the reliability of the semiconductor device against external shock stress can be drastically improved.

[Brief description of the drawings]

FIG. 1 is a diagram showing a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a diagram illustrating a substrate of the semiconductor device according to the embodiment of the present invention;

FIG. 3 is a diagram illustrating a circuit board on which the semiconductor device according to the present embodiment is mounted;

FIG. 4 is a diagram illustrating an electronic apparatus including the semiconductor device according to the embodiment of the present invention;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Semiconductor chip 11 Electrode 12 Substrate 13 Wiring pattern 32 Resin 35 Hollow filler

Claims (14)

[Claims] 1. A fixing resin for fixing a semiconductor chip mounted on a substrate, wherein the fixing resin contains a hollow filler. 2. The fixing resin according to claim 1, wherein the fixing resin contains particles having conductivity. 3. A fixing resin for fixing a semiconductor chip mounted on a substrate, wherein the fixing resin includes a hollow filler, an electrode formed on the semiconductor chip, and an electrode formed on the substrate. Anisotropic conductive resin, comprising conductive particles so as to be electrically connected to the wiring pattern. 4. A semiconductor chip, a substrate on which a wiring pattern is formed, and a resin provided between the semiconductor chip on the wiring pattern, wherein the resin contains a hollow filler. Semiconductor device. 5. The semiconductor device according to claim 4, wherein
The semiconductor device, wherein the filler is formed of silica. 6. The semiconductor device according to claim 4, wherein
The semiconductor device, wherein the filler is formed of glass. 7. The semiconductor device according to claim 4, wherein said semiconductor chip is face-down mounted using said resin. 8. The semiconductor device according to claim 7, wherein the resin comprises an anisotropic conductive material containing conductive particles, and the semiconductor chip is face-down mounted using the anisotropic conductive material. Semiconductor device. 9. A circuit board on which the semiconductor device according to claim 4 is mounted. 10. An electronic apparatus comprising the semiconductor device according to claim 4. 11. A step of providing a resin containing a hollow filler between a semiconductor chip and a substrate, and a step of aligning an electrode formed on the semiconductor chip with a wiring pattern formed on the substrate. And a step of curing the resin. 12. The method for manufacturing a semiconductor device according to claim 11, wherein the resin is a thermosetting resin, and the resin is cured by heating. 13. The method of manufacturing a semiconductor device according to claim 11, wherein the resin is a photocurable resin, and the resin is cured by light irradiation. 14. The method of manufacturing a semiconductor device according to claim 12, wherein said resin is made of an anisotropic conductive material containing conductive particles, and said semiconductor chip is made of said anisotropic conductive material. A method for manufacturing a semiconductor device to be mounted face down using a material.