JPH0951018A - Semiconductor device and its manufacturing method - Google Patents

Semiconductor device and its manufacturing method

Info

Publication number
JPH0951018A
JPH0951018A JP7203563A JP20356395A JPH0951018A JP H0951018 A JPH0951018 A JP H0951018A JP 7203563 A JP7203563 A JP 7203563A JP 20356395 A JP20356395 A JP 20356395A JP H0951018 A JPH0951018 A JP H0951018A
Authority
JP
Japan
Prior art keywords
substrate
adhesive
electrode
semiconductor element
anisotropic conductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7203563A
Other languages
Japanese (ja)
Other versions
JP3225800B2 (en
Inventor
Tsuneo Hamaguchi
恒夫 濱口
Akizo Tsuruta
明三 鶴田
Mitsunori Ishizaki
光範 石崎
Kenji Toshida
賢二 利田
Eiichi Hirasawa
栄一 平澤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=16476212&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=JPH0951018(A) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP20356395A priority Critical patent/JP3225800B2/en
Publication of JPH0951018A publication Critical patent/JPH0951018A/en
Application granted granted Critical
Publication of JP3225800B2 publication Critical patent/JP3225800B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00013—Fully indexed content
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01004—Beryllium [Be]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01024—Chromium [Cr]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0105—Tin [Sn]
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/0781—Adhesive characteristics other than chemical being an ohmic electrical conductor
    • H01L2924/07811—Extrinsic, i.e. with electrical conductive fillers
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    • H01L2924/351—Thermal stress
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PROBLEM TO BE SOLVED: To obtain a stable continuity by uniformly squashing conductive particles in an anisotropic conductive adhesive agent when a multi-terminal semiconductor element having a fine connection interval can be connected to a resin substrate with the same area as that of the semiconductor element, and a small and thin type semiconductor device of lightweight is productively provided, and the semiconductor element is electrically connected to a substrate with the use of the anisotropic conductive adhesive agent. SOLUTION: The width of an electrode 4 of a substrate 3 connected to a bump electrode 2 of a semiconductor element 1 is so formed as to be smaller than that of the bump electrode 2, so that, conductive particles are uniformly squashed between the bump electrode 2 and the electrode 4 to obtain a stable continuity. At this time of bump electrode 2 is so pushed that a recessed part 19 is generated on the substrate 3, so that, since unevenness of the surface of the substrate 3 is absorbed, a satisfactory continuity is obtained in any connection part.

Description

【発明の詳細な説明】Detailed Description of the Invention

【０００１】[0001]

【産業上の利用分野】本発明は半導体素子とプリント基
板等の基板の電極同志を異方性導電接着剤で接続するこ
とによって得られる半導体装置およびその製造方法に関
するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device obtained by connecting a semiconductor element and electrodes of a substrate such as a printed circuit board with an anisotropic conductive adhesive and a method of manufacturing the same.

【０００２】[0002]

【従来の技術】電子機器をより小型化するために、パッ
ケージされた半導体素子をプリント基板等の樹脂からな
る基板（以下樹脂基板とする）にはんだ付けする方法か
ら、パッケージしないで裸のまま半導体素子を樹脂基板
に実装する方法にかわってきた。半導体素子を裸のまま
で、樹脂基板に実装する方法として、半導体素子の裏面
を基板に導電性接着剤等で接着し、半導体素子のパッド
電極と樹脂基板の電極とをワイヤで接続する方法があ
る。この方法は半導体素子と樹脂基板の電極を一本一本
ワイヤで接続するため、多数の電極を接続するのに時間
がかかることと、接続される基板の電極を半導体素子の
周辺に配置するため、実装面積が半導体素子のサイズよ
りも大きくとる必要がある。そこで、半導体素子とほぼ
同じ面積で実装する方法として、半導体素子を裏かえし
て、基板電極に直接接続するフリップチップ接続方法が
開発された。その方法として、（１）導電性接着剤を用
いて接続する方法（例えば、日刊工業新聞社発行、表面
実装技術、９月号１９９４年、４８ページ）と（２）は
んだを用いて接続する方法（例えば、工業調査会、１９
８６年６月１日発行、サーフェイス・マウント・テクノ
ロジー、１７２ページ）がある。2. Description of the Related Art In order to reduce the size of electronic equipment, a semiconductor device that is packaged without being packaged is soldered from a method of soldering a packaged semiconductor element to a substrate made of resin such as a printed circuit board (hereinafter referred to as a resin substrate). The method of mounting the element on the resin substrate has been changed. As a method of mounting a semiconductor element on a resin substrate while leaving it bare, a method of bonding the back surface of the semiconductor element to the substrate with a conductive adhesive or the like and connecting the pad electrode of the semiconductor element and the electrode of the resin substrate with a wire is available. is there. In this method, since the semiconductor element and the electrodes of the resin substrate are connected one by one, it takes time to connect many electrodes and the electrodes of the substrate to be connected are arranged around the semiconductor element. The mounting area needs to be larger than the size of the semiconductor element. Therefore, as a method of mounting the semiconductor element in almost the same area as the semiconductor element, a flip chip connection method has been developed in which the semiconductor element is turned over and directly connected to the substrate electrode. As the method, (1) a method of connecting using a conductive adhesive (for example, surface mounting technology, published by Nikkan Kogyo Shimbun, September issue, 1994, p. 48) and (2) a method of connecting using solder (For example, Industrial Research Council, 19
Published June 1, 1986, Surface Mount Technology, p. 172).

【０００３】以下、図面を参照しながら説明する。図１
５は導電性接着剤を用いて接続した半導体装置を示す概
略断面図を示す。図において、１はモールドしていない
半導体素子、２は半導体素子電極上に形成された突起電
極、２４は導電性接着剤、３は樹脂基板、４は樹脂基板
上に形成された電極、２６は封止材を示す。めっきまた
はボールボンダを用いて、半導体素子１の電極上に突起
電極２を形成する。次に、平面板に均一膜厚に形成され
た導電性接着剤層２４に、前記突起電極２を押しつけ、
導電性接着剤２４を前記突起電極２に転写する。次に、
半導体素子１と樹脂基板３を向かい合わせ、前記半導体
素子１の突起電極２と前記樹脂基板３上の電極４との位
置を合わせた後、半導体素子１を樹脂基板２５に押し付
け、前記突起電極２と前記樹脂基板３の電極４を導電性
接着剤２４を介して、接触させる。次に、約１５０℃に
数時間加熱して、導電性接着剤２４を硬化させる。次
に、外部から湿気等の侵入を防ぐ封止材２６を半導体素
子１と樹脂基板３間に注入し、加熱硬化させることによ
り、半導体装置を得ることができる。Hereinafter, description will be made with reference to the drawings. FIG.
5 is a schematic sectional view showing a semiconductor device connected by using a conductive adhesive. In the figure, 1 is a semiconductor element which is not molded, 2 is a protruding electrode formed on a semiconductor element electrode, 24 is a conductive adhesive, 3 is a resin substrate, 4 is an electrode formed on a resin substrate, and 26 is A sealing material is shown. The bump electrodes 2 are formed on the electrodes of the semiconductor element 1 by using plating or a ball bonder. Next, the protruding electrode 2 is pressed against the conductive adhesive layer 24 formed on the flat plate to have a uniform film thickness,
The conductive adhesive 24 is transferred to the protruding electrode 2. next,
After the semiconductor element 1 and the resin substrate 3 are faced to each other and the protruding electrode 2 of the semiconductor element 1 and the electrode 4 on the resin substrate 3 are aligned with each other, the semiconductor element 1 is pressed against the resin substrate 25, and the protruding electrode 2 And the electrode 4 of the resin substrate 3 are brought into contact with each other via the conductive adhesive 24. Next, the conductive adhesive 24 is cured by heating at about 150 ° C. for several hours. Next, a semiconductor device can be obtained by injecting a sealing material 26 that prevents moisture and the like from entering from the outside between the semiconductor element 1 and the resin substrate 3 and curing it by heating.

【０００４】図１６ははんだを用いて接続した半導体装
置を示す概略断面図を示す。図において、１は半導体素
子、２は突起電極、２７ははんだ、３は樹脂基板、４は
樹脂基板上に形成された電極、２６は封止材を示す。半
導体素子１の電極上に、蒸着等でＣｒ、Ｃｕの膜を形成
した後、レジストをパターニングして、めっきまたは蒸
着で、Ｐｂ−Ｓｎのはんだの突起電極２を形成する。次
に、樹脂基板３上の電極４と位置合わせをおこない、２
００〜３００℃に加熱して、はんだを溶融し、半導体素
子１と樹脂基板３とを接続する。次に、封止材２６を半
導体素子１と樹脂基板２５間に注入し、加熱硬化させる
ことにより、半導体装置を得ることができる。FIG. 16 is a schematic sectional view showing a semiconductor device connected by using solder. In the figure, 1 is a semiconductor element, 2 is a protruding electrode, 27 is a solder, 3 is a resin substrate, 4 is an electrode formed on a resin substrate, and 26 is a sealing material. After forming a Cr film and a Cu film on the electrode of the semiconductor element 1 by vapor deposition or the like, the resist is patterned, and the protruding electrode 2 of Pb-Sn solder is formed by plating or vapor deposition. Next, alignment is performed with the electrode 4 on the resin substrate 3 and 2
The solder is melted by heating to 00 to 300 ° C., and the semiconductor element 1 and the resin substrate 3 are connected. Next, the encapsulating material 26 is injected between the semiconductor element 1 and the resin substrate 25, and heat-cured to obtain a semiconductor device.

【０００５】図１７は、特公昭６２−６６５２号公報に
記載された異方性導電接着剤により半導体素子と樹脂基
板とを接続する半導体装置を示す概略断面図である。樹
脂基板３上の導電リード線４上に異方性導電接着剤６を
配置し、電極２を持つ半導体素子１を押圧すると、電極
２の下の部分の異方性導電接着剤６は圧力が印加された
方向に導通する。これにより、電極２と導電リード線４
は導通する。同時に、半導体素子１は樹脂基板１に異方
性導電接着剤６の接着作用により固着され、外部からの
湿気やホコリの侵入が防止できる。また、半導体素子１
の下面は異方性導電接着剤６によって全面的に樹脂基板
３に接着しているので接着面積が広くなり接合強度も強
くなる。異方性導電接着剤６は横方向には絶縁性を保っ
ている。FIG. 17 is a schematic sectional view showing a semiconductor device for connecting a semiconductor element and a resin substrate with an anisotropic conductive adhesive described in Japanese Patent Publication No. 62-6652. When the anisotropic conductive adhesive 6 is arranged on the conductive lead wire 4 on the resin substrate 3 and the semiconductor element 1 having the electrode 2 is pressed, the anisotropic conductive adhesive 6 under the electrode 2 is not pressed. Conducts in the applied direction. Thereby, the electrode 2 and the conductive lead wire 4
Conducts. At the same time, the semiconductor element 1 is fixed to the resin substrate 1 by the adhesive action of the anisotropic conductive adhesive 6, so that invasion of moisture and dust from the outside can be prevented. In addition, the semiconductor element 1
Since the lower surface of is entirely bonded to the resin substrate 3 by the anisotropic conductive adhesive 6, the bonding area is wide and the bonding strength is strong. The anisotropic conductive adhesive 6 maintains the insulating property in the lateral direction.

【０００６】[0006]

【発明が解決しようとする課題】図１５、図１６に示す
従来技術には以下の問題があった。 （１）半導体素子を接続のため、基板電極に押し当てた
時に、導電性接着剤またははんだの接続材が横に広が
り、隣接の電極と接触し、ショートが発生し、微細電極
間距離の半導体素子の接続が出来ない問題があった。 （２）熱膨張係数が大きく異なる半導体素子と樹脂基板
とを加熱して、接続するため、接続部の電極に大きな熱
応力が作用し、半導体素子が剥離してしまう問題があっ
た。 （３）半導体素子の突起電極と基板の電極を接続してか
ら、信頼性を高めるために封止材を注入するため、プロ
セスが多く生産性に欠ける問題があった。The conventional techniques shown in FIGS. 15 and 16 have the following problems. (1) When a semiconductor element is pressed against a substrate electrode for connection, a connecting material of a conductive adhesive or solder spreads laterally and comes into contact with an adjacent electrode, causing a short circuit, and a semiconductor having a fine interelectrode distance. There was a problem that the elements could not be connected. (2) Since the semiconductor element and the resin substrate, which have greatly different thermal expansion coefficients, are heated and connected to each other, there is a problem that a large thermal stress acts on the electrode of the connection portion to separate the semiconductor element. (3) Since the protruding electrode of the semiconductor element and the electrode of the substrate are connected to each other, a sealing material is injected in order to improve reliability, which results in many processes and lack of productivity.

【０００７】図１７の従来技術はこれらの問題点を一応
解決してはいるが、導電性粒子を均一に押しつぶすこと
ができず、安定した導通が得られないという問題があっ
た。異方性導電接着剤は、接着剤中に金属粒子、メッキ
粒子などを分散させたもので、圧力が加えられると金属
粒子やメッキ粒子がつぶれて変型し押圧方向に導通する
ものである。Although the prior art of FIG. 17 solves these problems, it has a problem that the conductive particles cannot be crushed uniformly and stable conduction cannot be obtained. The anisotropic conductive adhesive is an adhesive in which metal particles, plating particles, and the like are dispersed, and when pressure is applied, the metal particles and plating particles are crushed and deformed to conduct in the pressing direction.

【０００８】突起電極を導電性粒子を介して樹脂基板の
電極に押し付けた状態を図１８に示す。図において、
（ａ）は樹脂基板２１の電極４の幅が突起電極２よりも
大きい場合、（ｂ）は突起電極２の幅と基板電極４の幅
が同じで、半導体素子１を基板２１に接続する際、位置
ずれをおこした場合を示す。図の（ａ）と（ｂ）より明
かなように、（ａ）と（ｂ）では電極４の変形が大きく
導電性粒子５を均一につぶすことはできず、安定な接続
を得ることができない。FIG. 18 shows a state in which the protruding electrode is pressed against the electrode of the resin substrate via the conductive particles. In the figure,
When the width of the electrode 4 of the resin substrate 21 is larger than that of the projecting electrode 2 in (a), the width of the projecting electrode 2 and the width of the substrate electrode 4 are the same in (b) when the semiconductor element 1 is connected to the substrate 21. , Shows the case where the position is displaced. As is clear from (a) and (b) of the figure, in (a) and (b), the deformation of the electrode 4 is large and the conductive particles 5 cannot be uniformly crushed, and a stable connection cannot be obtained. .

【０００９】この発明は、異方性導電接着剤中の導電性
粒子を均一に押しつぶすことにより、半導体素子と基板
とを良好に導通させる半導体装置およびその製造方法を
提案することを目的としている。また、この発明は、異
方性導電接着剤によって半導体素子を基板に固着し且つ
導通させる半導体装置の製造方法において、半導体素子
のテストを行い、その結果により半導体素子を容易に取
り換えることのできる方法を提案することを第２の目的
としている。It is an object of the present invention to propose a semiconductor device and a method for manufacturing the same, in which conductive particles in an anisotropic conductive adhesive are uniformly crushed so that a semiconductor element and a substrate are brought into good conduction. Further, the present invention is a method for manufacturing a semiconductor device, in which a semiconductor element is fixed to a substrate and made conductive by an anisotropic conductive adhesive, a method for testing the semiconductor element, and the semiconductor element can be easily replaced according to the result. The second purpose is to propose

【００１０】[0010]

【課題を解決するための手段】請求項１は、接着剤中に
導電性粒子を混合し圧力が加えられた方向に導通する異
方性導電接着剤により半導体素子の突起電極と基板の電
極とを導通させる半導体装置において、基板の電極の幅
を突起電極の幅より小さく形成したものである。According to a first aspect of the present invention, a projection electrode of a semiconductor element and an electrode of a substrate are formed by an anisotropic conductive adhesive that mixes conductive particles in an adhesive and conducts in a direction in which pressure is applied. In the semiconductor device for electrically connecting the electrodes, the width of the electrode of the substrate is formed smaller than the width of the protruding electrode.

【００１１】請求項２は、請求項１において、基板とし
てプリント基板を用いたものである。According to a second aspect of the present invention, a printed circuit board is used as the substrate in the first aspect.

【００１２】請求項３は、請求項１において、基板とし
て樹脂膜を用いたものである。A third aspect uses the resin film as the substrate in the first aspect.

【００１３】請求項４は、請求項１において、基板とし
てプリント基板と樹脂膜とを積層したものを用いたもの
である。According to a fourth aspect of the present invention, a printed circuit board and a resin film are laminated as the substrate in the first aspect.

【００１４】請求項５は、請求項１において、無機材料
の微細粒子が異方性導電接着剤に含まれているものであ
る。A fifth aspect of the present invention is the method according to the first aspect, wherein fine particles of the inorganic material are contained in the anisotropic conductive adhesive.

【００１５】請求項６は、異方性導電接着剤により半導
体素子の突起電極と基板の電極とを導通させる半導体装
置において、基板の電極の幅を突起電極の幅より小さく
形成し、且つ異方性導電接着剤より接着力の弱い第２の
接着剤を用いたものである。According to a sixth aspect of the present invention, in the semiconductor device in which the projection electrode of the semiconductor element and the electrode of the substrate are electrically connected by the anisotropic conductive adhesive, the width of the electrode of the substrate is formed smaller than the width of the projection electrode, and the anisotropic shape is obtained. The second adhesive having a weaker adhesive strength than the conductive conductive adhesive is used.

【００１６】請求項７は請求項６において、第２の接着
剤が電極および突起電極から離れた部分に配置されてい
るものである。According to a seventh aspect of the present invention, in the sixth aspect, the second adhesive is arranged in a portion apart from the electrodes and the protruding electrodes.

【００１７】請求項８は請求項６において、異方性導電
接着剤を基板側に、第２の接着剤を突起電極を除く半導
体素子側に、夫々配置したものである。According to an eighth aspect of the present invention, the anisotropic conductive adhesive according to the sixth aspect is arranged on the substrate side, and the second adhesive is arranged on the semiconductor element side excluding the protruding electrodes.

【００１８】請求項９は、請求項６ないし請求項８にお
いて、異方性導電接着剤は導電性粒子を含むフィルムで
あり、第２の接着剤は常温で液体であるものである。A ninth aspect of the present invention is the method according to any of the sixth to eighth aspects, wherein the anisotropic conductive adhesive is a film containing conductive particles, and the second adhesive is a liquid at room temperature.

【００１９】請求項１０は半導体装置の製造方法に係る
もので、異方性導電接着剤を基板の電極および配線が形
成された面上に配置する工程と、基板の電極よりも幅広
に形成された突起電極を持つ半導体素子の突起電極を異
方性導電接着剤を介して基板の電極に押し付けることに
より半導体素子と基板とを電気的に導通させる工程とを
含むものである。A tenth aspect of the present invention relates to a method for manufacturing a semiconductor device, which comprises a step of disposing an anisotropic conductive adhesive on a surface of a substrate on which electrodes and wirings are formed, and forming the anisotropic conductive adhesive wider than the electrodes on the substrate. And the step of electrically connecting the semiconductor element and the substrate by pressing the protruding electrode of the semiconductor element having the protruding electrode against the electrode of the substrate through the anisotropic conductive adhesive.

【００２０】請求項１１は、基板と電気的に導通した半
導体素子をテストする工程を請求項１０に付加したもの
である。An eleventh aspect of the present invention adds the step of testing the semiconductor element electrically connected to the substrate to the tenth aspect.

【００２１】請求項１２は、請求項１１の半導体素子の
テストを基板の他の面に設けた電極を介して行うもので
ある。According to a twelfth aspect, the semiconductor element test according to the eleventh aspect is performed through an electrode provided on the other surface of the substrate.

【００２２】請求項１３は、請求項１１の半導体素子の
テストを異方性導電接着剤を半硬化した状態で行うもの
である。According to a thirteenth aspect, the semiconductor element test according to the eleventh aspect is conducted in a state where the anisotropic conductive adhesive is semi-cured.

【００２３】請求項１４は、異方性導電接着剤および接
着力がより弱い第２の接着剤を電極が形成されている基
板の面上に配置する工程と、半導体素子に設けられた突
起電極であって基板の電極よりも幅広に形成されたもの
を異方性導電接着剤を介して前記電極に押し付けること
により半導体素子と基板とを電気的に導通する工程と、
異方性導電接着剤を半硬化させた状態で半導体素子のテ
ストを行う工程とを備えた半導体装置の製造方法であ
る。According to a fourteenth aspect, a step of disposing an anisotropic conductive adhesive and a second adhesive having a weaker adhesive force on a surface of a substrate on which an electrode is formed, and a protruding electrode provided on a semiconductor element. A step of electrically connecting the semiconductor element and the substrate by pressing the one formed to be wider than the electrode of the substrate to the electrode via the anisotropic conductive adhesive,
And a step of testing a semiconductor element in a state where an anisotropic conductive adhesive is semi-cured.

【００２４】[0024]

【発明の実施の形態】BEST MODE FOR CARRYING OUT THE INVENTION

実施の形態１．図１（ａ）は本発明の実施の形態の一つ
を示す断面図である。図において、１は半導体素子、２
は半導体素子上に形成された突起電極、３はプリント基
板、４はプリント基板上に形成された電極、５は導電性
粒子、６は導電性粒子５を含む異方性導電接着剤、１９
は突起電極を押し付けることによって生じた基板の凹部
を示す。図１（ｂ）は突起電極２と基板の電極４の接続
部の拡大図である。突起電極２の幅よりも電極４の幅が
狭いので、導電性粒子５を均一に押しつぶして良好な導
通が得られることがわかる。突起電極２の幅を変化させ
ることは製造上の制約から実際には困難なので、電極４
の幅を小さくすることでこのような構造を得ることがで
きる。Embodiment 1. FIG. 1A is a sectional view showing one of the embodiments of the present invention. In the figure, 1 is a semiconductor element, 2
Is a bump electrode formed on a semiconductor element, 3 is a printed circuit board, 4 is an electrode formed on the printed circuit board, 5 is conductive particles, 6 is an anisotropic conductive adhesive containing conductive particles 5, 19
Indicates a concave portion of the substrate caused by pressing the protruding electrode. FIG. 1B is an enlarged view of a connecting portion between the protruding electrode 2 and the electrode 4 on the substrate. It can be seen that since the width of the electrode 4 is narrower than the width of the protruding electrode 2, the conductive particles 5 are uniformly crushed to obtain good conduction. Since it is actually difficult to change the width of the protruding electrode 2 due to manufacturing restrictions, the electrode 4
Such a structure can be obtained by reducing the width of the.

【００２５】半導体素子１上の突起電極２の材料は、
金、銅、ニッケル、はんだ等、金属であればよい。その
形成方法は、めっきまたは蒸着を用いて行う方法または
ボールボンダで形成する方法がある。導電性粒子５は直
径５μｍのエポキシ等のプラスチック粒子にめっきでニ
ッケルと金の金属膜を形成したものを用いた。他に、ニ
ケルまたは金粒子を用いてもよい。異方性導電接着剤６
は主剤として熱硬化型のエポキシ接着剤を用いた。他
に、熱可塑性のものでもよい。プリント基板はガラスエ
ポキシ基板を用いた。電極４の幅は突起電極２の幅１０
０μｍよりも小さく８０μｍを用いた。The material of the protruding electrode 2 on the semiconductor element 1 is
Any metal such as gold, copper, nickel or solder may be used. The forming method includes a method using plating or vapor deposition or a method using a ball bonder. As the conductive particles 5, plastic particles such as epoxy having a diameter of 5 μm, on which a metal film of nickel and gold was formed by plating, were used. Alternatively, nickel or gold particles may be used. Anisotropic conductive adhesive 6
A thermosetting epoxy adhesive was used as the main agent. Alternatively, it may be thermoplastic. A glass epoxy board was used as the printed board. The width of the electrode 4 is the width 10 of the protruding electrode 2.
80 μm smaller than 0 μm was used.

【００２６】基板３の表面に凹凸があると、接続箇所に
よって突起電極２と電極４との距離が異なるので、良好
な接続が得られなくなる可能性がある。それに対して
は、突起電極２を電極４に押し付ける時に、基板３に凹
部１９を生ずるまで押し込むことにより対処でき、良好
な導通を得ることが出来る。基板３の表面に凹凸があっ
ても、凹部が生ずるように押し込むことにより、突起電
極２と基板電極４との間に働く力の接続箇所によるばら
つきは少なくなり、接続抵抗は均一化できる。１５０μ
ｍのピッチの突起電極２を持つ半導体素子１を接続した
ところ、基板３に凹部１９が生じ、突起電極２と電極４
は不良なく接続ができた。If the surface of the substrate 3 is uneven, the distance between the projecting electrode 2 and the electrode 4 varies depending on the connection point, so that good connection may not be obtained. This can be dealt with by pushing the protruding electrode 2 against the electrode 4 until the recess 19 is formed in the substrate 3, and good conduction can be obtained. Even if the surface of the substrate 3 is uneven, by pushing so as to form a concave portion, the variation in the force acting between the protruding electrode 2 and the substrate electrode 4 due to the connection location is reduced, and the connection resistance can be made uniform. 150μ
When the semiconductor element 1 having the protruding electrodes 2 having a pitch of m is connected, the recesses 19 are formed in the substrate 3 and the protruding electrodes 2 and the electrodes 4
Was able to connect without a defect.

【００２７】プリント基板３の芯はガラス繊維である
が、表面付近は柔軟性のある樹脂なので凹部１９を形成
できる。半導体素子１と基板３は異方性導電接着剤６で
強固に面接着されるので凹部１９はそのまま維持され
る。また、面接着されるので、半導体素子１と基板３と
の熱膨張係数の違いにより生ずる応力が接続点に集中す
ることはなく、剥離しにくくなる。異方性導電接着剤は
導電性粒子により電気的導通を得るものであるので、導
電性粒子をつぶした箇所しか導通しないので、微細ピッ
チの電極の接続が可能になる。The core of the printed circuit board 3 is glass fiber, but since the resin near the surface is a flexible resin, the recess 19 can be formed. Since the semiconductor element 1 and the substrate 3 are strongly surface-bonded with the anisotropic conductive adhesive 6, the recess 19 is maintained as it is. Further, since the surfaces are bonded together, the stress caused by the difference in the coefficient of thermal expansion between the semiconductor element 1 and the substrate 3 does not concentrate at the connection point, and peeling becomes difficult. Since the anisotropic conductive adhesive obtains electrical conduction by the conductive particles, it conducts only at the location where the conductive particles are crushed, so that electrodes with a fine pitch can be connected.

【００２８】実施の形態２．図２は本発明の他の実施の
形態を示す断面図である。図において、実施の形態１に
おいて、用いたプリント基板の代わりに、プリント基板
３表面に絶縁層７として樹脂、導体層８として金属から
なる配線層９が形成された基板１０を用いている。複雑
な配線を行う場合にこのような基板１０が用いられる。
基板１０はプリント基板３の表面にエポキシ等の樹脂を
塗布し、バイアホールを形成し絶縁層７を形成後、めっ
きまたは蒸着等で金属膜を成膜し、写真製版技術を用い
てパターニングすることによって、導体層８を得ること
ができる。この配線層９の絶縁層は樹脂から構成されて
おり、ガラス繊維を含まないので軟質であるため、突起
電極２を押し付けた時に、基板１０の凹部１９の変形量
が大きくなり、電極４は深く沈み込むことができ、大き
な凹凸を有する基板１０にも十分対応できる効果があ
る。実際に微細ピッチをもつ半導体素子１を接続したと
ころ、実施の形態１と同様の効果を得ることができた。Embodiment 2 FIG. 2 is a sectional view showing another embodiment of the present invention. In the figure, in place of the printed board used in the first embodiment, a board 10 having a resin as the insulating layer 7 and a wiring layer 9 made of metal as the conductor layer 8 is used on the surface of the printed board 3. Such a substrate 10 is used when performing complicated wiring.
For the substrate 10, a resin such as epoxy is applied to the surface of the printed circuit board 3, a via hole is formed and an insulating layer 7 is formed, and then a metal film is formed by plating or vapor deposition and patterned by using a photoengraving technique. Thus, the conductor layer 8 can be obtained. Since the insulating layer of the wiring layer 9 is made of resin and is soft because it does not contain glass fiber, when the protruding electrode 2 is pressed, the amount of deformation of the concave portion 19 of the substrate 10 becomes large and the electrode 4 becomes deep. It has the effect of being able to sink and being sufficiently compatible with the substrate 10 having large irregularities. When the semiconductor elements 1 having a fine pitch were actually connected, the same effect as that of the first embodiment could be obtained.

【００２９】実施の形態３．図３は本発明の他の実施の
形態を示す断面図である。図において、実施の形態１に
おいて、用いたプリント基板の代りに、絶縁層７として
樹脂、導体層８として金属からなる配線層９を基板とし
て用いる。配線層９の形成の方法は実施の形態２と同様
の方法を用いる。絶縁層７の樹脂は実施の形態２ではエ
ポキシを用いたが、より可撓性を得るため、ポリイミド
でもよい。本実施の形態においては、配線層９のみで構
成されており、フレキシブルであるため、半導体素子１
と配線層９との熱膨張係数差により発生する熱応力を配
線層９が十分吸収できる。従って割れ易い砒化ガリウム
等からなる半導体素子の接続が可能になる。Embodiment 3 FIG. 3 is a sectional view showing another embodiment of the present invention. In the figure, in place of the printed circuit board used in the first embodiment, a resin is used as the insulating layer 7, and a wiring layer 9 made of metal is used as the conductor layer 8 as the substrate. The method of forming the wiring layer 9 is the same as that of the second embodiment. Epoxy is used as the resin for the insulating layer 7 in the second embodiment, but polyimide may be used for more flexibility. In the present embodiment, the semiconductor element 1 is composed only of the wiring layer 9 and is flexible.
The wiring layer 9 can sufficiently absorb the thermal stress generated due to the difference in thermal expansion coefficient between the wiring layer 9 and the wiring layer 9. Therefore, it is possible to connect a semiconductor element made of gallium arsenide or the like, which is easily broken.

【００３０】実施の形態２と３において、絶縁層７を構
成する樹脂のヤング率を７．５×１０9 Ｐａ以下と導電
性粒子のヤング率を１×１０9 Ｐａ以下であると、１０
μｍ以上の凹凸を持つ基板に接続可能である。In Embodiments 2 and 3, when the Young's modulus of the resin forming the insulating layer 7 is 7.5 × 10 9 Pa or less and the Young's modulus of the conductive particles is 1 × 10 9 Pa or less, 10
It can be connected to a substrate with irregularities of μm or more.

【００３１】実施の形態４．図４は本発明を示す断面図
である。接着剤６の層に無機材料からなり熱膨張係数の
小さな微細粒子１１を混入させた状態を示す。実際に
は、微細粒子として、粒径０．５μｍのシリカを４０〜
５０％混入させると、熱膨張係数が１３×１０-8のもの
をうることができ、接続の信頼性を向上することができ
た。Embodiment 4 FIG. FIG. 4 is a sectional view showing the present invention. A state where fine particles 11 made of an inorganic material and having a small thermal expansion coefficient are mixed in the layer of the adhesive 6 is shown. In practice, as fine particles, 40 to 40 μm of silica having a particle size of 0.5 μm
By mixing 50%, a material having a thermal expansion coefficient of 13 × 10 −8 can be obtained, and the reliability of connection can be improved.

【００３２】実施の形態５．図５は本発明を示す断面図
である。基板１２の裏面に電極１３が形成してあり、電
極１３をとおして、半導体素子１とプリント基板１５と
が接続される。図６は基板１２を裏面からみた図を示
す。製造方法は、半導体素子１を基板１２に異方性導電
接着剤６を用いて接続した後、基板１２をテスト用のソ
ケットに取り付け、裏面の電極１３をとおして、半導体
素子１をテストする。テスト結果が良好であれば、基板
１２を他の受動部品１４とともにプリント基板１５には
んだ等を用いて接続する。本実施の形態においては、半
導体素子１を基板１２に接続することにより、半導体素
子１のテストが可能になるのと、他の部品と同時にプリ
ント基板１５に実装することができ、生産性を向上する
ことができる。本形態において、基板１２の構造がプリ
ント基板上に配線層９を形成したものになっているが、
プリント基板でもよいし、配線層９のみでもよい。本実
施の形態においては基板１２に半導体素子を一個実装し
た例を示したが、図７におけるように、複数個実装して
もよい。Embodiment 5 FIG. 5 is a sectional view showing the present invention. An electrode 13 is formed on the back surface of the substrate 12, and the semiconductor element 1 and the printed board 15 are connected through the electrode 13. FIG. 6 shows a view of the substrate 12 from the back side. In the manufacturing method, after the semiconductor element 1 is connected to the substrate 12 using the anisotropic conductive adhesive 6, the substrate 12 is attached to a test socket and the semiconductor element 1 is tested through the electrode 13 on the back surface. If the test result is good, the board 12 is connected to the printed board 15 together with other passive components 14 by using solder or the like. In the present embodiment, the semiconductor element 1 can be tested by connecting the semiconductor element 1 to the board 12, and the semiconductor element 1 can be mounted on the printed board 15 at the same time as other components, thus improving the productivity. can do. In the present embodiment, the structure of the board 12 is such that the wiring layer 9 is formed on the printed board.
It may be a printed circuit board or only the wiring layer 9. Although an example in which one semiconductor element is mounted on the substrate 12 is shown in the present embodiment, a plurality of semiconductor elements may be mounted as shown in FIG.

【００３３】実施の形態６．図８は本発明の他の実施の
形態を示す断面図である。半導体素子１の裏面に金属膜
１６が設けてあり、基板１２上のグランド電極１７と金
属膜１６が導電性接着剤２０を介して接続されている。
半導体素子１の裏面をグランドに接続できることによ
り、半導体素子１のバックバイアスをとることができ、
半導体素子１の特性を向上することができる。Embodiment 6 FIG. FIG. 8 is a sectional view showing another embodiment of the present invention. A metal film 16 is provided on the back surface of the semiconductor element 1, and the ground electrode 17 on the substrate 12 and the metal film 16 are connected via a conductive adhesive 20.
Since the back surface of the semiconductor element 1 can be connected to the ground, a back bias of the semiconductor element 1 can be obtained,
The characteristics of the semiconductor element 1 can be improved.

【００３４】実施の形態７．図９は本発明の他の実施の
形態を示す断面図である。半導体素子１と樹脂基板２５
の間に、異方性導電接着剤６と第二の接着剤２０があ
る。異方性導電接着剤６は樹脂基板２５の電極４で囲ま
れる領域に形成してある。第二の接着剤２０は導電粒子
５を含有しており、突起電極２と電極４の接続部に用い
られる。接続部では、導電粒子を確実に保持する目的か
ら、異方性導電接着剤には半導体素子１と樹脂基板２５
との密着力に優れた熱硬化型のエポキシ系接着剤を用い
た。また、第二の接着剤２０には、半導体素子１の取り
替えを可能にすることから、異方性導電接着剤よりは密
着力の弱い熱可塑型エポキシ系接着剤を用いた。第二の
接着剤２０はエポキシ系接着剤に限ったものでなく、他
に、シリコーン系、フェノール系接着剤でもよい。ま
た、エポキシ系接着剤は熱可塑型に限ったものでなく、
異方性導電接着剤６よりも密着力が小さければ、熱硬化
型でもよい。本実施の形態において、第二の接着剤２０
は導電粒子５を含有していないが、含有してもよい。Embodiment 7 FIG. 9 is a sectional view showing another embodiment of the present invention. Semiconductor element 1 and resin substrate 25
Between them is the anisotropic conductive adhesive 6 and the second adhesive 20. The anisotropic conductive adhesive 6 is formed on a region of the resin substrate 25 surrounded by the electrodes 4. The second adhesive 20 contains the conductive particles 5 and is used for the connecting portion between the protruding electrode 2 and the electrode 4. At the connecting portion, the semiconductor element 1 and the resin substrate 25 are used as the anisotropic conductive adhesive for the purpose of securely holding the conductive particles.
A thermosetting epoxy-based adhesive having excellent adhesion with was used. As the second adhesive 20, a thermoplastic epoxy adhesive having a weaker adhesive force than the anisotropic conductive adhesive is used because the semiconductor element 1 can be replaced. The second adhesive 20 is not limited to the epoxy adhesive, but may be a silicone adhesive or a phenol adhesive. Also, the epoxy adhesive is not limited to the thermoplastic type,
A thermosetting type may be used as long as it has a smaller adhesive force than the anisotropic conductive adhesive 6. In the present embodiment, the second adhesive 20
Does not contain the conductive particles 5, but may contain them.

【００３５】図１０は製造方法を示す図である。図にお
いて、（ａ）は樹脂基板２５に第二の接着剤２０を形成
し、その上に、異方性導電接着剤を形成した状態を示
す。（ｂ）は突起電極２を有する半導体素子１を押し付
け、導電性粒子５がつぶれ、突起電極２と電極４が接続
された状態を示す。この場合、半導体素子１を押し付け
ると同時に、半導体素子１を加熱し、異方性導電接着剤
６が半硬化している。（ｃ）は、電極４とつながってい
るテスト用の電極２２にプローブ２３を接触させ、半導
体素子１と接続部のテストを行っている状態を示す。
（ｄ）はテストの結果、良品と判定され、さらに加熱
し、異方性導電接着剤６を完全に硬化した状態をしめ
す。（ｃ）のテストで不良と判定された場合は、異方性
導電接着剤６と第二の接着剤２０がともに半硬化状態の
ため、半導体素子１を基板３より剥離することが可能で
ある。図１０（ａ）〜（ｄ）のプロセスは、第二の接着
剤２０を使わずに、異方性導電接着剤６だけを用いて行
うことも可能である。その場合でも、テストで不良と判
定された半導体素子１の基板からの剥離は、異方性導電
接着剤６が半硬化の状態で行えば可能である。第二の接
着剤２０を用いた方が半導体素子の基板からの剥離がよ
り容易になるという程度の差はある。異方性導電接着剤
を用いることにより、電気的接続と接着剤による封止と
を同時に行うことができるので、生産性が向上する。FIG. 10 is a diagram showing a manufacturing method. In the figure, (a) shows a state in which the second adhesive 20 is formed on the resin substrate 25 and the anisotropic conductive adhesive is formed thereon. (B) shows a state in which the semiconductor element 1 having the protruding electrodes 2 is pressed, the conductive particles 5 are crushed, and the protruding electrodes 2 and the electrodes 4 are connected. In this case, the semiconductor element 1 is pressed at the same time as the semiconductor element 1 is pressed, and the anisotropic conductive adhesive 6 is semi-cured. (C) shows a state in which the probe 23 is brought into contact with the test electrode 22 connected to the electrode 4 to test the semiconductor element 1 and the connection portion.
As a result of the test, (d) is judged as a non-defective product, and further heated to show the state where the anisotropic conductive adhesive 6 is completely cured. If the test (c) determines that the semiconductor element 1 is defective, the anisotropic conductive adhesive 6 and the second adhesive 20 are both in a semi-cured state, so that the semiconductor element 1 can be separated from the substrate 3. . The process of FIGS. 10A to 10D can be performed using only the anisotropic conductive adhesive 6 without using the second adhesive 20. Even in that case, the semiconductor element 1 determined to be defective in the test can be peeled from the substrate if the anisotropic conductive adhesive 6 is semi-cured. There is a difference that the use of the second adhesive 20 makes it easier to peel the semiconductor element from the substrate. By using the anisotropic conductive adhesive, electrical connection and sealing with the adhesive can be performed at the same time, so that productivity is improved.

【００３６】実施の形態８．図１１は本発明の他の実施
の形態を示す断面図である。半導体素子１と樹脂基板２
５の間に、異方性導電接着剤６と第二の接着剤２０があ
る。異方性導電接着剤６は樹脂基板２５の表面に形成さ
れ、導電粒子５を含有している。異方性導電接着剤６よ
り接着力が弱い第二の接着剤２０は突起電極２を除く半
導体素子１側に形成されている。図１２は製造方法を示
す断面図である。図において、（ａ）は樹脂基板２５上
に異方性導電接着剤６を形成し、その上に第二の接着剤
２０を形成した状態を示す。本実施の形態において、異
方性導電接着剤６は未硬化のエポキシ系接着フィルムを
用いた。第二の接着剤２０は、熱硬化型接着剤でもよい
し、熱可塑接着剤でもよく、異方性導電接着剤６より
も、密着力が低くければよい。Embodiment 8 FIG. FIG. 11 is a sectional view showing another embodiment of the present invention. Semiconductor element 1 and resin substrate 2
Between 5, there is an anisotropic conductive adhesive 6 and a second adhesive 20. The anisotropic conductive adhesive 6 is formed on the surface of the resin substrate 25 and contains the conductive particles 5. The second adhesive 20, which has a weaker adhesive strength than the anisotropic conductive adhesive 6, is formed on the semiconductor element 1 side excluding the protruding electrodes 2. FIG. 12 is a cross-sectional view showing the manufacturing method. In the figure, (a) shows a state in which the anisotropic conductive adhesive 6 is formed on the resin substrate 25, and the second adhesive 20 is formed thereon. In this embodiment, the anisotropic conductive adhesive 6 is an uncured epoxy adhesive film. The second adhesive 20 may be a thermosetting adhesive or a thermoplastic adhesive as long as it has a lower adhesion than the anisotropic conductive adhesive 6.

【００３７】（ｂ）は突起電極２を有する半導体素子１
を押し付け、加熱した状態を示す。加熱は異方性導電接
着剤６が半硬化する温度で行う。（ｃ）はテスト用の電
極２２にプローブ２３を接触させ、半導体素子１と接続
部のテストを行っている状態を示す。（ｄ）はテストの
結果、良品と判定され、さらに加熱し、異方性導電接着
剤６を完全に硬化した状態を示す。テストで不良と判定
された場合、加熱し、半導体素子１を第二の接着剤２０
の部分で剥離することができる。半導体素子１の全面
が、密着力の小さい第二の接着剤２０で覆われているた
め、剥離が容易である。(B) shows a semiconductor element 1 having a protruding electrode 2.
Shows the state of being pressed and heated. The heating is performed at a temperature at which the anisotropic conductive adhesive 6 is semi-cured. (C) shows a state in which the probe 23 is brought into contact with the test electrode 22 to test the semiconductor element 1 and the connecting portion. As a result of the test, (d) shows a state in which the anisotropic conductive adhesive 6 is judged to be non-defective and further heated to completely cure the anisotropic conductive adhesive 6. If the test determines that the semiconductor element 1 is defective, the semiconductor element 1 is heated and the second adhesive 20 is applied.
Can be peeled off. Since the entire surface of the semiconductor element 1 is covered with the second adhesive 20 having a small adhesive force, it can be easily peeled off.

【００３８】実施の形態９．図１３は本発明の他の実施
の形態を示す断面図である。半導体素子１と樹脂基板２
５の間に異方性導電接着剤６と第二の接着剤２０があ
る。異方性導電接着剤６より接着力の弱い第二の接着剤
２０は樹脂基板２５の電極４に囲まれた内側にあり、異
方性導電接着剤２１は電極４を含むように配置される。
突起電極２と基板の電極４との電気的接続を、維持する
為に、より接着力の強い異方性導電接着剤６は、突起電
極２と電極４を含むように配置している。半導体素子１
と樹脂基板２５間は一層の接着層で構成されているた
め、半導体素子１の薄型実装を実現することができる。Embodiment 9 FIG. 13 is a sectional view showing another embodiment of the present invention. Semiconductor element 1 and resin substrate 2
Between 5 is an anisotropic conductive adhesive 6 and a second adhesive 20. The second adhesive 20 having weaker adhesive strength than the anisotropic conductive adhesive 6 is inside the resin substrate 25 surrounded by the electrodes 4, and the anisotropic conductive adhesive 21 is arranged so as to include the electrodes 4. .
In order to maintain the electrical connection between the protruding electrode 2 and the electrode 4 on the substrate, the anisotropic conductive adhesive 6 having a stronger adhesive force is arranged so as to include the protruding electrode 2 and the electrode 4. Semiconductor element 1
Since the adhesive layer is formed between the resin substrate 25 and the resin substrate 25, it is possible to realize the thin mounting of the semiconductor element 1.

【００３９】図１４は製造方法を示す断面図である。
（ａ）は、第二の接着剤２０を樹脂基板２５上の電極４
で囲まれた領域に、異方性導電接着剤６を樹脂基板２５
上の電極４を含む外側に形成した状態を示す。（ｂ）
は、突起電極２を有する半導体素子１を押し付け、加熱
した状態を示す。突起電極２と電極４は、導電性粒子５
を介して、接続されている。（ｃ）は、テスト用の電極
２２にプローブ２３を接触させ、半導体素子１と接続部
のテストを行っている状態を示す。（ｄ）は、テストの
結果、良品と判定されれば、さらに加熱し、異方性導電
接着剤６を完全に硬化させた状態を示す。以上、実施の
形態７、８、９において、第二の接着剤２０として、常
温で液状のタイプをもちいれば、接着剤の供給が容易で
あり、生産性を向上することができる。FIG. 14 is a sectional view showing the manufacturing method.
(A) shows the second adhesive 20 applied to the electrode 4 on the resin substrate 25.
The anisotropic conductive adhesive 6 is applied to the resin substrate 25 in a region surrounded by
The state formed on the outside including the upper electrode 4 is shown. (B)
Shows a state in which the semiconductor element 1 having the protruding electrode 2 is pressed and heated. The protruding electrode 2 and the electrode 4 are formed of conductive particles 5
Connected through. (C) shows a state in which the probe 23 is brought into contact with the test electrode 22 to test the semiconductor element 1 and the connecting portion. (D) shows a state where the anisotropic conductive adhesive 6 is completely cured by further heating if it is determined as a non-defective product as a result of the test. As described above, in Embodiments 7, 8 and 9, if the second adhesive 20 is of a liquid type at room temperature, the adhesive can be easily supplied and the productivity can be improved.

【図面の簡単な説明】[Brief description of drawings]

【図１】 本発明の一実施の形態にかかる半導体装置の
断面図である。FIG. 1 is a sectional view of a semiconductor device according to an embodiment of the present invention.

【図２】 本発明の他の実施の形態にかかる半導体装置
の断面図である。FIG. 2 is a sectional view of a semiconductor device according to another embodiment of the present invention.

【図３】 本発明の他の実施の形態にかかる半導体装置
の断面図である。FIG. 3 is a sectional view of a semiconductor device according to another embodiment of the present invention.

【図４】 本発明の他の実施の形態にかかる半導体装置
の断面図である。FIG. 4 is a sectional view of a semiconductor device according to another embodiment of the present invention.

【図５】 本発明の他の実施の形態にかかる半導体装置
の断面図である。FIG. 5 is a sectional view of a semiconductor device according to another embodiment of the present invention.

【図６】 図５のプリント基板１２の裏面の平面図であ
る。6 is a plan view of the back surface of the printed circuit board 12 of FIG.

【図７】 本発明の他の実施の形態にかかる半導体装置
の断面図である。FIG. 7 is a sectional view of a semiconductor device according to another embodiment of the present invention.

【図８】 本発明の他の実施の形態にかかる半導体装置
の断面図である。FIG. 8 is a sectional view of a semiconductor device according to another embodiment of the present invention.

【図９】 本発明の他の実施の形態にかかる半導体装置
の断面図である。FIG. 9 is a sectional view of a semiconductor device according to another embodiment of the present invention.

【図１０】 本発明の一実施の形態にかかる半導体装置
の製造方法を示す図である。FIG. 10 is a diagram showing a method for manufacturing a semiconductor device according to an embodiment of the present invention.

【図１１】 本発明の他の実施の形態にかかる半導体装
置の断面図である。FIG. 11 is a sectional view of a semiconductor device according to another embodiment of the present invention.

【図１２】 本発明の他の実施の形態にかかる半導体装
置の製造方法を示す図である。FIG. 12 is a diagram showing a method for manufacturing a semiconductor device according to another embodiment of the present invention.

【図１３】 本発明の他の実施の形態にかかる半導体装
置の断面図である。FIG. 13 is a sectional view of a semiconductor device according to another embodiment of the present invention.

【図１４】 本発明の他の実施の形態にかかる半導体装
置の製造方法を示す図である。FIG. 14 is a diagram showing a method for manufacturing a semiconductor device according to another embodiment of the present invention.

【図１５】 従来の半導体装置を示す断面図である。FIG. 15 is a cross-sectional view showing a conventional semiconductor device.

【図１６】 従来の半導体装置を示す断面図である。FIG. 16 is a cross-sectional view showing a conventional semiconductor device.

【図１７】 異方性導電接着剤を用いた従来の半導体装
置を示す断面図である。FIG. 17 is a cross-sectional view showing a conventional semiconductor device using an anisotropic conductive adhesive.

【図１８】 異方性導電接着剤を用いた従来の半導体装
置の接続を示す図である。FIG. 18 is a diagram showing connection of a conventional semiconductor device using an anisotropic conductive adhesive.

【符号の説明】[Explanation of symbols]

１ 半導体素子 ２ 突起電極 ３ プリン
ト基板 ４ 電極 ５ 導電性粒子 ６ 異方性
導電接着剤 ７ 絶縁層 ８ 導体層 ９ 配線層 １０ 配線層を有する基板 １１ 微細
粒子 １２ 裏面に電極をもつ基板 １３ 電極 １４ 受動部品 １５ プリント基板 １６ 金属
膜 １７ グランド電極 １８ はんだ １９ 基板
の凹部 ２０ 第二の接着剤 ２２ テスト電極 ２３ プロ
ーブDESCRIPTION OF SYMBOLS 1 Semiconductor element 2 Projection electrode 3 Printed circuit board 4 Electrode 5 Conductive particle 6 Anisotropic conductive adhesive 7 Insulating layer 8 Conductor layer 9 Wiring layer 10 Substrate having wiring layer 11 Fine particles 12 Substrate having electrode on the back surface 13 Electrode 14 Passive components 15 Printed circuit board 16 Metal film 17 Ground electrode 18 Solder 19 Substrate recess 20 Second adhesive 22 Test electrode 23 Probe

───────────────────────────────────────────────────── フロントページの続き (72)発明者 利田 賢二 東京都千代田区丸の内二丁目２番３号 三 菱電機株式会社内 (72)発明者 平澤 栄一 東京都千代田区丸の内二丁目２番３号 三 菱電機株式会社内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Kenji Toda 2-3, Marunouchi, Chiyoda-ku, Tokyo Sanryo Electric Co., Ltd. (72) Eiichi Hirasawa 2-3-2, Marunouchi, Chiyoda-ku, Tokyo 3 Inside Ryo Electric Co., Ltd.

Claims (14)

【特許請求の範囲】[Claims] 【請求項１】 電極および配線が形成された基板と、こ
の基板上に配置され、接着剤中に導電性粒子を混入し圧
力が加えられた方向に導通する異方性導電接着剤と、前
記電極より幅広に形成され前記異方性導電接着剤を介し
て前記電極と導通する突起電極を持つ半導体素子とを備
えた半導体装置。1. A substrate on which electrodes and wirings are formed, and an anisotropic conductive adhesive which is disposed on the substrate and has conductive particles mixed in the adhesive to conduct electricity in the direction in which pressure is applied. A semiconductor device comprising: a semiconductor element having a protruding electrode formed wider than an electrode and electrically connected to the electrode via the anisotropic conductive adhesive. 【請求項２】 基板がプリント基板である請求項１に記
載の半導体装置。2. The semiconductor device according to claim 1, wherein the substrate is a printed circuit board. 【請求項３】 基板が樹脂膜で構成されている請求項１
に記載の半導体装置。3. The substrate is composed of a resin film.
The semiconductor device according to. 【請求項４】 基板がプリント基板と樹脂膜の基板とを
積層したものである請求項１に記載の半導体装置。4. The semiconductor device according to claim 1, wherein the substrate is a laminate of a printed substrate and a resin film substrate. 【請求項５】 異方性導電接着剤が無機材料の微細粒子
を含む請求項１に記載の半導体装置。5. The semiconductor device according to claim 1, wherein the anisotropic conductive adhesive contains fine particles of an inorganic material. 【請求項６】 電極および配線が形成された基板と、少
なくとも前記電極上および電極の周囲に配置され、接着
剤中に導電性粒子を混入し圧力が加えられた方向に導通
する異方性導電接着剤と、前記電極より幅広に形成され
前記異方性導電接着剤を介して前記電極と導通する突起
電極を持つ半導体素子と、この半導体素子と前記基板と
の間に配置され、接着力が前記異方性導電接着剤より弱
い第２の接着剤とを備えた半導体装置。6. A substrate on which electrodes and wirings are formed, and anisotropic conductive which is disposed at least on and around the electrodes, and which conducts in a direction in which pressure is applied by mixing conductive particles in an adhesive. An adhesive, a semiconductor element having a protruding electrode that is formed wider than the electrode and is electrically connected to the electrode through the anisotropic conductive adhesive, and is disposed between the semiconductor element and the substrate, and has an adhesive force. A semiconductor device comprising a second adhesive weaker than the anisotropic conductive adhesive. 【請求項７】 第２の接着剤が電極および突起電極から
離れた部分に配置されている請求項６に記載の半導体装
置。7. The semiconductor device according to claim 6, wherein the second adhesive is arranged in a portion apart from the electrode and the protruding electrode. 【請求項８】 基板側に異方性導電接着剤が、突起電極
を除く半導体素子側に第２の接着剤が配置されている請
求項６に記載の半導体装置。8. The semiconductor device according to claim 6, wherein the anisotropic conductive adhesive is arranged on the substrate side, and the second adhesive is arranged on the semiconductor element side excluding the protruding electrodes. 【請求項９】 異方性導電接着剤は導電性粒子を含むフ
ィルムであり、第２の接着剤は常温で液体である請求項
６ないし請求項８のいずれかに記載の半導体装置。9. The semiconductor device according to claim 6, wherein the anisotropic conductive adhesive is a film containing conductive particles, and the second adhesive is a liquid at room temperature. 【請求項１０】 接着剤中に導電性粒子を混入し圧力が
加えられた方向に導通する異方性導電接着剤を基板の電
極および配線が形成された面上に配置する工程と、半導
体素子に設けられ前記電極よりも幅広に形成された突起
電極を前記異方性導電接着剤を介して前記電極に押し付
けることにより前記半導体素子と前記基板とを電気的に
導通させ且つ接着させる工程とを含む半導体装置の製造
方法。10. A step of disposing conductive anisotropic particles in an adhesive to dispose an anisotropic conductive adhesive which conducts in a direction in which pressure is applied on a surface of a substrate on which electrodes and wirings are formed, and a semiconductor element. A protruding electrode formed wider than the electrode is pressed against the electrode via the anisotropic conductive adhesive to electrically connect and bond the semiconductor element and the substrate. A method of manufacturing a semiconductor device including. 【請求項１１】 接着剤中に導電性粒子を混入し圧力が
加えられた方向に導通する異方性導電接着剤を基板の電
極および配線が形成された面上に配置する工程と、半導
体素子に設けられ前記電極よりも幅広に形成された突起
電極を前記異方性導電接着剤を介して前記電極に押し付
けることにより前記半導体素子と前記基板とを電気的に
導通させる工程と、前記基板を介して前記半導体素子の
テストを行う工程とを備えた半導体装置の製造方法。11. A step of arranging an anisotropic conductive adhesive which mixes conductive particles in an adhesive and conducts in a direction in which pressure is applied on a surface of a substrate on which electrodes and wirings are formed, and a semiconductor element. And a step of electrically connecting the semiconductor element and the substrate by pressing a protruding electrode formed to be wider than the electrode to the electrode via the anisotropic conductive adhesive, And a step of testing the semiconductor element via the semiconductor device. 【請求項１２】 半導体素子のテストを基板の他の面に
設けた電極を介して行う請求項１１に記載の半導体装置
の製造方法。12. The method of manufacturing a semiconductor device according to claim 11, wherein the test of the semiconductor element is performed through an electrode provided on the other surface of the substrate. 【請求項１３】 半導体素子のテストを異方性導電接着
剤を半硬化させた状態で行う請求項１１に記載の半導体
装置の製造方法。13. The method of manufacturing a semiconductor device according to claim 11, wherein the semiconductor element is tested in a state where the anisotropic conductive adhesive is semi-cured. 【請求項１４】 接着剤中に導電性粒子を混入し圧力が
加えられた方向に導通する異方性導電接着剤およびこの
異方性導電接着剤より接着力が弱い第２の接着剤とを電
極が形成された基板の面上に配置する工程と、半導体素
子に設けられた前記電極よりも幅広に形成された突起電
極を前記異方性導電接着剤を介して前記電極に押し付け
ることにより前記半導体素子と前記基板とを電気的に導
通させる工程と、前記異方性導電接着剤を半硬化させた
状態で前記半導体素子のテストを行う工程とを備えた半
導体装置の製造方法。14. An anisotropic conductive adhesive which mixes conductive particles in the adhesive and conducts in a direction in which pressure is applied, and a second adhesive having a weaker adhesive force than the anisotropic conductive adhesive. The step of arranging on the surface of the substrate on which the electrode is formed, and by pressing the protruding electrode formed wider than the electrode provided in the semiconductor element to the electrode via the anisotropic conductive adhesive, A method of manufacturing a semiconductor device, comprising: a step of electrically connecting a semiconductor element and the substrate; and a step of testing the semiconductor element in a state where the anisotropic conductive adhesive is semi-cured.
JP20356395A 1995-08-09 1995-08-09 Semiconductor device Expired - Fee Related JP3225800B2 (en)

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JP20356395A JP3225800B2 (en) 1995-08-09 1995-08-09 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20356395A JP3225800B2 (en) 1995-08-09 1995-08-09 Semiconductor device

Publications (2)

Publication Number Publication Date
JPH0951018A true JPH0951018A (en) 1997-02-18
JP3225800B2 JP3225800B2 (en) 2001-11-05

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* Cited by examiner, † Cited by third party
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US6410364B1 (en) 1998-09-30 2002-06-25 Seiko Epson Corporation Semiconductor device, method of connecting a semiconductor chip, circuit board, and electronic equipment
US6448663B1 (en) * 1999-03-08 2002-09-10 Seiko Epson Corporation Semiconductor device, semiconductor device mounting structure, liquid crystal device, and electronic apparatus
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WO2008143358A1 (en) * 2007-05-24 2008-11-27 Sony Chemical & Information Device Corporation Electric device, connecting method and adhesive film

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