JPH08280173A - Capacitor charging device - Google Patents

Abstract

PURPOSE: To reduce the size of a capacitor charging device and to surely protect the circuit of the device by reducing the switching loss of the device without deteriorating the charging voltage accuracy of the device. CONSTITUTION: A resonance inverter 3 is constituted to charge a high-voltage capacitor C0 by respectively connecting paired semiconductor switches V and Y and paired capacitors C1 and C2 in bridges and providing a reactor L for obtaining an oscillating current between the capacitors C1 and C2 on the AC output side and the capacitor C0 is charged with the AC output of the inverter 3 through a transformer 4 and a rectifier circuit 5. The switching loss of the inverter 3 is reduced by switching the switches of the inverter 3 at zero currents. In addition, the size of the reactor L, etc., is reduced and the accuracy of the charging voltage of the capacitor C0 is improved by raising the oscillation frequency. Since the converter 3 has the half-bridge constitution, in addition, the number of semiconductor switches of the converter 3 is reduced to half and switching loss of the inverter 3 is further reduced. Moreover, the reactor for obtaining oscillating current by the high voltage capacitor is not rquired, thus reducing the device size.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a capacitor charging device for charging a high voltage capacitor used as a high voltage source, and particularly to a high voltage / capacitor using a capacitor as a DC power source.
The present invention relates to a capacitor charging device for a pulse power supply for generating a large current pulse.

[0002]

2. Description of the Related Art Some pulsed power supplies for pulsed laser excitation, pulsed plasma generation, pulsed denitration devices, etc., use a pulse compression circuit that combines a semiconductor switch and a saturable reactor that serves as a magnetic switch.

This pulsed power source has, for example, a configuration shown in FIG. The capacitor C ₀ is initially charged by the high-voltage DC power supply HDC, the discharge current is supplied from the capacitor C ₀ to the pulse transformer PT by turning on the semiconductor switch SW, and the output voltage of this pulse transformer is boosted by the saturable transformer ST, Further saturable transformer ST
Voltage generation circuit L by the magnetic switch operation and LC inversion of
It is boosted by C and the peaking capacitor C _P and laser oscillator L are magnetically compressed by the saturable reactor SI _1.
Generate an ultrashort pulse to H.

[0004] Here, the high-voltage DC power source HDC for initial charging of the capacitor C ₀ is charged capacitor C ₀ at a high repetition in accordance with the pulse current supply of the high repetition of the laser oscillator LH (for example, 600 pulses / sec) There is a need to. In addition, since the voltage of the capacitor C ₀ directly affects the output, the charging voltage is required to have high accuracy.

A conventional high voltage DC power supply for this purpose is shown in FIG.
There is a configuration shown in FIG. A DC power supply 1 that is a rectifier or the like that obtains DC from an AC power supply constitutes a DC power supply for a voltage-type inverter 3 together with a smoothing capacitor 2 at its output stage.

The inverter 3 is a power transistor or I
Semiconductor devices such as GBT and GTO are connected to switches U, V,
The main circuit configuration is a bridge connection for X and Y, and AC power is output by operating the inverter.

The output transformer 4 takes out the AC output from the inverter 3 at a constant boosting ratio. The rectifying circuit 5 is configured by a bridge connection of the diode D, receives the output of the transformer 4 as an AC input, and performs full-wave rectification of the AC input.

The reactor 6 suppresses an inrush current when the capacitor C ₀ is charged by the rectified output of the rectifier circuit 5 and forms an LC resonance circuit with the capacitor C ₀ to adjust the charging current time thereof. Adjust the charging voltage of C ₀ .

Further, the capacitor C ₀ may be charged to a negative voltage by the sneak current from the pulse compression circuit side of the latter stage after being discharged by the pulse generation. When this charging voltage is present, a current flows through the rectifier circuit 5 of the capacitor C ₀ , and the reactor 6 suppresses the current in order to prevent the rectifier circuit 5 from being destroyed by this current. In order to suppress this current, a resistor may be inserted in series with the reactor 6.

In this configuration, the capacitor C ₀ is charged by the DC power source voltage E via the switch SW _DC and the reactor L and the capacitor C as shown in the equivalent circuit of FIG.
Supply current to the LC series resonance circuit of ₀ and switch SW _DC
The voltage V _C is determined by the following equation by controlling the turning-on time. Turning on / off the switch SW _DC is realized by controlling the operation of the inverter 3 or providing a semiconductor switch between the rectifier circuit 5 and the reactor 6.

[0011]

[Equation 1]

E: average value of voltage controlled by the inverter 3 etc. V ₀ : initial voltage of the capacitor C ₀ L: inductance of the reactor 6 C: capacitance of the capacitor C ₀ t: turn-on time of the switch SW _{DC From} the above formula , the charging voltage V _C of the capacitor C _0, since changes due the initial voltage V ₀ which capacitor C _0, in order to obtain a highly accurate charging, the initial voltage V ₀ in some way
Must be zero.

In order to make this initial value zero, the conventional method shown in FIG.
8, a circuit configuration (a) in which a discharge resistance R is provided in parallel with the capacitor C ₀ , or a circuit configuration (b) in which a switch SW ₀ is added in series to the discharge resistance R, and further, instead of the switch SW ₀ Circuit configuration (c) with a saturable reactor SI and a capacitor C before turning on the switch SW _DC.
The residual charge of ₀ is discharged through the discharge resistor R.

[0014]

In the conventional capacitor charging device, in the configuration of FIG.
If the time constant of the capacitor C ₀ is set to be small as the resistance value of the capacitor C ₀ , the voltage of the capacitor C ₀ is rapidly decreased after the end of charging, and therefore the discharge resistor R having a large resistance value is desired.

However, in the discharge resistance R having a large resistance value,
It takes a long time to reduce the residual electric charge of the capacitor C ₀ to zero, and cannot cope with high repeated charging / discharging.

In this respect, in the configuration of (b) or (c) of FIG. 18, the switch S is charged from the charging to the discharging of the capacitor C _0.
By opening W ₀ or blocking the discharge current by the saturable reactor SI, the discharge resistance R can be reduced to a small resistance value and the residual charge can be rapidly reduced to zero while eliminating an inconvenient discharge.

However, since the charging voltage of the capacitor C ₀ is desired to be a high voltage of several KV or more, the switch SW ₀ requires a high breakdown voltage GTO element and its control circuit, resulting in an increase in size of the apparatus.

Further, when the switch SW _DC is provided between the rectifier circuit 5 and the reactor L, the switch SW _DC cuts off a large current at a high voltage, so that a large switching loss occurs. Similarly, since a large current flows through the switch SW ₀ at a high voltage, a large switching loss is involved. Also,
The inverter 3 has four switching elements U, V, X,
Y is required, and switching loss due to these increases.

Further, in the conventional circuit, the reactor L constituting the resonance circuit and the capacitor C ₀ and the saturable reactor SI for discharging become large in size, which leads to an increase in size of the device.

When the charging of the capacitor C ₀ is realized by constant current charging, it becomes difficult to finely adjust the capacitor voltage immediately before the completion of charging.

An object of the present invention is to provide a capacitor charging device with reduced switching loss without lowering charging voltage accuracy.

Another object of the present invention is to provide a capacitor charging device which is downsized without lowering the charging voltage accuracy.

Another object of the present invention is to provide a capacitor charging device which ensures circuit protection of an inverter or the like.

Another object of the present invention is to provide a capacitor charging device which facilitates changing the output capacitance of the device.

[0025]

SUMMARY OF THE INVENTION In order to solve the above problems, the present invention provides a charging device for a high voltage capacitor used as a high voltage source, wherein a pair of semiconductor switches and a pair of capacitors are bridge-connected to each other, and an alternating current A resonance type inverter provided on the output side with a reactor for obtaining an oscillating current between the pair of capacitors, a transformer for extracting an AC output of the inverter at a constant ratio, and a transformer for rectifying the output of the transformer to form the high voltage capacitor. And a rectifying circuit for charging.

The present invention is also characterized in that the charging voltage clamping diodes of the pair of capacitors are provided in parallel with the capacitors.

The present invention is also characterized in that the reactor is a saturable reactor alone or in combination with a reactor.

Further, the present invention is characterized in that a reactor or resistor for current limiting or a series circuit of a reactor and a resistor is provided in series with the high voltage capacitor, and a protection diode is provided in parallel with the rectifier circuit. To do.

Further, according to the present invention, a circuit equivalent to the resonance type inverter, a transformer and a rectifying circuit is provided in parallel, and the inverters are synchronously operated to increase the charging current or voltage of the high voltage capacitor. Is characterized by.

[0030]

The inverter is a resonance type inverter having a half bridge structure of a capacitor and a semiconductor switch, and a reactor is provided at the output end, so that the switch is switched at zero current and the switching loss is reduced.

Further, since the vibration frequency can be increased, the reactor can be downsized and the charging voltage accuracy can be improved.

Further, the inverter has a half-bridge structure to halve the number of semiconductor switches and further reduce switching loss.

Further, a reactor for obtaining an oscillating current with the high-voltage capacitor is unnecessary, and the device can be downsized.

Further, the charging voltage clamping diodes of the pair of capacitors are provided in parallel with the capacitors, respectively, so that the charging voltage of the capacitors is limited and a capacitor having a low withstand voltage can be used.

Further, by including a saturable reactor in the reactor, it is possible to further reduce the switching loss at turn-on.

Further, the rectifier circuit is surely protected by providing a current limiting reactor and a resistor in series with the high voltage capacitor and by providing a protective diode in parallel with the rectifier circuit.

Further, a circuit such as an inverter which can be operated in synchronization with a circuit is provided in parallel, and by charging the high-voltage capacitor, the charging current or voltage of the capacitor is increased, thereby changing the existing device without changing the existing device. Allows to increase the output capacity of.

[0038]

FIG. 1 is a circuit diagram showing an embodiment of the present invention. 16 is different from FIG. 16 in that the switches U and X are replaced with capacitors C ₁ and C _2, and a reactor L is provided in series with the primary winding of the transformer 4 instead of the reactor 6.

In the present embodiment, the inverter 3 is constructed as a half-bridge resonance type inverter, and its operation is performed by complementary ON of the switch V and the switch Y.
During the period when the switch V is on and the switch Y is off,
Current flows in the following two loops.

C ₁ → V → primary winding of transformer 4 → L → C ₁ capacitor 2 → V → primary winding of transformer 4 → L → C ₂ →
On the contrary, during the period in which the switch Y is on and the switch V is off, current flows in the following two loops.

Capacitor 2 → C ₁ → L → Primary winding of transformer 4 → Y → Capacitor 2 C ₂ → L → Primary winding of transformer 4 → Y → C ₂ These loop currents are the same as those of capacitors C ₁ and C ₂ . It becomes the oscillating current of the reactor L and the capacitors C ₁ and C ₂ have the same capacitance C
Then, the current pulse width T is given by the following equation.

[0042]

[Equation 2]

Therefore, by setting the switching period of the switches V and Y to be larger than the period of the pulse width T, it is possible to perform switching with zero current when the switching V and Y are turned off, and it is possible to reduce switching loss.

Further, when the switches V and Y are turned on, the reactor L can limit the initial current and reduce the switching loss.

The peak value I _P of the oscillating current is limited by the value of the following equation.

[0046]

(Equation 3)

The output capacitance PW of the inverter 3 is given by the following equation.

[0048]

[Formula 4] PW = 2CV _DC ² · f _SW f _SW : Switching frequency (≧ 1 / T) C: Capacitance of capacitor C ₁ (= C ₂ ) _VDC : DC voltage of the inverter 3 Therefore, the oscillating current has a peak value By limiting the I _P and increasing the switching frequency f _SW to obtain the required output capacitance PW, the inductance and current of the reactor L can be reduced as compared with the conventional reactor 6 due to low frequency vibration, and the size thereof can be reduced. It will be possible. Further, the charging voltage accuracy of the capacitor can be improved by the high frequency oscillating current.

[0049] The diode D _1, D ₂ connected in parallel respectively to the capacitors C _1, C _2, a voltage clamp capacitor C _1, C _2, to limit the voltage of the capacitor below the DC voltage V _DC Capacitor C ₁ ,
It is possible to use C ₂ having a low withstand voltage.

Further, in FIG. 1, the switches V and Y have IGBTs, FETs, GTOs, thyristors, MCTs and MOs.
It can be changed to an S-gate thyristor or the like.

Further, the reactor L is realized by an iron core, an air core reactor, a saturable reactor, a stray inductance, a leakage inductance of a transformer or the like alone or in combination.

Further, the transformer 4 may be either a step-up type or a step-down type.

FIGS. 2 to 10 are main part configuration diagrams showing another embodiment of the present invention. Further, each of these embodiments, including the embodiment of FIG. 1, may be combined individually.

FIG. 2 shows a case where the inverter 3 is provided with a small-capacity capacitor 2A in place of the DC capacitor 2 using an electrolytic capacitor and a saturable reactor SI ₀ in series with the reactor L. The present embodiment has the effects of downsizing the capacitor 2A and further reducing the switching loss at turn-on and turn-off due to the saturable reactor.

FIG. 3 shows a case where a saturable reactor SI ₀ is provided in place of the reactor L as the configuration of the inverter 3. This embodiment has the effect of reducing the switching loss as compared with the case where the reactor L is used.

FIG. 4 shows a case where the configuration of the inverter 3 is such that the capacitors C ₁ and C ₂ and the diodes D ₁ and D ₂ in parallel are omitted. With this configuration, the voltage of the capacitors C ₁ and C ₂ exceeds V _DC (maximum 2 V _DC ), but the size of the device can be reduced to the extent that the diodes D ₁ and D ₂ are unnecessary.

FIG. 5 shows a rectifying element structure of the rectifying circuit 5, which is a structure for obtaining a rectifying element of high withstand voltage and large current. These are a configuration (a) in which a plurality of diodes D are connected in series to increase the withstand voltage, a configuration (b) in which a voltage balancing capacitor C _B is connected in parallel to a series connection of a plurality of diodes, and a capacitor for voltage balancing. And resistance R
A configuration in which _B is connected in parallel (c), a configuration in which a plurality of diodes D are connected in parallel to increase the current withstand capability (d), a configuration in which a current balancing resistor R _B is connected in series (e), and further for current balancing A configuration (f) in which the reactor L _B is provided and a configuration (g) in which a series connection body of a diode and a resistor are connected in parallel and a current limiting reactor L _L is provided (g).

FIG. 6 shows a charging circuit configuration from the rectifier circuit 5 to the capacitor C _{0. A} protection diode D _P is provided at the DC output end of the rectifier circuit, and a current limiting reactor L _L is connected in series with the capacitor C _0. A resistor R _L is provided.

In this configuration, the diode D _P is connected to the saturable transformer ST in the subsequent stage after the capacitor C ₀ is discharged.
When it is charged in the opposite polarity by such an operation, it bypasses the rectifier circuit 5 and completely discharges the capacitor C ₀ , thereby protecting the rectifier circuit 5 from overcurrent.

The reactor L _L and resistance R _L are C ₀ → D _P → L
_L → the current limit of R _L → C _0, to protect the rectifier circuit 5 from overcurrent. One or both of the reactor and the resistor may be provided.

FIG. 7 shows the configuration of a voltage detecting circuit for obtaining the desired accurate charging voltage in the capacitor C ₀ by stopping the operation of the inverter 3 when the capacitor C ₀ is charged to the set voltage. . These are a voltage dividing circuit configuration (a) by resistors R ₁ and R _2, a voltage dividing circuit configuration (b) by capacitors C ₃ and C _4, a voltage dividing circuit of resistors R ₁ and R ₂ and capacitors C ₃ and C _4. Are connected in parallel to each other (c).

FIG. 8 shows the configuration of a current detection circuit for protecting switch elements such as the switches V and Y and the diode D from overcurrent. In these configurations, a direct current detector R _I provided in the charging circuit for the capacitor C ₀ detects overcurrent (a), and a shunt resistor SR provided in the charging circuit for the capacitor C ₀ detects overcurrent (a). ), And a configuration (c) in which an overcurrent is detected by the DC current detector R _I provided in the DC circuit of the inverter 3. The configuration of (c) may use the shunt resistor SR.

FIG. 9 shows the configuration of the DC power supply 1 of the inverter 3. These are a configuration (a) in which the AC input is a three-phase power source of 100 V or 200 V, a configuration in which a current suppressing reactor L _L is provided on the output side of the DC power source 1 (b), or an input side of the DC power source 1. A configuration (c) in which a current suppressing reactor L _L is provided, a configuration (d) in which the AC input is a single-phase power supply of 100 V or 200 V, and a current suppressing reactor L _L is provided on the output side of the DC power supply 1 A configuration (e), a configuration (f) in which a current suppressing reactor L _L is provided on the input side of the DC power supply 1, and a configuration (g) in which one diode arm of the DC power supply 1 is a capacitor C _D.

FIG. 10 shows a structure in which a snubber circuit is provided to prevent overvoltage of the inverter 3. A snubber circuit including a discharge resistor R _S , a diode D _S and a capacitor C _S is provided on the DC side of the inverter 3 to protect the switches V and Y and the capacitors C ₁ and C ₂ from overvoltage.

In the above embodiments, the inverter 3
In the case of FIG. 1, the output capacity PW is determined from the following equation, and is designed and manufactured based on the specifications.

[0066]

[Formula 5] PW = 2CV _DC ² · f _SW Therefore, when the capacity is changed due to the difference in scale and type of the pulse power source, it is necessary to change the specifications of the capacitor charging device and the output capacity. For example, to change the capacity, change the capacitors C ₁ and C ₂ of the inverter 3 or change the operating frequency f _sw.
Therefore, a large-scale modification work such as replacement of the switch element is required. An embodiment for solving such a problem is shown in FIGS.

FIG. 11 shows a case where the output current is increased in the configuration of FIG. 1, and the inverter 3 and the transformer 4 and the rectifier circuit 5 have the same configuration as the inverter 3A and the transformer 4A.
And a rectifying circuit 5A are additionally installed and arranged in parallel to supply a charging current to the capacitor C ₀ .

In this structure, the inverters 3 and 3A are synchronously controlled and operated at the same timing and cycle. Therefore, the control circuit of the inverter 3 can be used, and the control signal can be branched and given to the inverter 3A.

According to the present embodiment, the existing charging device is not changed, that is, the capacitors C ₁ , C _2, etc. are replaced.
Inverter 3A and transformer 4A without changing the design
The output current can be doubled by adding the rectifier circuit 5A.

FIG. 12 shows a case where the charging circuit for the capacitor C ₀ in the configuration of FIG. 11 is applied to the device having the configuration of FIG. Also in this case, the output current can be doubled by providing the inverters 3A and the like in parallel.

FIG. 13 shows a rectifier circuit 1 in the configuration of FIG.
This is a case where the output current is doubled by providing the circuit 11 having the same configuration as the circuits from to the rectifier circuit 5. In this case as well, the configuration of the inverter 3 and the like can be changed appropriately.

FIG. 14 shows a case where the rectifier circuits 5 and 5A are connected in series in the configuration of FIG. 11 to charge the capacitor C ₀ . In this case, the capacitor C ₀ can be charged with a double voltage.

In each of the embodiments shown in FIGS. 11 to 14, the inverter 3 has the configuration shown in FIGS. 2 to 4, and the rectifier circuit has one of the configurations shown in FIG. The same can be applied to a configuration in which each unit is appropriately changed.

The output capacity of the inverter 3A and the like is not limited to the same capacity as that of the inverter 3 and the like provided in parallel, but it is 1.5 times as large as the required output capacity such as a configuration having half the capacity. It can be changed to other devices. Also,
Not only two units are provided in parallel, but three or more units can be provided in parallel.

[0075]

As described above, according to the present invention, the inverter has the half bridge structure of the capacitor and the semiconductor switch, and the resonance type inverter is provided with the reactor at the output end.

(1) Switching loss can be reduced by switching the switch with zero current.

(2) Since the vibration frequency can be increased, the reactor and the transformer can be downsized, and the charging voltage accuracy can be improved.

(3) Since the inverter has a half-bridge structure, the number of semiconductor switches can be halved and switching loss can be further reduced.

(4) A reactor for obtaining an oscillating current with a high-voltage capacitor is unnecessary, and the device can be downsized.

(5) Vibration due to a large current directly with the high voltage capacitor is eliminated, and electromagnetic noise can be reduced.

Further, according to the present invention, there are the following effects.

(A) A charging voltage clamping diode for a pair of capacitors is provided in parallel with each of the capacitors, so that the charging voltage of the capacitors is limited and a capacitor having a low withstand voltage can be used.

(B) By including a saturable reactor in the reactor, the switching loss at turn-on can be further reduced.

(C) The rectifier circuit can be reliably protected by providing a current limiting reactor and a resistor in series with the high-voltage capacitor and by providing a protective diode in parallel with the rectifier circuit.

(D) A resonance type inverter and a circuit equivalent to a transformer and a rectifier circuit are provided in parallel, and the inverters are operated synchronously to increase the charging current or voltage of the high voltage capacitor, thereby changing the existing charging device. The output capacity can be increased without doing so.

[Brief description of drawings]

FIG. 1 is a configuration diagram showing an embodiment of the present invention.

FIG. 2 is an inverter configuration diagram showing another embodiment of the present invention.

FIG. 3 is an inverter configuration diagram showing another embodiment of the present invention.

FIG. 4 is an inverter configuration diagram showing another embodiment of the present invention.

FIG. 5 is a configuration diagram of a rectifier circuit showing another embodiment of the present invention.

FIG. 6 is a configuration diagram of a charging circuit showing another embodiment of the present invention.

FIG. 7 is a block diagram of a voltage detection circuit showing another embodiment of the present invention.

FIG. 8 is a configuration diagram of a current detection circuit showing another embodiment of the present invention.

FIG. 9 is a DC power supply configuration diagram showing another embodiment of the present invention.

FIG. 10 is a snubber circuit configuration diagram showing another embodiment of the present invention.

FIG. 11 is a configuration diagram showing another embodiment of the present invention.

FIG. 12 is a configuration diagram showing another embodiment of the present invention.

FIG. 13 is a configuration diagram showing another embodiment of the present invention.

FIG. 14 is a configuration diagram showing another embodiment of the present invention.

FIG. 15 shows an example of a pulse power supply.

FIG. 16 is a configuration diagram of a conventional example.

FIG. 17 is an equivalent circuit diagram of charging a capacitor by vibration.

FIG. 18 is a capacitor initialization circuit diagram.

[Explanation of symbols]

1 ... DC power supply 3, 3A ... Inverter 4, 4A ... Output transformer 5, 5A ... Rectifier circuit 6 ... Reactor C _O ... High voltage capacitors C1, C2 ... Capacitor SI ₀ ... Saturable reactor

Claims (5)

[Claims] 1. A charging device for a high-voltage capacitor used as a high-voltage source, wherein a pair of semiconductor switches and a pair of capacitors are bridge-connected to obtain an oscillating current between the pair of capacitors on an AC output side. And a rectifier circuit for rectifying the output of the transformer to charge the high-voltage capacitor. . 2. The capacitor charging device according to claim 1, wherein diodes for charging voltage clamping of the pair of capacitors are provided in parallel with the capacitors. 3. The capacitor charging device according to claim 1, wherein the reactor comprises a saturable reactor alone or a combination of the reactor and the saturable reactor. 4. A current limiting reactor or resistor, or a series circuit of a reactor and a resistor, is provided in series with the high-voltage capacitor, and a protection diode is provided in parallel with the rectifier circuit. 1 to 3
Capacitor charging device according to item 1. 5. The resonance type inverter, a circuit equivalent to a transformer and a rectifying circuit are provided in parallel, and the inverters are synchronously operated to increase the charging current or voltage of the high voltage capacitor. The capacitor charging device according to any one of claims 1 to 4.