JPH0256032B2 - - Google Patents

Info

Publication number
JPH0256032B2
JPH0256032B2 JP56158467A JP15846781A JPH0256032B2 JP H0256032 B2 JPH0256032 B2 JP H0256032B2 JP 56158467 A JP56158467 A JP 56158467A JP 15846781 A JP15846781 A JP 15846781A JP H0256032 B2 JPH0256032 B2 JP H0256032B2
Authority
JP
Japan
Prior art keywords
circuit
semiconductor switch
switch element
capacitor
power
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP56158467A
Other languages
Japanese (ja)
Other versions
JPS5863076A (en
Inventor
Tetsuo Sueoka
Yoshisuke Takita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Meidensha Electric Manufacturing Co Ltd
Original Assignee
Meidensha Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Meidensha Electric Manufacturing Co Ltd filed Critical Meidensha Electric Manufacturing Co Ltd
Priority to JP56158467A priority Critical patent/JPS5863076A/en
Publication of JPS5863076A publication Critical patent/JPS5863076A/en
Publication of JPH0256032B2 publication Critical patent/JPH0256032B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Thyristors (AREA)
  • Power Conversion In General (AREA)
  • Thyristor Switches And Gates (AREA)

Description

【発明の詳細な説明】 本発明は電力用半導体スイツチ素子の保護回路
に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a protection circuit for power semiconductor switch devices.

サイリスタに代表される電力用半導体スイツチ
素子はそのターンオフに際して主端子間電圧の上
昇率(dv/dt)を所定値以下に抑えるために素
子に並列に過電圧吸収用コンデンサを設けるいわ
ゆるスナバ回路を具える。特に、最近実用化され
つつある電力用ゲートターンオフ(GTO)サイ
リスタはターンオフ速度が早いため、急峻な電圧
上昇率による故障が多く、この保護のためのスナ
バ回路には比較的大きな容量のコンデンサや電流
制限抵抗を必要とする問題があつた。
Power semiconductor switch devices, such as thyristors, are equipped with a so-called snubber circuit in which an overvoltage absorbing capacitor is placed in parallel with the device in order to suppress the rate of increase in the voltage between the main terminals (dv/dt) to a predetermined value or less when the device is turned off. . In particular, power gate turn-off (GTO) thyristors, which have recently been put into practical use, have a fast turn-off speed, so they often fail due to a steep voltage rise rate. I had a problem that required a limiting resistor.

第1図はGTOサイリスタを主スイツチ素子と
する3相制御回路を示し、各GTOサイリスタ
THU,THV,THW,THY,THZには並列にダイ
オードD1とコンデンサC1の直列回路とダイオー
ドD1に並列の放電電流制限抵抗R1から成るスナ
バ回路SNを具える。ここで、抵抗R1は、サイリ
スタのターンオンにおいてコンデンサC1を放電
させておくのにサイリスタのスイツチング耐量を
越えない範囲での放電電流を制限する。この抵抗
R1は、例えばコンデンサC1に2μFを使用し、
600Vの直流電圧で1KHzの繰り返し動作で運転す
ると、1本の抵抗損失は約360ワツトになり、そ
の大形化、消費電力さらに冷却容量増大が問題に
なる。
Figure 1 shows a three-phase control circuit with a GTO thyristor as the main switch element.
TH U , TH V , TH W , T Y , and TH Z are provided with a snubber circuit SN consisting of a series circuit of a diode D 1 and a capacitor C 1 and a discharge current limiting resistor R 1 in parallel with the diode D 1 . Here, the resistor R1 limits the discharge current within a range that does not exceed the switching capability of the thyristor in order to discharge the capacitor C1 when the thyristor is turned on. This resistance
R 1 is, for example, use 2 μF for capacitor C 1 ,
When operated with a DC voltage of 600V and a repetition rate of 1KHz, the resistance loss per wire is approximately 360 Watts, resulting in problems such as increased size, power consumption, and increased cooling capacity.

本発明は過電圧吸収用コンデンサのエネルギー
を直流電源側に回生することによつて放電電流制
限抵抗を省略し得て従来の問題点を解消した保護
回路を提供することを目的とする。
SUMMARY OF THE INVENTION An object of the present invention is to provide a protection circuit which eliminates the conventional problems by regenerating the energy of an overvoltage absorbing capacitor to the DC power supply side and thereby omitting a discharge current limiting resistor.

第2図は本発明の一実施例を示す回路図であ
り、1相分を示す。主スイツチ素子としての
GTOサイリスタTHU,THXには夫々ダイオード
D1と過電圧吸収用コンデンサC1の直列回路が並
列接続され、コンデンサC1には夫々チヨツピン
グ制御用半導体スイツチとしてのトランジスタ
TRとリアクトルトランスTの直列回路が並列接
続される。リアクトルトランスTの二次巻線出力
は夫々整流ダイオードD2に直列接続されて直流
電源ラインP,N間に接続される。
FIG. 2 is a circuit diagram showing one embodiment of the present invention, and shows one phase. As a main switch element
GTO thyristors TH U and TH X each have diodes.
A series circuit of D 1 and overvoltage absorbing capacitor C 1 is connected in parallel, and each capacitor C 1 has a transistor as a semiconductor switch for chopping control.
The series circuit of TR and reactor transformer T is connected in parallel. The secondary winding outputs of the reactor transformer T are each connected in series to a rectifier diode D 2 and connected between DC power lines P and N.

トランジスタTRは、第3図に示すようにGTO
サイリスタTHU又はTHVのオン期間に一定周期
(高周波)でチヨツピング制御され、そのオンで
コンデンサC1に蓄えられているエネルギーはリ
アクトルトランスTの一次入力電流iTとして取込
まれ、トランジスタTRのオフ時に二次巻線から
ダイオードD2を通して整流電流idで直流電源に回
生される。このチヨツピング制御により、コンデ
ンサC1のエネルギーはGTOサイリスタTHU
THLの夫々のオン期間中に全部直流電源に回生
されてその電圧VCは放電状態に戻され、サイリ
スタの次回のターンオフに過電圧吸収可能にされ
る。トランジスタTRのチヨツピング制御はGTO
サイリスタTHU,THXなどのゲート制御回路GC
によるゲート制御信号に同期制御される。
Transistor TR is GTO as shown in Figure 3.
During the ON period of the thyristor TH U or TH V , stepping control is performed at a constant cycle (high frequency), and when the thyristor is ON, the energy stored in the capacitor C 1 is taken in as the primary input current i T of the reactor transformer T, and the energy of the transistor TR is taken in as the primary input current i T of the reactor transformer T. When off, the rectified current i d is regenerated from the secondary winding through diode D 2 to the DC power supply. With this chopping control, the energy of capacitor C 1 is transferred to GTO thyristor TH U ,
During each ON period of THL , the voltage V C is completely regenerated to the DC power supply and returned to the discharge state, and the overvoltage can be absorbed the next time the thyristor is turned off. Chopping control of transistor TR is GTO
Gate control circuit GC for thyristors TH U , TH X , etc.
synchronously controlled by the gate control signal.

なお、トランジスタTR、トランスT、ダイオ
ードD2はダイオードD1、コンデンサC1に一体構
成にしたモジユール回路さらにはトランジスタ
TRのチヨツピング制御回路を含めたモジユール
回路にすることでその取扱いを容易にする。
Note that the transistor TR, transformer T, and diode D 2 are integrated into a module circuit with a diode D 1 and a capacitor C 1 , as well as a transistor.
Making it a modular circuit that includes the TR's chopping control circuit makes it easier to handle.

以上のとおり、本発明による保護回路は、過電
圧吸収用コンデンサのエネルギーを主スイツチ側
に放電するのでなくDC−DC変換により直流電源
側に回生するため、コンデンサからの放電電流を
制限する高い電力容量の抵抗を不要にしてその小
形化を可能とするし、電力損失、放熱の問題を解
消できる。さらに、主スイツチのオン初期に流れ
ていたコンデンサからの放電電流が無くなるた
め、主スイツチにおけるそのオン時スイツチング
損失を大幅に抵減できる。
As described above, the protection circuit according to the present invention has a high power capacity that limits the discharge current from the capacitor because it regenerates the energy of the overvoltage absorption capacitor to the DC power supply side through DC-DC conversion instead of discharging it to the main switch side. This eliminates the need for a resistor, making it possible to downsize the device, and solving problems of power loss and heat dissipation. Furthermore, since the discharge current from the capacitor that flows when the main switch is initially turned on is eliminated, the switching loss in the main switch when it is turned on can be significantly reduced.

また、コンデンサのエネルギーを電源に回生し
て電力効率が良くなるため、該コンデンサの容量
を大きく設計し得ることから、主スイツチとして
のGTOサイリスタのターンオフ電流(ゲートに
よつてオフできる電流)が大きくなり、GTOサ
イリスタの有効活用ができる。さらに、、コンデ
ンサの放電経路には主スイツチが含まれないこと
から、該放電電流による主スイツチの損失を無く
すことができる。これに加えて、コンデンサの放
電にチヨツピングを行うため、該チヨツピング周
波数を高くしてトランスの小型化を図ることがで
きる。
In addition, since the energy of the capacitor is regenerated into the power supply and power efficiency is improved, the capacitance of the capacitor can be designed to be large, so the turn-off current (current that can be turned off by the gate) of the GTO thyristor as the main switch is large. Therefore, the GTO thyristor can be used effectively. Furthermore, since the main switch is not included in the discharge path of the capacitor, loss in the main switch due to the discharge current can be eliminated. In addition, since the capacitor discharges are stepped by stepping, the stepping frequency can be increased to reduce the size of the transformer.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の電力用半導体スイツチ素子の保
護回路図、第2図は本発明の一実施例を示す回路
図、第3図は第2図の動作波形図である。 THU,THX……GTOサイリスタ、C1……過電
圧吸収用コンデンサ、TR……チヨツピング制御
用トランジスタ、、T……リアクトルトランス、
D2……整流用ダイオード、GC……ゲート制御回
路。
FIG. 1 is a protection circuit diagram of a conventional power semiconductor switch element, FIG. 2 is a circuit diagram showing an embodiment of the present invention, and FIG. 3 is an operation waveform diagram of FIG. 2. TH U , TH
D 2 ... Rectifier diode, GC... Gate control circuit.

Claims (1)

【特許請求の範囲】 1 ゲート制御回路によつてオン・オフ制御され
る電力用半導体スイツチ素子のターンオフ時の電
圧上昇率を所定範囲内に抑制するための過電圧吸
収回路において、前記電力用半導体スイツチ素子
に並列接続するダイオードと過電圧吸収用コンデ
ンサの直列回路と、前記過電圧吸収用コンデンサ
に並列接続するチヨツピング制御用半導体スイツ
チとリアクトルトランスの一次側コイルとの直列
回路と、 リアクトルトランスの二次出力を直流電源に回
生するための前記リアクトルトランスの二次側コ
イルと整流用ダイオードとの直列回路を直流電源
の正極と負極間に接続し、前記電力用半導体スイ
ツチ素子のオン期間に前記チヨツピング制御用半
導体スイツチを前記ゲート制御回路によつてチヨ
ツピング制御することで、前記過電圧吸収用コン
デンサに蓄積されたエネルギを直流電源に回生す
ることを特徴とする電力用半導体スイツチ素子の
保護回路。
[Scope of Claims] 1. In an overvoltage absorption circuit for suppressing a voltage rise rate at turn-off of a power semiconductor switch element controlled on and off by a gate control circuit to within a predetermined range, the power semiconductor switch element A series circuit of a diode and an overvoltage absorbing capacitor connected in parallel to the element, a series circuit of a chopping control semiconductor switch and a primary coil of a reactor transformer connected in parallel to the overvoltage absorbing capacitor, and a secondary output of the reactor transformer. A series circuit of the secondary coil of the reactor transformer and a rectifying diode for regenerating the DC power supply is connected between the positive and negative poles of the DC power supply, and the switching control semiconductor is connected during the ON period of the power semiconductor switch element. 1. A protection circuit for a power semiconductor switch element, characterized in that energy stored in the overvoltage absorbing capacitor is regenerated into a DC power source by controlling the switch in a stepping manner by the gate control circuit.
JP56158467A 1981-10-05 1981-10-05 Protection circuit for semiconductor switch element for power Granted JPS5863076A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56158467A JPS5863076A (en) 1981-10-05 1981-10-05 Protection circuit for semiconductor switch element for power

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56158467A JPS5863076A (en) 1981-10-05 1981-10-05 Protection circuit for semiconductor switch element for power

Publications (2)

Publication Number Publication Date
JPS5863076A JPS5863076A (en) 1983-04-14
JPH0256032B2 true JPH0256032B2 (en) 1990-11-29

Family

ID=15672373

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56158467A Granted JPS5863076A (en) 1981-10-05 1981-10-05 Protection circuit for semiconductor switch element for power

Country Status (1)

Country Link
JP (1) JPS5863076A (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6139866A (en) * 1984-07-27 1986-02-26 Mitsubishi Electric Corp Inverter
DE3436656A1 (en) * 1984-10-03 1986-04-03 Licentia Gmbh Circuitry for power semiconductors which can be switched off
DE3639495A1 (en) * 1986-11-20 1988-05-26 Licentia Gmbh Circuitry for the switches of pulse-controlled invertors and DC semiconductor controllers for multi-quadrant operation
JPH03261377A (en) * 1990-03-09 1991-11-21 Toshiba Corp Protector of power converter
US5400235A (en) * 1992-08-07 1995-03-21 International Business Machines Corp. High frequency energy saving DC to DC power converter

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5725723A (en) * 1980-07-23 1982-02-10 Toshiba Corp Surge absorbing circuit of gto thyristor

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58386Y2 (en) * 1978-04-28 1983-01-06 株式会社東芝 Transistor surge absorption circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5725723A (en) * 1980-07-23 1982-02-10 Toshiba Corp Surge absorbing circuit of gto thyristor

Also Published As

Publication number Publication date
JPS5863076A (en) 1983-04-14

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