JP2000278949A - Capacitor charger - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a capacitor charger operating stably at low cost without overshooting the charging voltage by operating all converter circuits of identical output power in parallel and stopping a part of the converter circuits before a capacitor is charged with a target charging voltage. SOLUTION: The capacitor charger charges a capacitor by operating a plurality of converter circuits, each comprising inverter circuits 2, 3 of substantially same output power and rectifiers 8, 9, in parallel. All converter circuits are operated from the starting time of charging the capacitor and operation of a part of the converter circuits is stopped when the charging voltage reaches a preset level before reaching a target charging voltage. Subsequently, the number of operating converter circuits is decreased. Furthermore, a plurality of converter circuits of same output voltage are manufactured and required number of converter circuits are determined and connected in parallel depending on the required output voltage thus standardizing the converter circuit.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a capacitor charger for charging a capacitor by operating a plurality of converter circuits in parallel, and more particularly to a capacitor charger suitable for a high-speed capacitor charger.

[0002]

2. Description of the Related Art In a pulse laser such as a copper vapor laser and an excimer laser, a condenser charged to a high voltage of several kV to several tens kV is discharged to a laser tube at high speed to excite laser light. In a pulse laser application device, the higher the number of laser light excitations, that is, the higher the number of charge / discharge repetitions of a capacitor, the more the performance of the device is improved. In recent years, high repetition of several kHz has become an issue. For this reason, the charger for this capacitor also needs to be able to perform high-speed repetitive operation of high-speed charging, which completes charging in a few 100 μs.

[0003] Conventional chargers use a converter circuit that is a combination of an inverter circuit and a rectifier.
As the charging time is shortened, the charging current increases, and the converted power increases. For example, a capacitor with a capacitance C of 100 nF
Charging to a voltage of 12 kV in 300 μs requires a converter circuit with an output power of about 50 kW. If such a large output power converter circuit is composed of a single converter circuit, the operating frequency is limited because the switching elements used are limited to relatively low speed semiconductor elements such as IGBTs. is there. In a charger, controllability issues arise at low conversion frequencies. That is, if the conversion power is the same, the lower the conversion frequency, the larger the transmission power in one cycle and the larger the step of the charging voltage, and even if the converter circuit is stopped when the charging voltage reaches the set value, It is easy to overshoot and it is difficult to accurately set the charging voltage to the set value.

As a conventional method and apparatus for solving such a problem, Japanese Patent Application Laid-Open No. 9-307165 or
-52039 discloses a capacitor charging device. In these devices, two main converter circuits and a converter circuit for fine adjustment are connected in parallel. First, only the main converter circuit with a large output power is operated and the charging voltage of the capacitor is increased up to just before the target charging voltage at a steep slope. After that, the operation of the main converter circuit is stopped, and at the same time, the charging voltage of the capacitor is increased to the set voltage with a gentle slope by operating the converter circuit for small adjustment of small output power, so that the charging voltage overshoots. And improve the charging speed and charging accuracy at the same time.

However, these conventional devices have the following disadvantages. (1) First, two or more types of converter circuits with different output powers are necessary.Especially, when trying to obtain such a charging device with several output powers, the output powers that are twice as large as the types of output powers are required. A converter circuit is required, and it cannot be standardized, so that there is a serious problem that the cost cannot be reduced. (2) In the conventional device, the main converter circuit is operated until the charging voltage of the capacitor reaches a certain point before the set value, and during this period, the fine adjustment converter circuit is stopped, and the main converter circuit is stopped at the time, Since the fine-adjustment converter circuit is switched for operation or the like, the control system becomes complicated, and the operation becomes unstable when the converter circuit is switched.

[0006]

According to the present invention, all converter circuits having the same output power are operated in parallel, and some converter circuits are stopped at a certain point in time before a capacitor is charged to a target charging voltage. An object of the present invention is to provide a low-cost capacitor charging device that operates stably without overshoot in the charging voltage of the capacitor.

[0007]

In order to solve this problem, the present invention provides a capacitor charger for charging a capacitor by operating a plurality of converter circuits each including an inverter circuit and a rectifier having substantially the same output power in parallel. And
Operating all of the converter circuits from the start of charging the capacitor, stopping some of the converter circuits at a predetermined set voltage value before the charging voltage reaches the target charging voltage, and reducing the number of operating units. The present invention proposes a capacitor charger characterized by the following.

[0008]

FIG. 1 is an example of an embodiment of a capacitor charger according to the present invention in which two high-frequency converter circuits having the same output power are arranged in a parallel operation configuration. The DC power of the DC power supply 1 rectified from the commercial AC voltage is supplied to two pulse width modulation (PWM) inverter circuits 2
, 3 and converted to high-frequency AC power. First
Inverter circuit 2 is composed of switching elements S1
S4, the second inverter circuit is a similar switching element S5
~ S8. The output of each inverter circuit is connected to a load capacitor 10 through resonant inductors 4 and 5, high voltage transformers 6 and 7, and high voltage rectifiers 8 and 9. 1
1 and 12 are resonance capacitors of each inverter circuit. The charging voltage of the high voltage capacitor 10 of the load is converted into an appropriate voltage of several volts by the voltage detecting voltage dividing resistors 13 and 14 and sent to the charging control circuit 15.

FIG. 2 is a circuit block diagram of the inside of the charge control circuit 15. The oscillation circuit 16 has a conversion frequency of 2
In the case of an inverter circuit having a conversion frequency of, for example, 20 kHz, it oscillates at a frequency of 40 kHz to generate a pulse train P1. Since the pulse train P1 is selected to have a maximum pulse width of 22 μs with a pause of several μS, the inverter circuit 2
, 3 do not turn on beyond the maximum pulse width.

As shown in FIG. 3, the pulse train P 1 is sequentially and alternately distributed to the A phase and the B phase at a phase angle of 180 ° by the flip-flop 17 and the AND gates 18 and 19 to form pulse trains P 2 and P 3. . The pulse train P2 is supplied to one of the input terminals of the AND gates 20 and 22, and the pulse train P3 is supplied to the AND gate.
It is supplied to one of the input terminals 21 and 23.

On the other hand, the first comparator 24 compares the detection signal of the charging voltage of the capacitor 10 input to one input terminal with the reference voltage VS of the other input terminal to generate an inverter-on signal P4. . Also, the second comparator
Reference numeral 25 denotes a detection signal of the charging voltage of the capacitor 10 input to one input terminal and a reference voltage VS ′ (for example, VS ′ = 0.95 VS) that is somewhat smaller than the reference voltage VS through the voltage divider 26.
To generate another inverter-on signal P5. Here, the inverter-on signal P5 has a pulse width shorter than the inverter-on signal P4 by the time width Td because the reference voltage VS 'is somewhat smaller than the reference voltage VS of 0.95. The inverter ON signal P4 is supplied to the other input terminal of the AND gates 20 and 21, and the inverter ON signal P5 is supplied to the AND gate 22.
And 23 are supplied to the other input terminals.

The AND gates 20 and 21 generate drive pulse trains P6 and P7 by ANDing the inverter-on signal P4 and the pulse trains P2 and P3, respectively, and the AND gates 22 and 23 perform inverter-on signal P5 and the pulse trains P2 and P3, respectively. Are ANDed to generate drive pulse trains P8 and P9. The driving pulse train P6 is the first
The drive pulse train P7 is applied to the gates of the switching elements S1 and S2 of the inverter circuit 2 of the first inverter circuit 2.
Is applied to the gates of the switching elements S3 and S4. The drive pulse train P8 is applied to the gates of the switching elements S5 and S6 of the second inverter circuit 3, and the drive pulse train P8
Is applied to the gates of the switching elements S7 and S8 of the second inverter circuit 3.

Here, the drive pulse trains P 6 and P 7 are not generated at a time point earlier than the drive pulse train P 8 by the time width Td, and therefore, the second inverter circuit 3 has a time width Td longer than the first inverter circuit 2. Operation stops early. The set voltage value is, for example, about 85% to 90% of the target charging voltage of the capacitor 10, and is predetermined. Even after the second inverter circuit 3 is stopped, the first inverter circuit 2 continues to operate and raises the charging voltage of the capacitor 10 with a gentle gradient, and charges the capacitor 10 to the target charging voltage with almost no overshoot.

In the above embodiment, two converter circuits are connected in parallel. However, three or more converter circuits may be used. For example, if 40 kW of output power is required to charge the capacitor 10, two converter circuits with output power of 20 kW may be connected in parallel, and the next time output power of 55 kW to 60 kW is required. All that is required is to connect three converter circuits with a power of 20 kW in parallel. In this way, the output power that one converter circuit should have is selected, multiple converter circuits with the same output power are manufactured, and the required number of converter circuits is determined according to the required output power and connected in parallel. By doing so, it becomes unnecessary to manufacture converter circuits of various output powers, standardization of the converter circuits is achieved, and cost reduction and failure reduction can be achieved. When there are three or more converter circuits, the operation of the other converter circuits may be stopped immediately before the target charging voltage except for one converter circuit. Also, 90% of the target charging voltage
Can be reduced to two, and 95% to one.

In the embodiment described above, FETs are used as the switching elements S1 to S8.
Alternatively, a bipolar transistor, a thyristor, or the like may be used.

According to a first embodiment of the present invention, a capacitor charger for charging a capacitor by operating a plurality of converter circuits in parallel includes inverter circuits having the same frequency and divided phases, respectively.

In a second embodiment of the present invention, among the reference voltages of the respective converter circuits compared with the detected value of the charging voltage of the capacitor, the reference voltage of a part of the converter circuits is changed to another reference voltage. It is set lower than the voltage.

[0018]

As described above, according to the present invention, a plurality of converter circuits each including an inverter circuit and a rectifier having substantially the same output power are operated in parallel, and a predetermined voltage before the charging voltage reaches the target charging voltage is determined. Since the number of operating units is reduced by stopping some converter circuits at the set voltage value, it is possible not only to suppress overshoot of charging voltage, but also to standardize converter circuits and reduce costs. it can.

Further, by changing the reference voltage to be compared with the detection voltage of the output voltage by using the common oscillator, only a part of the converter circuit is stopped at a predetermined set voltage value before reaching the target charging voltage. Therefore, the occurrence of malfunction of the converter circuit and the instability of the output can be reduced as compared with the conventional device that switches the operation.

[Brief description of the drawings]

FIG. 1 shows a main circuit of an embodiment of a capacitor charger according to the present invention.

FIG. 2 shows a control circuit of an embodiment of the capacitor charger according to the present invention.

FIG. 3 shows waveforms and charging characteristics showing the operation of each part of the capacitor charger according to the present invention.

[Explanation of symbols]

1 DC power supply 2, 3 Inverter circuit 4, 5 Resonant inductor 6, 7 Transformer 8, 9 Rectifier 10 Load capacitor 11, 12 Resonance Capacitors 13, 14 ...
Voltage detection resistor for voltage detection 15 ... Charge control circuit 16 ... Oscillation circuit 17 ... Flip-flop 18-23 ... And gate 24,25 ... Comparator 26 ... Voltage divider S1-S8 ... Switching elements

Continued on front page F term (reference) 5F071 AA03 AA06 GG02 GG03 GG05 HH03 JJ05 JJ08 JJ09 5G003 AA01 BA01 CA14 CC08 GA01 GB04 5H730 AA15 AS17 BB27 BB57 BB61 BB82 DD04 EE04 EE07 FD01 FG05

Claims (1)

[Claims] 1. A capacitor charger for charging a capacitor by operating a plurality of converter circuits each comprising an inverter circuit and a rectifier having substantially equal output power in parallel.
Operating all of the converter circuits from the start of charging of the capacitor, stopping some of the converter circuits at a predetermined set voltage value before the charging voltage reaches the target charging voltage, and reducing the number of operating units. Characteristic capacitor charger.