JPH0824123B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Outline] According to the present invention, a semiconductor device in which a carrier travels in a direction perpendicular to a semiconductor substrate is grown on a semiconductor substrate up to its base layer, and an electrode which makes ohmic contact with the base layer is provided. After that, by re-growing a required semiconductor layer on the base layer, even if the thickness of the base layer is about several nm, it is possible to easily manufacture with good controllability.

[Industrial applications]

The present invention relates to a method for manufacturing a semiconductor device, in particular, a semiconductor device having a bipolar structure in which carriers run in a direction perpendicular to a substrate, and a semiconductor that can be easily realized even in a semiconductor device whose base layer is only a few nm thick, for example. The present invention relates to a method of manufacturing a device.

Various compound semiconductor devices in which carriers travel in a direction perpendicular to the semiconductor laminated structure including a heterojunction have been developed and are expected as high-speed devices, but the base layer located in the middle of the laminated structure has a thickness of, for example, about several nm. There is a demand for a manufacturing method for realizing a semiconductor device which is nothing more than the above.

[Conventional technology]

As an example of a bipolar-structured compound semiconductor device in which carriers travel vertically through a semiconductor laminated structure, the present applicant has previously filed Japanese Patent Application Nos. 59-75885 and 59-75886.
Quantized base transistor (QBT) provided by
Has a structure as shown in FIG. 2, for example.

This QBT is, for example, a semi-insulating gallium arsenide compound (GaA
s) n-type GaAs collector layer 12, i-type aluminum gallium arsenide compound (AlGaAs) collector barrier layer 1 on substrate 11
3, p ⁺ type GaAs base layer 14, i type AlGaAs emitter barrier layer 1
5. The n-type GaAs emitter layer 16, the collector electrode 17, the base electrode 18, and the emitter electrode 19 are provided. The p ⁺ -type GaAs base layer 14, which is a well layer of a quantum well structure, quantizes carrier movement in the thickness direction. The i-type AlGaAs barrier layers 13 and 15 are formed to have a thickness of several nm so that carriers can transit due to the tunnel effect, and the carriers are transferred from the emitter to the collector by resonance tunneling. Very fast motion is obtained to reach.

[Problems to be solved by the invention]

As a general method of manufacturing an electrode that contacts a base layer located in the middle of a laminated bipolar compound semiconductor device, a semiconductor substrate on which required semiconductor layers are laminated is used to define, for example, an emitter region above the semiconductor substrate. Moreover, the base electrode is provided by performing an etching process for providing a base / contact surface, but an impurity diffusion region is formed before the electrode is formed, and alloying is often performed by flash lamp heating or the like after the electrode is formed.

This manufacturing method is applied to, for example, a heterojunction bipolar transistor (HBT), but in the above QBT and the like, the base layer and the barrier layers above and below are extremely thin, each having a thickness of several nm. Both diffusion and alloying processes are extremely difficult.

It is an object of the present invention to cope with such a situation and facilitate the production of QBT and the like and promote the practical use thereof.

[Means for solving problems]

The problem is that a step of growing a first semiconductor layer to be a collector or emitter layer and a second semiconductor layer to be a base layer on a semiconductor substrate, and an ohmic contact electrode on a predetermined region of the second semiconductor layer. And a step of growing a third semiconductor layer to be an emitter or collector layer on the second semiconductor layer outside the region where the electrode is formed, which is solved by the method for manufacturing a semiconductor device according to the present invention. To be done.

[Work]

According to the present invention, the growth of the semiconductor layer of the semiconductor device having the bipolar structure is temporarily stopped up to the base layer, the ohmic contact electrode is disposed on the base layer, and then the remaining required semiconductor layer is regrown. The selective etching, which is a bottleneck of the conventional manufacturing method of the extremely thin QBT and the like, is not necessary and can be easily realized.

It should be noted that an electrode is formed of a heat-resistant material that does not cause a metallurgical reaction between the electrode and the semiconductor layer at the growth temperature of the semiconductor layer after the electrode is disposed, and good ohmic contact is made without alloying with this electrode. In order to obtain it, it is desirable to select the composition of the base layer, impurity doping, and the like.

〔Example〕

Hereinafter, the present invention will be described in detail with reference to Examples in which schematic sectional views in order of steps are shown in FIGS.

See Fig. 1 (a): Semi-insulating indium phosphide (InP)
First, the base layer 4 is sequentially epitaxially grown on the substrate 1 by the MBE method as described below. However, growth temperature
Ts = 450 ℃.

The p ⁺ -type In _0.53 Ga _0.47 As base layer 4 of this embodiment is composed of two layers.
Be atomic plate doping with a surface concentration of 5 × 10 ¹² cm ^-2
The concentration of holes as carriers is 2 × 10 ¹⁹ cm ⁻³ . The Si doping of the n ⁺ type collector layer 2 is an ordinary uniform doping.

On this semiconductor substrate, for example, tungsten silicide (WSi _x , x≈0.6) is deposited to a thickness of about 300 nm by a sputtering method or the like, and carbon tetrafluoride (CF ₄ ) to which oxygen (O ₂ ) is added is dried. This is patterned by an etching method to form the base electrode 8.

See FIG. 1 (b): This semiconductor substrate is housed in an MBE growth apparatus, and the surface of the base layer 4 is first cleaned by an ECR (electron cyclotron resonance) plasma etching method or the like.

Subsequently, for example, the growth temperature Ts is set to 400 ° C., and the base layer 4
The following semiconductor layers are grown on top.

The deposition of the polycrystalline state on the electrode 8 by this MBE growth process is selectively removed with respect to the single crystal by a hydrofluoric acid (HF) -based etching solution.

See FIG. 1 (c): On the emitter layer 6, for example, chromium (Cr) 50 nm and gold (Au) emitter electrode 9 of about 250 nm
And the collector electrode 7 having the same structure is provided by performing selective etching to expose the collector layer 2.

As described above, according to the present invention, it is possible to easily dispose the base electrode 8 even in a semiconductor device in which the base layer 4 is thin and it is extremely difficult to form the ohmic contact electrode by the conventional manufacturing method, and to realize the expected high speed. You can

The present invention is not limited to the QBT cited in the above description, but may be a heterojunction bipolar transistor (HB
T) or hot electron transistor (HET)
For semiconductor devices that can operate with a base layer thicker than QBT, the base layer is thinned by the manufacturing method of the present invention,
Further improvement in operating speed can be realized.

Further, although the collector layer is on the substrate side in the above-mentioned embodiments, the present invention can be similarly applied to a structure in which the emitter layer is on the substrate side and the collector layer is on the uppermost layer.

〔The invention's effect〕

As described above, according to the present invention, a bipolar structure semiconductor device in which carriers run in a direction perpendicular to the semiconductor laminated structure can be easily manufactured with good controllability even when the base layer has a thickness of, for example, about several nm. Therefore, it is possible to sufficiently exhibit the high speed expected for this type of semiconductor device.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view in order of the processes of an embodiment of the present invention, and FIG. 2 is a schematic cross-sectional view of QBT. In the figure, 1 is a semi-insulating InP substrate, 2 is an n ⁺ type In _0.53 Ga _0.47 As collector layer, 3 and 5 are undoped Al _0.48 In _0.52 As barrier layers, 4 is a p ⁺ type In _0.53 Ga _0.47 As base layer , 6 is an n ⁺ type In _0.53 Ga _0.47 As emitter layer, 7 is a collector electrode, 8 is a WSi _x base electrode, and 9 is an emitter electrode.

Claims (2)

[Claims] 1. A step of growing a first semiconductor layer to be a collector or emitter layer and a second semiconductor layer to be a base layer on a semiconductor substrate, and an ohmic contact electrode on a predetermined region of the second semiconductor layer. And a step of growing a third semiconductor layer to be an emitter or collector layer on the second semiconductor layer outside the region where the electrode is formed. . 2. The method of manufacturing a semiconductor device according to claim 1, wherein the base layer is a well layer having a quantum well structure.