JPH08162767A - Mounting structure for ball grid array - Google Patents

Mounting structure for ball grid array

Info

Publication number
JPH08162767A
JPH08162767A JP6304944A JP30494494A JPH08162767A JP H08162767 A JPH08162767 A JP H08162767A JP 6304944 A JP6304944 A JP 6304944A JP 30494494 A JP30494494 A JP 30494494A JP H08162767 A JPH08162767 A JP H08162767A
Authority
JP
Japan
Prior art keywords
wiring board
printed wiring
via hole
grid array
ball grid
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6304944A
Other languages
Japanese (ja)
Other versions
JP2715945B2 (en
Inventor
Kazuyuki Oyama
和之 大山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP6304944A priority Critical patent/JP2715945B2/en
Publication of JPH08162767A publication Critical patent/JPH08162767A/en
Application granted granted Critical
Publication of JP2715945B2 publication Critical patent/JP2715945B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

Landscapes

  • Wire Bonding (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE: To simplify the wiring of the entire circuit including a ball grid array package by employing a through via hole for the pads formed on a printed wiring board being connected with a part or all of metal bump electrodes formed on a ball grid array package. CONSTITUTION: A plurality of metal bump electrodes 2 are formed in grid on the mounting surface of a ball grid array package 1. On the other hand, a plurality of bump connection pads 3 made of a conductive member and through via holes 6 are provided on the mounting surface of a printed wiring board 5. The through via hole 6 penetrates the central part of a bump connection pad 4 from the surface to the rear of the printed wiring board 5 and entirely composed of the same member as the bump connection pads 3. The through via hole 6 has an I-shaped profile and the hole diameter is set at 0.3mm or less. The through via hole 6 is connected, at one end thereof, with a second pattern layer 12 of the printed wiring board 5 and, at the other end thereof, with a third pattern layer 13.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、ボールグリッドアレイ
パッケージの実装構造に係り、特に、実装にヴィアホー
ルを用いるボールグリッドアレイパッケージの実装構造
に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ball grid array package mounting structure, and more particularly to a ball grid array package mounting structure using via holes for mounting.

【0002】[0002]

【従来の技術】図2に従来例を示す。この図2におい
て、ボールグリッドアレイ(以下BGA)パッケージ5
1の実装側表面には複数の金属バンプ電極52がグリッ
ド状(格子状)に形成されている。一方、このBGAパ
ッケージ51が実装されるプリント配線板55の実装表
面には、導電性の部材からなる複数のバンプ接続用パッ
ド53及びヴィアホール54が設けられている。ヴィア
ホール54の口径は、金属バンプ電極52の直径よりも
幾分小さく設定されている。これらのバンプ接続用パッ
ド53及びヴィアホール54は、それぞれが複数の金属
バンプ電極52に相対応する位置に配設されている。そ
して、当該バンプ接続用パッド53及びヴィアホール5
4上に金属バンプ電極52が固定され電気的に接続され
ることによりBGAパッケージ51の実装が成されてい
る。ここで、ヴィアホール54は、縦断面がU字状に形
成されており、このU字状の底部分がプリント配線板5
5の内層に設けられた第2パターン層62と短絡されて
いる。これにより、第2パターン層62から金属バンプ
電極52に配線が引き出され、所望の回路が形成されて
いる。また、プリント配線板55は、第1乃至第4のパ
ターン層61〜64を備え、このうちプリント配線板5
5の実装面に配設された第1のパターン層と裏面に配設
された第4のパターン層とは一般的にスルーホールによ
り接続されている(図示略)。
2. Description of the Related Art FIG. 2 shows a conventional example. In FIG. 2, a ball grid array (BGA) package 5
A plurality of metal bump electrodes 52 are formed on the surface of the mounting side of No. 1 in a grid shape. On the other hand, on the mounting surface of the printed wiring board 55 on which the BGA package 51 is mounted, a plurality of bump connecting pads 53 and via holes 54 made of a conductive member are provided. The diameter of the via hole 54 is set to be slightly smaller than the diameter of the metal bump electrode 52. The bump connecting pads 53 and the via holes 54 are arranged at positions corresponding to the plurality of metal bump electrodes 52, respectively. Then, the bump connecting pad 53 and the via hole 5
The BGA package 51 is mounted by fixing and electrically connecting the metal bump electrode 52 on the surface 4. Here, the via hole 54 has a U-shaped vertical cross section, and the bottom portion of this U-shaped portion is the printed wiring board 5.
5 is short-circuited with the second pattern layer 62 provided on the inner layer. As a result, the wiring is drawn from the second pattern layer 62 to the metal bump electrode 52, and a desired circuit is formed. Further, the printed wiring board 55 includes first to fourth pattern layers 61 to 64, of which the printed wiring board 5 is provided.
The first pattern layer disposed on the mounting surface of No. 5 and the fourth pattern layer disposed on the back surface are generally connected by through holes (not shown).

【0003】[0003]

【発明が解決しようとする課題】しかしながら、上記従
来例にあっては、特に多層プリント配線板にBGAパッ
ケージを実装し回路を構成する場合に、別途スルーホー
ル等を介しての配線が必要となり、配線の為の領域(面
積)を広くとる必要が生じ、これがため、部品実装の高
密度化が妨げられるという不都合があった。また、配線
が複雑化するため回路設計に高度な技術を必要とすると
いう不都合があった。更に、U字状のヴィアホールの形
成は製造工程上複雑であり、原価の上昇を招来するとい
う不都合があった。
However, in the above-mentioned conventional example, especially when a BGA package is mounted on a multilayer printed wiring board to form a circuit, additional wiring is required through through holes, etc., It is necessary to take a large area (area) for wiring, which hinders high density mounting of components. In addition, there is a disadvantage that a sophisticated technique is required for circuit design because the wiring is complicated. Further, the formation of the U-shaped via hole is complicated in the manufacturing process, and there is an inconvenience that the cost is increased.

【0004】[0004]

【発明の目的】本発明は、かかる従来例の有する不都合
を改善し、特に、部品実装の高密度化を図ると共に製造
原価の低減を図ったボールグリッドアレイパッケージの
実装構造を提供することを、その目的とする。
SUMMARY OF THE INVENTION It is an object of the present invention to provide a mounting structure of a ball grid array package which improves the disadvantages of the conventional example, and in particular, achieves high density mounting of components and reduction of manufacturing cost. To that end.

【0005】[0005]

【課題を解決するための手段】請求項1記載の発明で
は、ボールグリッドアレイ(以下BGA)パッケージ
を、ハンダバンプ電極を介してプリント配線板に接続す
るBGAパッケージの実装構造において、BGAパッケ
ージに形成された金属バンプ電極の一部または全部に接
続されるプリント配線板のバンプ接続用パッドを貫通ヴ
ィアホールとした、という構成を採っている。
According to a first aspect of the present invention, a ball grid array (hereinafter BGA) package is formed on a BGA package in a BGA package mounting structure in which a solder bump electrode is connected to a printed wiring board. The bump connecting pads of the printed wiring board connected to part or all of the metal bump electrodes are through via holes.

【0006】請求項2記載の発明では、プリント配線板
として、厚さが1〔mm〕以下のものを使用する、とい
う構成を採っている。
According to the second aspect of the present invention, the printed wiring board having a thickness of 1 mm or less is used.

【0007】請求項3記載の発明では、貫通ヴィアホー
ルには、その直径が0.3〔mm〕以下のものを使用す
る、という構成を採っている。これにより、前述した目
的を達成しようとするものである。
According to the third aspect of the present invention, the through via hole has a diameter of 0.3 mm or less. This aims to achieve the above-mentioned object.

【0008】[0008]

【作用】請求項1記載の発明では、貫通ヴィアホール
は、例えば、各種電子部品の実装穴を設けるのと同工程
において形成される。また、貫通ヴィアホールが、従来
別途設けられていたスルーホールが接続するのと同一の
パターン層から配線を引き出す場合には、当該貫通ヴィ
アホールがスルーホールの機能を兼備する。特にプリン
ト配線板が内部に複数のプリントパターン層を装備する
ものであれば、当該プリントパターン層の全てが必要に
応じて貫通ヴィアホールに接続される。
According to the first aspect of the invention, the through via hole is formed, for example, in the same process as that for forming mounting holes for various electronic components. Further, when the wiring is drawn from the same pattern layer to which the through-hole that is conventionally provided is connected, the through-via hole also has the function of the through-hole. In particular, if the printed wiring board has a plurality of print pattern layers inside, all of the print pattern layers are connected to the through via holes as necessary.

【0009】ここで、実装構造の組立は以下の手順によ
る。先ず、プリント配線板に設けられたバンプ接続用パ
ッド及び貫通ヴィアホールに印刷法等により半田ペース
トを0.1〔mm〕〜0.2〔mm〕程度の厚さで供給
する。次に、部品実装機によりBGAパッケージをプリ
ント配線板に実装する。このとき、金属バンプ電極の位
置とバンプ接続用パッド又は貫通ヴィアホールとの位置
が相対応するように設定する。そして、BGAパッケー
ジが実装されたプリント配線板を赤外線等を用いたリフ
ロー炉に通す。これにより、バンプ接続用パッド及び貫
通ヴィアホールに予め供給した半田ペーストが溶融さ
れ、複数の金属バンプ電極とこれに対応するバンプ接続
用パッド又は貫通ヴィアホールが電気的且つ物理的に接
続される。
Here, the assembly of the mounting structure is performed by the following procedure. First, the solder paste is supplied to the bump connection pads and the through via holes provided on the printed wiring board by a printing method or the like in a thickness of about 0.1 [mm] to 0.2 [mm]. Next, the BGA package is mounted on the printed wiring board by the component mounter. At this time, the position of the metal bump electrode and the position of the bump connecting pad or the through via hole are set to correspond to each other. Then, the printed wiring board on which the BGA package is mounted is passed through a reflow furnace using infrared rays or the like. As a result, the solder paste previously supplied to the bump connecting pads and the through via holes is melted, and the plurality of metal bump electrodes and the corresponding bump connecting pads or through via holes are electrically and physically connected.

【0010】請求項2又は3記載の発明では、リフロー
炉において溶融され貫通ヴィアホールに流れ込んだ半田
ペーストの量が、当該貫通ヴィアホール内の容積に対し
不足することが防止される。
According to the second or third aspect of the invention, the amount of the solder paste melted in the reflow furnace and flowing into the through via hole is prevented from being insufficient with respect to the volume in the through via hole.

【0011】[0011]

【実施例】以下、本発明の一実施例を図1に基づいて説
明する。
An embodiment of the present invention will be described below with reference to FIG.

【0012】図1において、BGAパッケージ1の実装
側表面には複数の金属バンプ電極2がグリッド状(格子
状)に形成されている。一方、このBGAパッケージ1
が実装されるプリント配線板5の実装表面には、導電性
の部材からなる複数のバンプ接続用パッド3及び貫通ヴ
ィアホール6が設けられている。
In FIG. 1, a plurality of metal bump electrodes 2 are formed in a grid shape on the surface of the BGA package 1 on the mounting side. On the other hand, this BGA package 1
On the mounting surface of the printed wiring board 5 on which is mounted, a plurality of bump connecting pads 3 and through via holes 6 made of a conductive member are provided.

【0013】上記構成を更に詳述すると、BGAパッケ
ージ1は、金属バンプ電極2を備える面とは反対側に半
導体チップを搭載している(図示略)。これら半導体チ
ップの信号端子は、ワイヤボンディングやフリップチッ
プ等の手法によりBGAパッケージ1に接続されてい
る。また、半導体チップの各信号線は、BGAパッケー
ジ1の内部で所定の金属バンプ電極2と結線されてい
る。
More specifically, the BGA package 1 has a semiconductor chip mounted on the side opposite to the surface having the metal bump electrodes 2 (not shown). The signal terminals of these semiconductor chips are connected to the BGA package 1 by a method such as wire bonding or flip chip. Further, each signal line of the semiconductor chip is connected to a predetermined metal bump electrode 2 inside the BGA package 1.

【0014】プリント配線板5は、本実施例において、
多層プリント配線板であり、その表裏面に第1及び第4
パターン層11,14を備え、その内部に第2及び第3
パターン層12,13を備えている。プリント配線板5
の厚さは1.0〔mm〕以下に設定されている。
The printed wiring board 5 in this embodiment is
It is a multilayer printed wiring board, and the first and fourth layers are on the front and back surfaces.
The pattern layers 11 and 14 are provided, and the second and third layers are provided therein.
The pattern layers 12 and 13 are provided. Printed wiring board 5
Has a thickness of 1.0 [mm] or less.

【0015】貫通ヴィアホール6は、バンプ接続用パッ
ド4の中心部をプリント配線板5の表面から裏面まで貫
通させたものとして全体がバンプ接続用パッド3と同一
の部材により形成されている。本実施例において、貫通
ヴィアホール6の縦断面はI字状に形成され、その穴径
は0.3〔mm〕以下に設定されている。また、図1中
の貫通ヴィアホール6は、一方がプリント配線板5の第
2パターン層12に接続され、他方が第3パターン層1
3に接続されている。貫通ヴィアホール6は、各種電子
部品の実装穴を設けるのと同工程において形成される。
The through via hole 6 is formed of the same member as the bump connecting pad 3 as a whole by penetrating the central portion of the bump connecting pad 4 from the front surface to the back surface of the printed wiring board 5. In this embodiment, the vertical cross section of the through via hole 6 is formed in an I shape, and the hole diameter is set to 0.3 [mm] or less. One of the through via holes 6 in FIG. 1 is connected to the second pattern layer 12 of the printed wiring board 5, and the other is the third pattern layer 1
Connected to 3. The through via hole 6 is formed in the same process as that for forming mounting holes for various electronic components.

【0016】次に、本実施例における実装構造の組立手
順を説明する。先ず、プリント配線板5に設けられたバ
ンプ接続用パッド3及び貫通ヴィアホール6に印刷法等
により半田ペーストを0.1〔mm〕〜0.2〔mm〕
程度の厚さで供給する。次に、部品実装機によりBGA
パッケージ1をプリント配線板5に実装する。このと
き、金属バンプ電極2の位置とバンプ接続用パッド3又
は貫通ヴィアホール6との位置が相対応するように設定
する。そして、BGAパッケージ1が実装されたプリン
ト配線板5を赤外線等を用いたリフロー炉に通す。これ
により、バンプ接続用パッド3及び貫通ヴィアホール6
に予め供給した半田ペーストが溶融され、複数の金属バ
ンプ電極2とこれに対応するバンプ接続用パッド3又は
貫通ヴィアホール6が電気的且つ物理的に接続される。
この結果、所望の回路が形成される。
Next, a procedure for assembling the mounting structure in this embodiment will be described. First, a solder paste is applied to the bump connection pads 3 and the through via holes 6 provided on the printed wiring board 5 by a printing method or the like to form 0.1 [mm] to 0.2 [mm].
Supply with a thickness of about. Next, using the component mounter, BGA
The package 1 is mounted on the printed wiring board 5. At this time, the positions of the metal bump electrodes 2 and the bump connection pads 3 or the through via holes 6 are set to correspond to each other. Then, the printed wiring board 5 on which the BGA package 1 is mounted is passed through a reflow furnace using infrared rays or the like. As a result, the bump connecting pad 3 and the through via hole 6 are formed.
The solder paste supplied in advance is melted, and the plurality of metal bump electrodes 2 and the corresponding bump connection pads 3 or through via holes 6 are electrically and physically connected.
As a result, a desired circuit is formed.

【0017】このように、本実施例によれば、バンプ接
続用パッド4を貫通ヴィアホール6として構成したこと
から、当該貫通ヴィアホール6に多層プリント配線板5
の全ての内層パターン層11〜14を必要に応じて接続
することができるので、BGAパッケージ1を含む回路
全体の配線を単純化することができ、回路設計を比較的
容易に行うことができる。また、内層パターン層11〜
14の接続状況によっては貫通ヴィアホール6が、従来
のスルーホールの機能を兼備することができるため、別
途スルーホールを設ける必要がなく、配線に必要な領域
の縮減による電気素子の高密度実装化を図ることができ
る。更に、貫通ヴィアホール6は、従来の非貫通のヴィ
アホール54に比べて加工が容易であり、他の電気部品
の実装穴と同工程において加工することができ、製造工
程の簡略化による原価の削減を図ることができる。
As described above, according to this embodiment, since the bump connecting pad 4 is formed as the through via hole 6, the multilayer printed wiring board 5 is formed in the through via hole 6.
Since all the inner pattern layers 11 to 14 can be connected as needed, the wiring of the entire circuit including the BGA package 1 can be simplified, and the circuit design can be performed relatively easily. In addition, the inner pattern layers 11 to 11
Depending on the connection state of 14, the through via hole 6 can also have the function of the conventional through hole, so that it is not necessary to provide a separate through hole, and the area required for wiring is reduced to realize high-density mounting of electric elements. Can be achieved. Further, the through via hole 6 is easier to process than the conventional non-through via hole 54, and can be processed in the same process as the mounting holes of other electric parts, and the cost can be reduced by simplifying the manufacturing process. It is possible to reduce.

【0018】更にこれらに加え、貫通ヴィアホール6の
穴径を0.3〔mm〕以下に設定すると共に、プリント
配線板5の厚みを1.0〔mm〕に設定したことから、
実装工程において、リフロー炉において溶融され貫通ヴ
ィアホール6に流れ込んだ半田ペーストの量が、当該貫
通ヴィアホール6内の容積に対し不足することが有効に
防止され、金属バンプ電極2と貫通ヴィアホール6とを
確実に接続することができる。
In addition to these, since the diameter of the through via hole 6 is set to 0.3 [mm] or less and the thickness of the printed wiring board 5 is set to 1.0 [mm],
In the mounting process, the amount of the solder paste melted in the reflow furnace and flowing into the through via hole 6 is effectively prevented from being insufficient with respect to the volume in the through via hole 6, and the metal bump electrode 2 and the through via hole 6 are effectively prevented. And can be reliably connected.

【0019】ここで、本実施例において、.BGAパ
ッケージ1とプリント配線板5との間には樹脂を充填し
ても良い。.プリント配線板5の両面を部品実装面と
し、BGAパッケージ1とは反対側に設けられた他の実
装部品とを貫通ヴィアホール6を介して接続しても良
い。.BGAパッケージ1は、金属バンプ電極2が当
該BGAパッケージ1の側面側に配設された構造のもの
でも良い。.貫通ヴィアホール6の形状は、断面I字
状でなくても良い。
Here, in the present embodiment ,. A resin may be filled between the BGA package 1 and the printed wiring board 5. . Both sides of the printed wiring board 5 may be used as component mounting surfaces, and other mounting components provided on the opposite side of the BGA package 1 may be connected via the through via holes 6. . The BGA package 1 may have a structure in which the metal bump electrodes 2 are arranged on the side surface side of the BGA package 1. . The shape of the through via hole 6 may not be I-shaped in cross section.

【0020】[0020]

【発明の効果】本発明は、以上のように構成され機能す
るので、これによると、バンプ接続用パッドを貫通ヴィ
アホールとして構成したことから、当該貫通ヴィアホー
ルに多層プリント配線板の全ての内層パターン層を必要
に応じて接続することができるので、BGAパッケージ
を含む回路全体の配線を単純化することができ、回路設
計を比較的容易に行うことができる。また、内層パター
ン層の接続状況によっては貫通ヴィアホールが、同時に
従来のスルーホールの機能を兼備することができるた
め、別途スルーホールを設ける必要がなく、配線に必要
な領域の縮減による電気素子の高密度実装化を図ること
ができる。更に、貫通ヴィアホールは、従来の非貫通の
ヴィアホールに比べて加工が容易であり、他の電気部品
の実装穴と同工程において加工することができ、製造工
程の簡略化による原価の削減を図ることができる。
Since the present invention is constructed and functions as described above, according to this, since the bump connecting pad is formed as a through via hole, all the inner layers of the multilayer printed wiring board are formed in the through via hole. Since the pattern layers can be connected as needed, the wiring of the entire circuit including the BGA package can be simplified, and the circuit design can be performed relatively easily. In addition, depending on the connection status of the inner pattern layer, the through via hole can simultaneously have the function of the conventional through hole, so that it is not necessary to separately provide a through hole, and the area required for wiring can be reduced to reduce the electric element. High-density mounting can be achieved. In addition, the through-via holes are easier to process than conventional non-through-holes, and can be processed in the same process as mounting holes for other electrical components, thus reducing costs by simplifying the manufacturing process. Can be planned.

【0021】請求項2又は3記載の発明では、上述の効
果に加え、貫通ヴィアホールの穴径を0.3〔mm〕以
下に設定すると共に、プリント配線板の厚みを1.0
〔mm〕に設定したことから、実装工程において、リフ
ロー炉において溶融され貫通ヴィアホールに流れ込む半
田ペーストの量が、当該貫通ヴィアホール内の容積に対
し不足することが有効に防止され、金属バンプ電極と貫
通ヴィアホールとを確実に接続することができるとい
う、従来にない優れたボールグリッドアレイパッケージ
の実装構造を提供することができる。
In addition to the above effects, the diameter of the through via hole is set to 0.3 [mm] or less and the thickness of the printed wiring board is set to 1.0.
Since it is set to [mm], it is possible to effectively prevent the amount of the solder paste melted in the reflow furnace and flowing into the through via hole from becoming insufficient with respect to the volume in the through via hole in the mounting process, and the metal bump electrode It is possible to provide an unprecedented excellent mounting structure of a ball grid array package that can reliably connect the through hole with the through via hole.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例を示す一部省略した縦断面図
である。
FIG. 1 is a vertical cross-sectional view with a part omitted, showing an embodiment of the present invention.

【図2】従来例の構成を示す一部省略した縦断面図であ
る。
FIG. 2 is a vertical cross-sectional view showing a configuration of a conventional example with a part omitted.

【符号の説明】[Explanation of symbols]

1 ボールグリッドアレイパッケージ(BGAパッケー
ジ) 2 金属バンプ電極 3,4 バンプ接続用パッド 5 プリント配線板 6 貫通ヴィアホール 11 第1パターン層 12 第2パターン層 13 第3パターン層 14 第4パターン層
1 Ball Grid Array Package (BGA Package) 2 Metal Bump Electrodes 3,4 Bump Connection Pads 5 Printed Wiring Board 6 Through Via Holes 11 First Pattern Layer 12 Second Pattern Layer 13 Third Pattern Layer 14 Fourth Pattern Layer

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 ボールグリッドアレイパッケージを、ハ
ンダバンプ電極を介してプリント配線板に接続するボー
ルグリッドアレイパッケージの実装構造において、 前記ボールグリッドアレイパッケージに形成された金属
バンプ電極の一部または全部に接続される前記プリント
配線板のバンプ接続用パッドを、貫通ヴィアホールとし
たことを特徴とするボールグリッドアレイパッケージの
実装構造。
1. A mounting structure of a ball grid array package in which a ball grid array package is connected to a printed wiring board via solder bump electrodes, and the ball grid array package is connected to a part or all of metal bump electrodes formed in the ball grid array package. The mounting structure of the ball grid array package, wherein the bump connection pad of the printed wiring board is a through via hole.
【請求項2】 前記プリント配線板として、厚さが1
〔mm〕以下のものが使用されていることを特徴とした
請求項1記載のボールグリッドアレイパッケージの実装
構造。
2. The printed wiring board has a thickness of 1
2. The mounting structure for a ball grid array package according to claim 1, wherein the one having a size of [mm] or less is used.
【請求項3】 前記貫通ヴィアホールは、その直径が
0.3〔mm〕以下のものが使用されていることを特徴
とした請求項1記載のボールグリッドアレイパッケージ
の実装構造。
3. The mounting structure of a ball grid array package according to claim 1, wherein the through via has a diameter of 0.3 mm or less.
JP6304944A 1994-12-08 1994-12-08 Mounting structure of ball grid array package Expired - Fee Related JP2715945B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6304944A JP2715945B2 (en) 1994-12-08 1994-12-08 Mounting structure of ball grid array package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6304944A JP2715945B2 (en) 1994-12-08 1994-12-08 Mounting structure of ball grid array package

Publications (2)

Publication Number Publication Date
JPH08162767A true JPH08162767A (en) 1996-06-21
JP2715945B2 JP2715945B2 (en) 1998-02-18

Family

ID=17939203

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6304944A Expired - Fee Related JP2715945B2 (en) 1994-12-08 1994-12-08 Mounting structure of ball grid array package

Country Status (1)

Country Link
JP (1) JP2715945B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6252779B1 (en) 1999-01-25 2001-06-26 International Business Machines Corporation Ball grid array via structure
SG84511A1 (en) * 1998-06-17 2001-11-20 Texas Instr Singapore Pte Ltd Method of forming solder ball contact in ball grid array device
JP2002289923A (en) * 2001-03-28 2002-10-04 Toyoda Gosei Co Ltd Light-emitting diode and its manufacturing method
US20140291006A1 (en) * 2013-03-28 2014-10-02 Fujitsu Limited Printed circuit board solder mounting method and solder mount structure

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0362537A (en) * 1989-07-29 1991-03-18 Ibiden Co Ltd Electronic component mounting board

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0362537A (en) * 1989-07-29 1991-03-18 Ibiden Co Ltd Electronic component mounting board

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SG84511A1 (en) * 1998-06-17 2001-11-20 Texas Instr Singapore Pte Ltd Method of forming solder ball contact in ball grid array device
US6252779B1 (en) 1999-01-25 2001-06-26 International Business Machines Corporation Ball grid array via structure
JP2002289923A (en) * 2001-03-28 2002-10-04 Toyoda Gosei Co Ltd Light-emitting diode and its manufacturing method
US20140291006A1 (en) * 2013-03-28 2014-10-02 Fujitsu Limited Printed circuit board solder mounting method and solder mount structure

Also Published As

Publication number Publication date
JP2715945B2 (en) 1998-02-18

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