JPH10313170A - Wiring board - Google Patents
Wiring boardInfo
- Publication number
- JPH10313170A JPH10313170A JP9134453A JP13445397A JPH10313170A JP H10313170 A JPH10313170 A JP H10313170A JP 9134453 A JP9134453 A JP 9134453A JP 13445397 A JP13445397 A JP 13445397A JP H10313170 A JPH10313170 A JP H10313170A
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- electronic component
- conductor
- ball
- electrode pad
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
- H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4007—Surface contacts, e.g. bumps
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、電子部品のうちB
GA(Ball・Grid・Array)パッケージ部品などのよう
に、ボールバンプ(球形突出接点)を有する電子部品を
表面実装するための配線基板に関するものである。TECHNICAL FIELD The present invention relates to an electronic component,
The present invention relates to a wiring board for surface mounting electronic components having ball bumps (spherical protruding contacts), such as GA (Ball, Grid, Array) package components.
【0002】[0002]
【従来の技術】図4に基づいて、従来の電子部品の実装
状態を説明する。電子部品30は、半導体素子40や抵
抗、コンデンサーなどの電子回路素子をガラス基材、セ
ラミック基材などの基板41に実装し、モールド樹脂や
プラスチック樹脂で封入しパッケージする。最近では、
電子部品30の高密度化、小型化、および従来の配線基
板31とのはんだ付け不良率の低減のためBGA(Ball
・Grid・Array)パッケージ部品として、電子部品の外
部への接続用端子としてバンプ(突出接点)を基板41
の下部表面に形成する。このバンプには一般的にボール
バンプ15を使用している。2. Description of the Related Art A conventional electronic component mounting state will be described with reference to FIG. The electronic component 30 is obtained by mounting an electronic circuit element such as a semiconductor element 40, a resistor, and a capacitor on a substrate 41 such as a glass base material or a ceramic base material, and encapsulating it with a mold resin or a plastic resin to package. recently,
In order to increase the density and downsizing of the electronic component 30 and to reduce the failure rate of soldering with the conventional wiring board 31, a BGA (Ball
(Grid / Array) As a package component, a bump (protruding contact) is used as a terminal for connecting the electronic component to the outside of the substrate 41.
Formed on the lower surface of the Generally, a ball bump 15 is used for this bump.
【0003】前記のボールバンプ15を有する電子部品
30を実装する従来の配線基板31は、上面外層導体3
3と下面外層導体35とを形成し、このボールバンプ1
5を装着する所定の上面外層導体33の箇所に多数の電
極パッド36を平面的に形成し、従来の配線基板31の
外層導体33,35の必要な接続ランドや電極パッド3
6を除いてソルダーレジスト7を施す。次に、前記の電
極パッド36の表面上に導電性ペースト38を塗布し、
これらの多数の電極パッド36の平面的な表面に、電子
部品30の多数のボールバンプ15を位置決めし、リフ
ローはんだ付けで電子部品30を従来の配線基板31の
平面に実装する。The conventional wiring board 31 on which the electronic component 30 having the ball bumps 15 is mounted is composed of an upper outer conductor 3
3 and the lower surface outer layer conductor 35 are formed.
A large number of electrode pads 36 are formed in a plane at predetermined upper surface outer layer conductors 33 on which the wiring board 5 is mounted, and the necessary connection lands and electrode pads 3 of the outer layer conductors 33 and 35 of the conventional wiring board 31 are formed.
Except for 6, a solder resist 7 is applied. Next, a conductive paste 38 is applied on the surface of the electrode pad 36,
A large number of ball bumps 15 of the electronic component 30 are positioned on the planar surface of the large number of electrode pads 36, and the electronic component 30 is mounted on the conventional wiring board 31 by reflow soldering.
【0004】[0004]
【発明が解決しようとする課題】従来の電子部品のボー
ルバンプ15を従来の配線基板31に設けられている多
数の電極パッド36の平面的な表面に、ボールバンプ1
5の先端面が球形状の球面を接して位置決めをすること
は非常に難しくなっていた。また、作業中や運搬中にボ
ールバンプ15が位置ずれしたり、離脱する不良が生じ
ている。The ball bump 15 of the conventional electronic component is placed on the planar surface of a large number of electrode pads 36 provided on the conventional wiring board 31.
It has been very difficult to position the tip 5 in contact with the spherical spherical surface. Further, there is a defect that the ball bump 15 is displaced or detached during operation or transportation.
【0005】さらに、ボールバンプ15の大きさのばら
つき、基板41の反りやねじれ、導電性ペースト38の
塗布量などによりボールバンプ15の先端面の高さの差
Rが生じ、ボールバンプ15と従来の配線基板31の電
極パッド36との、はんだ接続不良が発生し品質が不安
定となっている。Further, a difference R in the height of the tip surface of the ball bump 15 occurs due to variations in the size of the ball bump 15, warpage or twist of the substrate 41, the amount of the conductive paste 38 applied, and the like. A defective solder connection with the electrode pad 36 of the wiring board 31 occurs, and the quality is unstable.
【0006】[0006]
【課題を解決するための手段】上記の課題を解決するた
め本発明においては、図1に示すように電子部品の外部
への接続端子としてボールバンプを有する電子部品を実
装する際、ボールバンプ15を装着する電極パッドの断
面が凹形状の電極パッド6で、この内に電子部品30の
ボールバンプ15をはめ込むことを特徴とする配線基板
1とする。In order to solve the above-mentioned problems, according to the present invention, when mounting an electronic component having a ball bump as a connection terminal to the outside of the electronic component as shown in FIG. The wiring board 1 is characterized in that the electrode pad 6 for mounting the electronic component 30 is a concave electrode pad 6 into which the ball bump 15 of the electronic component 30 is fitted.
【0007】また、ボールバンプ15を装着する電極パ
ッドの断面が凹形状のブラインドスルーホール穴9に電
子部品30のボールバンプ15を装着することを特徴と
する多層配線基板2とする。Further, the multilayer wiring board 2 is characterized in that the ball bump 15 of the electronic component 30 is mounted in the blind through-hole hole 9 having a concave cross section of the electrode pad on which the ball bump 15 is mounted.
【0008】[0008]
【発明の実施の形態】以下、本発明の実施の形態を図1
〜図3に基づいて説明する。まず、図1に示すように半
導体素子40や抵抗、コンデンサーなどの電子回路素子
をガラス基材,セラミック基材,BTレジン(ビスマレ
ィミド−トリアジン樹脂)基材などからできている基板
41に搭載し、モールド樹脂やプラスチック樹脂で封入
した電子部品30、特くには、この電子部品の外部への
接続用端子としてボールバンプ15を基板41の下部表
面に有する電子部品30を配線基板1に実装するための
配線基板1について説明する。FIG. 1 is a block diagram showing an embodiment of the present invention.
This will be described with reference to FIG. First, as shown in FIG. 1, electronic circuit elements such as a semiconductor element 40, a resistor, and a capacitor are mounted on a substrate 41 made of a glass base, a ceramic base, a BT resin (bismaleimide-triazine resin) base, or the like. The electronic component 30 encapsulated with a mold resin or a plastic resin, in particular, for mounting the electronic component 30 having the ball bump 15 on the lower surface of the substrate 41 as a terminal for connection to the outside of the electronic component on the wiring board 1. The wiring board 1 will be described.
【0009】上記配線基板1について図2で詳細に説明
する。配線基板1は電子部品30搭載面の表面外層導体
(以下、上部表面の外層導体3という)と、下部表面の
外層導体5を印刷法や写真法により所定箇所に所望する
導体を形成し、上部表面の外層導体3側から基材内部に
レーザー加工により所定の深さの非貫通穴を穿孔し、め
っきを施こし、非貫通穴内のスルーホールめっき層4を
形成する。The wiring board 1 will be described in detail with reference to FIG. The wiring board 1 forms desired conductors at predetermined locations by printing or photographing a surface outer layer conductor (hereinafter, referred to as an upper surface outer conductor 3) on a surface on which the electronic component 30 is mounted and an outer layer conductor 5 on a lower surface. A non-through hole having a predetermined depth is formed by laser processing from the outer conductor 3 side of the surface into the inside of the base material, and plating is performed to form a through-hole plating layer 4 in the non-through hole.
【0010】レーザー加工は短パルスCO2レーザーの
発振周波数が104〜108ヘルツのレーザビーム光を照
射して非貫通穴を形成することがよく、次に、必要な接
続ランドや電極パッドを除いて配線基板1の両面にソル
ダーレジスト7を施こす。このようにして、上部表面の
外層導体3に、電極パッドの表面中央部の断面が凹形状
の電極パッド6を、ボールバンプ15の配置箇所に対応
させて、電子部品30の搭載面である上部表面の外層導
体3上に立体的(3次元的)に形成する。In the laser processing, it is preferable to form a non-through hole by irradiating a short pulse CO 2 laser with a laser beam light having an oscillation frequency of 10 4 to 10 8 Hz. Then, necessary connection lands and electrode pads are formed. Except for applying the solder resist 7 on both sides of the wiring board 1. In this manner, the electrode pad 6 having a concave cross section at the center of the surface of the electrode pad is placed on the outer layer conductor 3 on the upper surface so as to correspond to the location where the ball bump 15 is arranged. It is formed three-dimensionally (three-dimensionally) on the outer conductor 3 on the surface.
【0011】その次に図1で示すように、この凹形状の
電極パッド6の内に、クリームはんだなどの導電性ペー
スト38を塗布あるいは充填し、電子部品30のボール
バンプ15をはめ込み、リフローはんだ付けをして装着
し、配線基板1の導体回路と接続する。導電性ペースト
38としては、クリームはんだの他に銀ペースト,銅ペ
ースト,銀−銅合金系ペースト,銀パラジウム合金ペー
ストなどがあり、また、導電性ペースト38の代りに、
はんだ付用フラックスを塗布することもある。Then, as shown in FIG. 1, a conductive paste 38 such as a cream solder is applied or filled into the concave electrode pad 6, the ball bump 15 of the electronic component 30 is fitted, and the reflow soldering is performed. It is attached and attached, and is connected to the conductor circuit of the wiring board 1. Examples of the conductive paste 38 include a silver paste, a copper paste, a silver-copper alloy-based paste, a silver-palladium alloy paste, and the like, in addition to the cream solder.
A flux for soldering may be applied.
【0012】図2は凹設穴の深さが下部表面の外層導体
5まで達し、上部表面の外層導体3と下部表面の外層導
体5とが非貫通穴内のスルーホールめっき層4で導通し
ている。この断面状態は凹形状の電極パッド6であり、
非貫通導通穴となっていることを示してある。FIG. 2 shows that the depth of the recessed hole reaches the outer conductor 5 on the lower surface, and the outer conductor 3 on the upper surface and the outer conductor 5 on the lower surface are electrically connected by the through-hole plating layer 4 in the non-through hole. I have. This cross-sectional state is a concave electrode pad 6,
This shows that it is a non-through conduction hole.
【0013】さらに、図3に示すような断面が凹形状の
電極パッド6の一例を説明する。多層配線基板2で、電
子部品のボールバンプ接続側の上部表面の外層導体3
と、この上部表面の外層導体3に最も近い内層導体8と
の間に形成されるブランドスルーホール穴9を凹形状の
電極パッド6として使用することもできる。すなわち、
ボールバンプ15を装着する電極パッドの断面が凹形状
のブラインドスルーホール穴9の内に電子部品30のボ
ールバンプ15を装着することができる。本図の7はソ
ルダーレジストを示す。Next, an example of the electrode pad 6 having a concave cross section as shown in FIG. 3 will be described. The outer conductor 3 on the upper surface of the multilayer wiring board 2 on the ball bump connection side of the electronic component.
The brand through hole 9 formed between the upper surface and the inner conductor 8 closest to the outer conductor 3 can also be used as the concave electrode pad 6. That is,
The ball bump 15 of the electronic component 30 can be mounted in the blind through hole 9 having a concave cross section of the electrode pad on which the ball bump 15 is mounted. Reference numeral 7 in the figure indicates a solder resist.
【0014】[0014]
【発明の効果】以上、説明したように、従来の平面的な
表面の電極パッド36から本発明の立体的な凹形状の電
極パッド6にすることにより、電子部品のボールバンプ
15を正確に位置決めをし、さらにボールバンプ15の
先端面の高さの差Rが生じていても、凹形状の電極パッ
ド6の内に凸形状となっているボールバンプ15をはめ
込むことにより、正しい電極パッド位置に容易に位置決
めをし、固定できる。また、作業中や運搬中のボールバ
ンプ15の位置ずれ、離脱がなくなり接続の不良が従来
の1/50以下に低減し、接続の品質が安定する。As described above, the three-dimensional concave electrode pad 6 of the present invention is changed from the conventional flat surface electrode pad 36 to accurately position the ball bump 15 of the electronic component. In addition, even if there is a difference R in height between the tip surfaces of the ball bumps 15, the convex ball bumps 15 are fitted into the concave electrode pads 6 so that the correct electrode pad positions can be obtained. Can be easily positioned and fixed. In addition, there is no displacement or detachment of the ball bump 15 during operation or transportation, and the connection failure is reduced to 1/50 or less of the conventional one, and the connection quality is stabilized.
【図1】本発明の実装状態を説明する断面図。FIG. 1 is a cross-sectional view illustrating a mounting state of the present invention.
【図2】本発明による配線基板の断面図。FIG. 2 is a sectional view of a wiring board according to the present invention.
【図3】本発明に使用する多層配線基板の断面図。FIG. 3 is a sectional view of a multilayer wiring board used in the present invention.
【図4】従来のボールバンプを有する電子部品の実装状
態を説明する断面図。FIG. 4 is a cross-sectional view illustrating a mounting state of an electronic component having a conventional ball bump.
1…配線基板 2…多層配線基板 3…上部表面の外層
導体 4…非貫通穴内のスルーホールめっき層 5…下部表面
の外層導体 6…凹形状の電極パッド 7…ソルダーレジスト 8…
内層導体 9…ブラインドスルーホール穴 15…ボールバンプ
30…電子部品 31…従来の配線基板 33…上面外層導体 35…下
面外層導体 36…電極パッド 38…導電性ペースト 40…半導
体素子 41…基板 R…ボールバンプの先端面の高さの差DESCRIPTION OF SYMBOLS 1 ... Wiring board 2 ... Multilayer wiring board 3 ... Outer layer conductor on upper surface 4 ... Through-hole plating layer in non-through hole 5 ... Outer layer conductor on lower surface 6 ... Recessed electrode pad 7 ... Solder resist 8 ...
Inner layer conductor 9: Blind through hole hole 15: Ball bump
DESCRIPTION OF SYMBOLS 30 ... Electronic component 31 ... Conventional wiring board 33 ... Upper surface outer layer conductor 35 ... Lower surface outer layer conductor 36 ... Electrode pad 38 ... Conductive paste 40 ... Semiconductor element 41 ... Substrate R ... Difference of the height of the tip surface of a ball bump
フロントページの続き (51)Int.Cl.6 識別記号 FI H01L 23/12 L Continued on the front page (51) Int.Cl. 6 Identification code FI H01L 23/12 L
Claims (2)
ールバンプを有する電子部品を実装する配線基板(1)
において、ボールバンプ(15)を装着する電極パッド
の断面が凹形状の電極パッド(6)で、この内に電子部
品(30)のボールバンプ(15)をはめ込むことを特
徴とする配線基板(1)。A wiring board for mounting an electronic component having a ball bump as a terminal for connecting the electronic component to the outside (1)
In the wiring board (1), the electrode pad for mounting the ball bump (15) is an electrode pad (6) having a concave cross section, into which the ball bump (15) of the electronic component (30) is fitted. ).
ールバンプを有する電子部品を実装する配線基板(1)
において、ボールバンプ(15)を装着する電極パッド
の断面が凹形状のブラインドスルーホール穴(9)に電
子部品(30)のボールバンプ(15)を装着すること
を特徴とする多層配線基板。2. A wiring board for mounting an electronic component having a ball bump as a terminal for connecting the electronic component to the outside.
2. The multilayer wiring board according to claim 1, wherein the ball pad (15) of the electronic component (30) is mounted in a blind through-hole hole (9) having a concave cross section of an electrode pad on which the ball bump (15) is mounted.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9134453A JPH10313170A (en) | 1997-05-09 | 1997-05-09 | Wiring board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9134453A JPH10313170A (en) | 1997-05-09 | 1997-05-09 | Wiring board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH10313170A true JPH10313170A (en) | 1998-11-24 |
Family
ID=15128705
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9134453A Pending JPH10313170A (en) | 1997-05-09 | 1997-05-09 | Wiring board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH10313170A (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20020078097A (en) * | 2001-04-04 | 2002-10-18 | 오리엔트 세미컨덕터 일렉트로닉스 리미티드 | A manufacturing method for multilayer high density substrate |
JP2007123774A (en) * | 2005-10-31 | 2007-05-17 | Toshiba Corp | Printed circuit board, electronic apparatus, and process for producing printed circuit board |
JP2011071560A (en) * | 2011-01-11 | 2011-04-07 | Dainippon Printing Co Ltd | Manufacturing method of component built-in wiring board |
JP2011166096A (en) * | 2009-03-06 | 2011-08-25 | Panasonic Corp | Surface-mounted device and printed board, and structure for mounting surface-mounted device using them |
CN107920413A (en) * | 2016-10-09 | 2018-04-17 | 景硕科技股份有限公司 | Multilayer circuit board and preparation method thereof |
CN111970824A (en) * | 2020-08-21 | 2020-11-20 | 苏州浪潮智能科技有限公司 | PCB and pad structure suitable for BGA chip thereof |
-
1997
- 1997-05-09 JP JP9134453A patent/JPH10313170A/en active Pending
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20020078097A (en) * | 2001-04-04 | 2002-10-18 | 오리엔트 세미컨덕터 일렉트로닉스 리미티드 | A manufacturing method for multilayer high density substrate |
JP2007123774A (en) * | 2005-10-31 | 2007-05-17 | Toshiba Corp | Printed circuit board, electronic apparatus, and process for producing printed circuit board |
JP2011166096A (en) * | 2009-03-06 | 2011-08-25 | Panasonic Corp | Surface-mounted device and printed board, and structure for mounting surface-mounted device using them |
JP2011071560A (en) * | 2011-01-11 | 2011-04-07 | Dainippon Printing Co Ltd | Manufacturing method of component built-in wiring board |
CN107920413A (en) * | 2016-10-09 | 2018-04-17 | 景硕科技股份有限公司 | Multilayer circuit board and preparation method thereof |
CN107920413B (en) * | 2016-10-09 | 2020-09-04 | 景硕科技股份有限公司 | Multilayer circuit board and manufacturing method thereof |
CN111970824A (en) * | 2020-08-21 | 2020-11-20 | 苏州浪潮智能科技有限公司 | PCB and pad structure suitable for BGA chip thereof |
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