JP2926902B2 - Printed wiring board - Google Patents

Printed wiring board

Info

Publication number
JP2926902B2
JP2926902B2 JP2149417A JP14941790A JP2926902B2 JP 2926902 B2 JP2926902 B2 JP 2926902B2 JP 2149417 A JP2149417 A JP 2149417A JP 14941790 A JP14941790 A JP 14941790A JP 2926902 B2 JP2926902 B2 JP 2926902B2
Authority
JP
Japan
Prior art keywords
hole
printed wiring
wiring board
soldering
land
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP2149417A
Other languages
Japanese (ja)
Other versions
JPH0444293A (en
Inventor
伸之 西谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=15474662&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=JP2926902(B2) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2149417A priority Critical patent/JP2926902B2/en
Publication of JPH0444293A publication Critical patent/JPH0444293A/en
Application granted granted Critical
Publication of JP2926902B2 publication Critical patent/JP2926902B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0094Filling or covering plated through-holes or blind plated vias, e.g. for masking or for mechanical reinforcement
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007Surface contacts, e.g. bumps

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、電子部品を高密度に実装できるプリント配
線基板に関する。
Description: TECHNICAL FIELD The present invention relates to a printed wiring board on which electronic components can be mounted at a high density.

従来の技術 近年、プリント配線基板は、電子機器の小型化をめざ
した、より高密度な実装を可能にするものとして大変重
要である。
2. Description of the Related Art In recent years, printed wiring boards are very important as those that enable higher-density mounting with the aim of miniaturizing electronic devices.

以下、図面を参照しながら従来のプリント配線基板に
ついて説明する。
Hereinafter, a conventional printed wiring board will be described with reference to the drawings.

第4図は従来のプリント配線基板にチップ部品を高密
度実装したときの状態を示す平面図であり、図において
1はプリント配線基板2の上面に設けられたチップ部品
3をはんだ付けするためのランド部、4はチップ部品3
の両端に設けられた電極部でランド部1にはんだ5によ
ってはんだ付けされている。6はプリント配線基板2の
他の面または内層に設けられている導体部(図示せず)
と電気的に導通させるためのスルーホール部である。
FIG. 4 is a plan view showing a state in which chip components are mounted at a high density on a conventional printed wiring board. In FIG. 4, reference numeral 1 denotes a part for soldering the chip parts 3 provided on the upper surface of the printed wiring board 2. Land part, 4 is chip component 3
Are soldered to the land portion 1 with solder 5 at the electrode portions provided at both ends of the wire. Reference numeral 6 denotes a conductor (not shown) provided on the other surface or the inner layer of the printed wiring board 2
This is a through-hole portion for electrically conducting with the IGBT.

以上のように構成されたプリント配線基板2において
は、スルーホール部6はランド部1に接続してその一端
に設けられており、したがってプリント配線基板2の上
面において電子部品を搭載する面積以外にスルーホール
部6を設けるための面積を必要とする。
In the printed wiring board 2 configured as described above, the through-hole portion 6 is provided at one end of the printed wiring board 2 connected to the land portion 1. An area for providing the through hole 6 is required.

発明が解決しようとする課題 しかしながら上記のような構成では、チップ部品3等
を高密度に実装する場合、プリント配線基板2に設けら
れているスルーホール部6の占める面積がチップ部品3
等の実装面積を減少させる原因となっている。一方ラン
ド部1の内部にスルーホール部6を形成して実装密度を
上げようとした場合、リフローはんだ付け工法において
はんだ5が溶融するとき、スルーホール部6の内部に流
れこみ、チップ部品3等を接続するためのはんだ5の量
が不均一になり、はんだ付けの品質が十分得られなくな
ってしまうという課題がある。
However, in the above-described configuration, when the chip components 3 and the like are mounted at a high density, the area occupied by the through holes 6 provided in the printed wiring board 2 is limited by the chip components 3.
And so on, which reduces the mounting area. On the other hand, when the through-hole 6 is formed in the land 1 to increase the mounting density, when the solder 5 is melted by the reflow soldering method, the solder 5 flows into the through-hole 6 and the chip component 3 and the like. Therefore, there is a problem that the amount of the solder 5 for connecting the soldering becomes uneven, and the soldering quality cannot be sufficiently obtained.

本発明は上記課題を解決するものであり、表面実装部
品等を高密度に実装できるプリント配線基板を提供する
ことを目的とするものである。
SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and has as its object to provide a printed wiring board on which surface-mounted components and the like can be mounted at a high density.

課題を解決するための手段 本発明は上記目的を達成するためにプリント配線基板
の両面または内層の導体部分に導通するスルーホール部
が表面実装部品の電極部をはんだ付けするためのランド
部内に設けられ、前記スルーホール部の内側に金属メッ
キを施し、前記スルーホール部の内部を導電材で充填
し、かつスルーホール部の開口端を導体材料で被覆した
構成を備えたものである。
Means for Solving the Problems In order to achieve the above object, the present invention provides a through-hole portion conducting to both sides of a printed wiring board or a conductor portion of an inner layer in a land portion for soldering an electrode portion of a surface mount component. The inside of the through-hole is plated with metal, the inside of the through-hole is filled with a conductive material, and the opening end of the through-hole is covered with a conductive material.

作用 本発明は上記した構成によって、プリント配線基板の
スルーホール部と表面実装部品をはんだ付けするための
ランド部とを同一面積内に配置することが可能となり、
プリント配線基板の面積を有効に活用でき、したがって
より一層の高密度実装を実現でき、またスルーホール部
の内側の金属メッキに亀裂がある場合でもプリント配線
基板の両面または内層の導体部分間の導通が確保され
る。
The present invention makes it possible to arrange a through-hole portion of a printed wiring board and a land portion for soldering a surface-mounted component in the same area by the configuration described above,
The area of the printed wiring board can be used effectively, so that even higher density mounting can be achieved.Even if there is a crack in the metal plating inside the through hole, conduction between both sides of the printed wiring board or the conductor part of the inner layer Is secured.

実施例 以下、本発明の一実施例について第1図〜第3図とと
もに第4図と同一部分については同一番号を付して詳し
い説明を省略し、相違する点について説明する。
Embodiment Hereinafter, in the embodiment of the present invention, the same portions as those in FIGS. 1 to 3 and FIG. 4 are denoted by the same reference numerals, detailed description thereof will be omitted, and different points will be described.

第1図および第2図は本発明の一実施例の構成を示す
ものであり、スルーホール部7はランド部1の内部に設
けられており、そのスルーホール7はその開口端8を銅
箔等よりなる導体箔9によって被覆されている。またス
ルーホール7の内部は導電性ペーストまたは金属線材ま
たは銅メッキ材等からなる導電材10によって充填されて
いる。
FIGS. 1 and 2 show the structure of one embodiment of the present invention. A through-hole 7 is provided inside a land portion 1, and the through-hole 7 has an opening end 8 which is made of copper foil. And the like. The inside of the through hole 7 is filled with a conductive material 10 made of a conductive paste, a metal wire, a copper plating material, or the like.

つぎに上記の構成においてその動作を説明する。 Next, the operation of the above configuration will be described.

上記実施例において、スルーホール部7はチップ部品
等の表面実装部品3の電極部4をはんだ付けするためラ
ンド部1の同一面内に設けられており、さらにそのスル
ーホール部7の開口端8は導体箔9で被覆され、ランド
部1の面とともに均一な面となっている。したがって第
2図から明らかなように従来例に見られたランド部1に
接続するスルーホール部6を形成する必要がなく、より
一層の高密度実装が可能となり、またスルーホール部7
の開口端8は導体箔9および導電材10によって封じられ
ているためはんだ5が流れ込みはんだ付け品質を悪くす
ることもない。
In the above embodiment, the through-hole 7 is provided in the same plane of the land 1 for soldering the electrode 4 of the surface-mounted component 3 such as a chip component, and the opening end 8 of the through-hole 7 is further provided. Is covered with a conductor foil 9 and has a uniform surface with the surface of the land portion 1. Therefore, as is apparent from FIG. 2, it is not necessary to form the through-hole portion 6 connected to the land portion 1 as in the conventional example.
Since the open end 8 is sealed by the conductive foil 9 and the conductive material 10, the solder 5 does not flow and the soldering quality is not deteriorated.

つぎに、本実施例の製造方法を第3図(a)〜(f)
を用いて説明する。
Next, the manufacturing method of the present embodiment will be described with reference to FIGS.
This will be described with reference to FIG.

第3図(a)に示すような両面に銅箔11を有するガラ
スエポキシ樹脂等よりなるプリント配線基板2にドリル
等によってスルーホール部7を穿孔し(第3図
(b))、そのスルーホール部7の内面と銅箔11の表面
に導通部12(主に銅)がめっきによって設けられる(第
3図(c))。つぎにスルーホール部7の内部に導電性
ペーストまたは金属線材または銅メッキ材等を充填する
ことによって導電材10を形成する(第3図(d))。さ
らに、これら銅箔11の表面およびスルーホール部7の開
口端8を閉塞した導電材10の表面をめっきによってめっ
き層13を形成した後(第3図(e))、不要部分をエッ
チングして配線パターンを形成する(第3図(f))。
A through hole 7 is drilled by a drill or the like into a printed wiring board 2 made of a glass epoxy resin or the like having copper foils 11 on both sides as shown in FIG. 3 (a) (FIG. 3 (b)). A conductive portion 12 (mainly copper) is provided by plating on the inner surface of the portion 7 and the surface of the copper foil 11 (FIG. 3 (c)). Next, the conductive material 10 is formed by filling the inside of the through-hole 7 with a conductive paste, a metal wire, a copper plating material, or the like (FIG. 3D). Further, the plating layer 13 is formed by plating the surface of the copper foil 11 and the surface of the conductive material 10 which closes the opening end 8 of the through-hole portion 7 (FIG. 3 (e)), and then unnecessary portions are etched. A wiring pattern is formed (FIG. 3 (f)).

このように上記実施例によれば、スルーホール部7を
表面実装部品をはんだ付けするランド部1内に形成する
ことにより表面実装部品3を搭載する面積を増加するこ
とができ、より高密度な実装が可能となる。
As described above, according to the above embodiment, the area for mounting the surface mount component 3 can be increased by forming the through hole portion 7 in the land portion 1 to which the surface mount component is soldered. Implementation becomes possible.

なお、本実施例においてめっき層13を形成する方法と
して、銅をめっきする以外に銅箔をプレスして積層する
ことも可能である。
In this embodiment, as a method for forming the plating layer 13, it is also possible to laminate by pressing a copper foil instead of plating copper.

発明の効果 以上のように本発明によれば、プリント配線基板の両
面または内層の導体部分に導通するスルーホール部が表
面実装部品の電極部をはんだ付けするためのランド部内
に設けられ、前記スルーホール部の内側に金属メッキを
施し、前記スルーホール部の内部を導電材で充填し、か
つスルーホール部の開口端を導体箔で被覆しているため
にスルーホール部の内側の金属メッキに亀裂がある場合
でもプリント配線基板の両面または内層の導体部分間の
導通が確保され、またスルーホール部をランド部以外に
設ける必要がなく、プリント配線基板の面積を有効に活
用することができ、したがって表面実装部品を高密度に
実装することが可能になるという効果が得られる。
Effect of the Invention As described above, according to the present invention, a through-hole portion conducting to both sides or an inner layer conductor portion of a printed wiring board is provided in a land portion for soldering an electrode portion of a surface mount component, and the through-hole is provided. Metal plating is applied to the inside of the hole, the inside of the through hole is filled with a conductive material, and the open end of the through hole is covered with a conductive foil, so that the metal plating inside the through hole is cracked. Even when there is, conduction between both sides of the printed wiring board or the conductor part of the inner layer is ensured, and it is not necessary to provide a through hole part other than the land part, so that the area of the printed wiring board can be effectively utilized, and The effect that surface mounting components can be mounted at a high density can be obtained.

【図面の簡単な説明】[Brief description of the drawings]

第1図は本発明の一実施例のプリント配線基板の構成を
示す要部断面図、第2図は同プリント配線基板に表面実
装部品を搭載した状態を示す部分平面図、第3図(a)
〜(f)は同プリント配線基板の製造方法を示す工程
図、第4図は従来のプリント配線基板に部品を搭載した
状態を示す部分平面図である。 1……ランド部、2……プリント配線基板、3……チッ
プ部品(表面実装部品)、4……電極部、7……スルー
ホール部、8……開口端、9……導体箔。
FIG. 1 is a sectional view of a principal part showing a configuration of a printed wiring board according to one embodiment of the present invention, FIG. 2 is a partial plan view showing a state where surface-mounted components are mounted on the printed wiring board, and FIG. )
(F) to (f) are process diagrams showing a method for manufacturing the printed wiring board, and FIG. 4 is a partial plan view showing a state where components are mounted on a conventional printed wiring board. DESCRIPTION OF SYMBOLS 1 ... Land part, 2 ... Printed wiring board, 3 ... Chip component (surface mount component), 4 ... Electrode part, 7 ... Through hole part, 8 ... Open end, 9 ... Conductor foil.

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】両面または多層構造を有するプリント配線
基板であって、その両面または内層の導体部分に導通す
るスルーホール部が表面実装部品の電極部をはんだ付け
するためのランド部内に設けられ、前記スルーホール部
の内側に金属メッキを施し、前記スルーホール部の内部
を導電材で充填し、かつ前記スルーホール部の開口端を
導体箔で被覆したプリント配線基板。
1. A printed wiring board having a double-sided or multi-layer structure, wherein a through-hole portion conducting to both sides or an inner layer conductor portion is provided in a land portion for soldering an electrode portion of a surface mount component, A printed wiring board in which metal plating is applied to the inside of the through hole, the inside of the through hole is filled with a conductive material, and the opening end of the through hole is covered with a conductive foil.
JP2149417A 1990-06-07 1990-06-07 Printed wiring board Expired - Lifetime JP2926902B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2149417A JP2926902B2 (en) 1990-06-07 1990-06-07 Printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2149417A JP2926902B2 (en) 1990-06-07 1990-06-07 Printed wiring board

Publications (2)

Publication Number Publication Date
JPH0444293A JPH0444293A (en) 1992-02-14
JP2926902B2 true JP2926902B2 (en) 1999-07-28

Family

ID=15474662

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2149417A Expired - Lifetime JP2926902B2 (en) 1990-06-07 1990-06-07 Printed wiring board

Country Status (1)

Country Link
JP (1) JP2926902B2 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04188689A (en) * 1990-11-19 1992-07-07 Toshiba Corp Printed wiring board
JPH0621632A (en) * 1992-07-03 1994-01-28 Nec Corp Multilayer printed wiring board
JPH08213759A (en) * 1992-07-31 1996-08-20 Toppan Printing Co Ltd Multilayer printed circuit board
JP2790124B2 (en) * 1996-06-11 1998-08-27 日本電気株式会社 Wiring board pad structure
EP1722613B1 (en) 2004-03-04 2011-11-23 Sankyo Kasei Co., Ltd. Method for manufacturing a three-dimensional circuit board

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01100996A (en) * 1987-10-14 1989-04-19 Canon Inc Multilayer printed wiring board

Also Published As

Publication number Publication date
JPH0444293A (en) 1992-02-14

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