JPH0810187Y2 - Die bonding machine - Google Patents

Die bonding machine

Info

Publication number
JPH0810187Y2
JPH0810187Y2 JP9207489U JP9207489U JPH0810187Y2 JP H0810187 Y2 JPH0810187 Y2 JP H0810187Y2 JP 9207489 U JP9207489 U JP 9207489U JP 9207489 U JP9207489 U JP 9207489U JP H0810187 Y2 JPH0810187 Y2 JP H0810187Y2
Authority
JP
Japan
Prior art keywords
semiconductor element
die
stem
die bonding
bonding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP9207489U
Other languages
Japanese (ja)
Other versions
JPH0332421U (en
Inventor
正一 平
英治 吉田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP9207489U priority Critical patent/JPH0810187Y2/en
Publication of JPH0332421U publication Critical patent/JPH0332421U/ja
Application granted granted Critical
Publication of JPH0810187Y2 publication Critical patent/JPH0810187Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Die Bonding (AREA)

Description

【考案の詳細な説明】 〔産業上の利用分野〕 本考案は半導体パッケージの製造装置に関し、特にス
テムに半導体素子を搭載するダイボンディング装置に関
する。DETAILED DESCRIPTION OF THE INVENTION [Industrial application] The present invention relates to a semiconductor package manufacturing apparatus, and more particularly to a die bonding apparatus for mounting a semiconductor element on a stem.

〔従来の技術〕[Conventional technology]

従来、この種のダイボンディング装置はステムの基準
となる１つ又は複数のポイントを最初に目合せし、その
基準から半導体素子を搭載する位置の中心値を演算し、
ダイボンディングを行っていた。Conventionally, this type of die bonding apparatus first aligns one or more points serving as a reference of the stem, and calculates the center value of the position where the semiconductor element is mounted from the reference,
I was doing die bonding.

〔考案が解決しようとする課題〕[Problems to be solved by the device]

上述した手段のダイボンディング装置を半導体素子の
うちでも特に超高周波用の半導体素子に適用した場合、
以下の欠点があった。When the die-bonding device of the above-mentioned means is applied to a semiconductor element especially for a super high frequency among semiconductor elements,
It had the following drawbacks:

すなわち、超高周波用の半導体素子において、半導体
素子の電極を電気的に結合させるボンディングワイヤー
の長さは素子の特性の因子となるため、複数の半導体素
子を搭載する場合、半導体素子の相対的な位置関係の正
確さと個々の素子の高い位置精度が要求される。従来の
ダイボンディング装置ではステムの基準となるポイント
を最初に目合せし、全ての半導体素子の搭載位置を演算
するので、基準に対する位置決めとなっており、半導体
素子間の相対的な位置関係となっておらず、また個々の
素子の位置精度はX,Y方向で±100ミクロン程度であった
ため、ボンディングワイヤー長が不安定となり、特性が
不安定となっていた。That is, in a semiconductor element for ultra high frequency, the length of the bonding wire that electrically couples the electrodes of the semiconductor element is a factor of the characteristics of the element. Accurate positional relationship and high positional accuracy of individual elements are required. In the conventional die bonding apparatus, the reference point of the stem is first aligned and the mounting positions of all the semiconductor elements are calculated, so positioning is based on the reference, and the relative positional relationship between the semiconductor elements is determined. Moreover, since the positional accuracy of each element was ± 100 microns in the X and Y directions, the bonding wire length became unstable and the characteristics became unstable.

本考案の目的は前記課題を解決したダイボンディング
装置を提供することにある。An object of the present invention is to provide a die bonding apparatus that solves the above problems.

〔考案の従来技術に対する相違点〕[Differences of the invention from the prior art]

上述した従来のダイボンディング装置がステムの基準
となるポイントを目合せし、基準点から全ての搭載物の
位置を演算してダイボンドを行うのに対し、本考案は１
つの半導体素子をダイボンドした後、その素子を認識し
て２個目以降の半導体素子をダイボンドする位置を決
め、ダイボンドした半導体素子の搭載位置ずれ量も演算
処理し、その量分位置補正を行うという相違点を有す
る。The conventional die bonding apparatus described above aligns the reference points of the stem and calculates the positions of all the mounted objects from the reference points to perform die bonding.
After one semiconductor element is die-bonded, the element is recognized, the position for die-bonding the second and subsequent semiconductor elements is determined, the mounting displacement amount of the die-bonded semiconductor elements is also calculated, and position correction is performed for that amount. There are differences.

〔課題を解決するための手段〕[Means for solving the problem]

前記目的を達成するため、本考案のダイボンディング
装置は、半導体素子をステムに搭載するダイボンディン
グ装置において、ステム全体とステムに搭載した後の半
導体素子をとらえるカメラと、前記カメラに取付ける変
倍式レンズと、ステム及び搭載した半導体素子を認識し
搭載位置ズレを演算処理する認識装置と、演算により得
た半導体素子位置ズレ量に応じて半導体素子搭載位置を
修正するハンド及び制御部とを有し、１つの半導体素子
をダイボンドした後、その素子を認識して演算した位置
に２個目以降の半導体素子をダイボンドすると共にダイ
ボンドの都度その対象素子の位置ずれを演算処理しハン
ドにてずれ量分素子の位置を補正するものである。In order to achieve the above object, the die bonding apparatus of the present invention is a die bonding apparatus in which a semiconductor element is mounted on a stem. It has a lens, a recognition device for recognizing the stem and the mounted semiconductor element and processing the mounting position deviation, and a hand and a control unit for correcting the semiconductor element mounting position according to the semiconductor element position deviation amount obtained by the calculation. After one semiconductor element is die-bonded, the second and subsequent semiconductor elements are die-bonded to the position where the element is recognized and calculated, and the positional deviation of the target element is calculated every time die bonding is performed, and the amount of deviation is calculated by the hand. The position of the element is corrected.

〔実施例〕〔Example〕

次に本考案について図面を参照して説明する。 Next, the present invention will be described with reference to the drawings.

（実施例１） 第１図は本考案の実施例１を示す構成概略図である。
第２図は本考案の実施例１を示す縦断面図である。(Embodiment 1) FIG. 1 is a schematic configuration diagram showing Embodiment 1 of the present invention.
FIG. 2 is a vertical sectional view showing Embodiment 1 of the present invention.

図において、カメラ１には変倍レンズ２が取り付いて
おり、カメラコントロールユニット３により画像として
取り込まれたワークステージ４上のステム５と、ダイボ
ンディングヘッド６及びダイボンディングアーム７によ
り搬送された半導体素子８の情報が認識装置９によって
演算処理され、制御部10によりハンド11が作動し、半導
体素子８を保持し演算処理に基づいた位置ずれ分を補正
する構成となっている。In the figure, a camera 1 is equipped with a variable power lens 2, a stem 5 on a work stage 4 captured as an image by a camera control unit 3, and a semiconductor element carried by a die bonding head 6 and a die bonding arm 7. The information of No. 8 is arithmetically processed by the recognition device 9, the hand 11 is operated by the control unit 10, the semiconductor element 8 is held, and the positional deviation amount based on the arithmetic processing is corrected.

本実施例では一度ステム上に置かれた半導体素子８の
位置を認識し、演算を行ったのち、ハンド11にて半導体
素子８を保持・上昇し、ダイボンドソルダー12がソルダ
ー供給ユニット13により供給される。その間、ハンド11
は位置ずれ分のＸ−Ｙ−θを補正してその後、下降しダ
イボンディングを終了する。In this embodiment, once the position of the semiconductor element 8 placed on the stem is recognized and the calculation is performed, the semiconductor element 8 is held / raised by the hand 11, and the die bond solder 12 is supplied by the solder supply unit 13. It Meanwhile, hand 11
Corrects X-Y-? For the positional deviation, and then descends to complete die bonding.

（実施例２） 第３図は本考案の実施例２を示す縦断面図である。(Embodiment 2) FIG. 3 is a vertical sectional view showing Embodiment 2 of the present invention.

予め供給されたダイボンドソルダー12上に、半導体素
子８を一度ダイボンディングした後認識し演算を行った
後、ハンド11にて半導体素子８を保持し、その位置で位
置ずれ分のＸ−Ｙ−θを補正し、ダイボンディングを終
了する。After the semiconductor element 8 is once die-bonded on the die bond solder 12 supplied in advance, the semiconductor element 8 is recognized and calculated, and then the semiconductor element 8 is held by the hand 11, and the position deviation X-Y-θ is held at that position. Is corrected and the die bonding is completed.

この実施例ではハンド11を一度上昇させることがない
ため、さらに位置精度が向上するという利点がある。In this embodiment, since the hand 11 is not raised once, there is an advantage that the position accuracy is further improved.

ダイボンドソルダー12は、ソフトソルダーの場合は乾
燥前に、ハードソルダーの場合は再融解後に位置補正を
実施すれば良いし、予め半導体素子８の裏面にダイボン
ドソルダー12に付着している場合は融解中に位置補正を
実施すればよい。The position of the die bond solder 12 may be corrected before drying in the case of a soft solder, and after remelting in the case of a hard solder. The position correction may be performed on.

〔考案の効果〕[Effect of device]

以上説明したように本考案は特に複数の半導体素子を
搭載する超高周波用半導体装置において、先に搭載した
半導体素子を認識して演算した位置に２個目以降の半導
体素子をダイボンドすると共に、ダイボンドの都度その
対象素子の位置ずれを演算処理しハンドにてずれ量分素
子の位置を補正することにより、位置精度を向上させる
ことができ、特性品質を安定化し不良発生を軽減できる
効果がある。As described above, according to the present invention, particularly in an ultra-high frequency semiconductor device having a plurality of semiconductor elements mounted thereon, the second and subsequent semiconductor elements are die-bonded to the positions calculated by recognizing the previously mounted semiconductor elements as well as the die-bonding. Each time, the positional deviation of the target element is calculated and the position of the element is corrected by the amount of deviation by the hand, so that the positional accuracy can be improved, the characteristic quality can be stabilized, and the occurrence of defects can be reduced.

【図面の簡単な説明】[Brief description of drawings]

第１図は本考案の実施例１を示す構成概略図、第２図は
本考案の実施例１を示す縦断面図、第３図は本考案の実
施例２を示す縦断面図である。 １……カメラ、２……変倍レンズ ３……カメラコントロールユニット ４……ワークステージ、５……ステム ６……ダイボンディングヘッド ７……ダイボンディングアーム ８……半導体素子、９……認識装置 10……制御部、11……ハンド 12……ダイボンドソルダー 13……ソルダー供給ユニット1 is a schematic configuration diagram showing a first embodiment of the present invention, FIG. 2 is a vertical sectional view showing a first embodiment of the present invention, and FIG. 3 is a vertical sectional view showing a second embodiment of the present invention. 1 ... Camera, 2 ... Variable magnification lens 3 ... Camera control unit 4 ... Work stage, 5 ... Stem 6 ... Die bonding head 7 ... Die bonding arm 8 ... Semiconductor element, 9 ... Recognition device 10 …… Control part, 11 …… Hand 12 …… Die bond solder 13 …… Solder supply unit

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 【請求項１】半導体素子をステムに搭載するダイボンデ
ィング装置において、ステム全体とステムに搭載した後
の半導体素子をとらえるカメラと、前記カメラに取付け
る変倍式レンズと、ステム及び搭載した半導体素子を認
識し搭載位置ズレを演算処理する認識装置と、演算によ
り得た半導体素子位置ズレ量に応じて半導体素子搭載位
置を修正するハンド及び制御部とを有し、１つの半導体
素子をダイボンドした後、その素子を認識して演算した
位置に２個目以降の半導体素子をダイボンドすると共に
ダイボンドの都度その対象素子の位置ずれを演算処理し
ハンドにてずれ量分素子の位置を補正することを特徴と
するダイボンディング装置。1. A die bonding apparatus for mounting a semiconductor element on a stem, comprising: a camera for capturing the entire stem and a semiconductor element mounted on the stem; a variable magnification lens attached to the camera; and a stem and the mounted semiconductor element. A recognition device for recognizing and processing the mounting position deviation, and a hand and a control unit for correcting the semiconductor element mounting position according to the semiconductor element position deviation amount obtained by the calculation, and after die-bonding one semiconductor element, The second semiconductor element and subsequent semiconductor elements are die-bonded to the position calculated by recognizing the element, and the positional deviation of the target element is arithmetically processed each time the die-bonding is performed, and the position of the element is corrected by the amount of deviation by the hand. Die bonding equipment.
JP9207489U 1989-08-04 1989-08-04 Die bonding machine Expired - Lifetime JPH0810187Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9207489U JPH0810187Y2 (en) 1989-08-04 1989-08-04 Die bonding machine

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9207489U JPH0810187Y2 (en) 1989-08-04 1989-08-04 Die bonding machine

Publications (2)

Publication Number Publication Date
JPH0332421U JPH0332421U (en) 1991-03-29
JPH0810187Y2 true JPH0810187Y2 (en) 1996-03-27

Family

ID=31641520

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9207489U Expired - Lifetime JPH0810187Y2 (en) 1989-08-04 1989-08-04 Die bonding machine

Country Status (1)

Country Link
JP (1) JPH0810187Y2 (en)

Also Published As

Publication number Publication date
JPH0332421U (en) 1991-03-29

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