JPH0796067A - Game machine control circuit - Google Patents

Abstract

PURPOSE:To generate a random number of a high quality performing a rounding processing to a value obtained by squaring an initial value and setting it to a value in a numerical range set in advance, and outputting the rounded value as the random number, in the game machine control circuit for generating the random number used for a game. CONSTITUTION:This circuit is provided with an initial value storage means 2 for storing an arbitrary value set in advance as an initial value, and the initial value stored therein is squared by a first arithmetic means 3, and also, a rounding processing is performed to a result of its operation by a second arithmetic means 4, it is set as a value of a numerical range set in advance, and this rounded value is outputted as a random number. A second arithmetic means 4 is provided so that an arithmetic value by a first arithmetic means 3 is shifted by a prescribed bit number portion by a bit shifter incorporated in the means 4, and with respect to the shifted value, a remainder by the maximum number in the numerical range set by the rounding processing is calculated as a rounded value in a remainder arithmetic part. In such a way, the random number of a high quality being a statistically independent number is generated.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a game machine control circuit, and more particularly to a game machine control circuit for generating a random number used in a game.

[Background of the Invention] In recent years, in gaming machines, for example, pachinko gaming machines and the like, amusement of a game has been enhanced by a variable display game with a special symbol display device arranged substantially in the center of a game area.

In this variable display game, for example, when a predetermined game condition is satisfied (usually, when winning a prize at a starting opening).
In addition, while the symbols displayed in the special symbol display device start displaying fluctuations, the fluctuations stop after a predetermined period of time, and it is common to make a big hit when the symbols at the time of stopping are aligned with specific symbols. In such a variable display game, determination of a big hit, determination of a symbol at the time of stop (hereinafter, referred to as a stop symbol), and the like include probabilistic elements and are accompanied by a contingency, so that excitement for a game is raised. There is.

Therefore, a random number with a uniformity and irregularity (random number for determining jackpot, random number for determining stop symbol) is used for determination of jackpot, determination of stop symbol, and the like. The random number is generated by the gaming machine control circuit.

[0005]

2. Description of the Related Art Conventionally, as a game machine control circuit for generating such a random number, there is a jackpot judging device having a digit rising type counter as shown in FIG.

FIG. 10 is a diagram for explaining the operation of the jackpot determining device.

The jackpot determining device shown in FIG.
The big hit is controlled by a digit-up method counter in which the values from 0 "to" 234 "are regularly moving one by one at a high speed at all times. The big hit is the value selected at a predetermined timing. This is a case where one predetermined winning value (in this case, “03”) is reached, and as a result, the jackpot probability is 1/235.

Incidentally, the timing of this jackpot determination is generally at the time of winning the starting opening of the game ball,
The time required to move one frame of the digit-up counter is a very short period, for example, 0.004096 seconds, and one cycle is 0.96256 seconds (= 0.004).
Since it is sufficiently short (096 × 235), it is used as a random number.

[0009]

Random numbers are variables that do not have any law in how values are changed, and the original meaning is a sequence whose values cannot be predicted. .

However, the random number generated by the above-described digit-up counter is random in the timing of selecting the value of the counter (for example, at the time of winning of the starting mouth) and the cycle of the counter is short. For this reason, the value generated by the digit-up counter is used as a random number, but is a regular arithmetic sequence that is added at a certain fixed value (added one by one in the above example). Therefore, it cannot be strictly called a random number.

That is, it is preferable that the random numbers, which are the sources of randomness that excite the interest in the game in the variable display game, are statistically independent numbers.

[Object] In view of the above problems, an object of the present invention is to generate a high-quality random number.

[0013]

According to a first aspect of the present invention, as shown in FIG. 1, in a game machine control circuit 1 for controlling a game in a game machine and generating a random number used in the game, An initial value storage means 2 for storing the set arbitrary value as an initial value, a first calculation means 3 for squaring the initial value stored in the initial value storage means 2, and a calculation result of the first calculation means 3 The second calculation means 4 for performing a rounding process on the other hand to obtain a value within a preset numerical range, and outputting the value rounded by the second calculation means 4 as a random number, thereby achieving the above object. Has achieved.

In this case, the second calculation means 4 adds the value calculated by the first calculation means 3 to a predetermined number of bits as described in claim 2 in addition to the invention described in claim 1. It is preferable to have a bit shifter 5 that shifts only the number of bits, and a remainder calculator 6 that calculates the remainder of the value shifted by the bit shifter 5 as a rounded value in the maximum number within the numerical range set by the rounding process. Similarly, in addition to the invention described in claim 1, as described in claim 3, when the number of bits of the initial value is n, the first calculation means 3 is a value obtained by squaring the initial value. May be stored in an area of 2 × n bit number, and the second arithmetic means 4 may use the central n-bit value of the area of 2 × n bit number stored by the first arithmetic means as a rounded value. preferable.

Further, in addition to the invention described in claim 1, 2 or 3, as described in claim 4, the value obtained by the second computing means 4 is stored as the initial value for the next time in the initial value storage. In addition to storing in the means, and in addition to the invention described in claim 1, 2 or 3, as described in claim 5, a value obtained by the second operation means 4 and a value obtained in the past It is effective to store the exclusive OR of the above as the next initial value in the initial value storage means.

[0016]

According to the first aspect of the present invention, the value calculated by squaring the initial value by the first calculating means based on the initial value stored in the initial value storing means is rounded by the second calculating means. Since the random number is generated by the processing, a high-quality random random number is generated as compared with the conventional digit-up counter.

In this case, according to the invention of claim 2,
The value calculated by the first calculation means is shifted by a predetermined number of bits by the bit shifter, and the remainder in the maximum number within the set numerical range of the value shifted by the remainder calculator is used as a random number. In addition to the invention described in claim 1, high-quality random numbers are generated within a predetermined range.

According to the third aspect of the invention, when the number of bits of the initial value is n, a value obtained by squaring the initial value is stored in an area of 2 × n number of bits, and
By using the central n-bit value in the × n-bit region as a random number, a high-quality random number is generated within a predetermined range in addition to the invention described in claim 1.

Further, according to the invention of claim 4, the value obtained by the second calculating means is used as an initial value for the next time, whereby in addition to the invention of claim 1, 2 or 3, A random number sequence is generated.

According to the invention described in claim 5, the exclusive OR of the value obtained by the second calculating means and the value obtained in the past is used as the next initial value. In addition to the invention described in claim 1, 2 or 3, the initial value that is the basis of random number generation is optimized, and a higher-quality random number is generated.

[0021]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment 1 of the present invention will be described below with reference to FIGS. 2 to 7, the same parts as those in FIG. 1 are designated by the same reference numerals.

First, the configuration of this embodiment will be described.

FIG. 2 is a front view of the game board 10 in the pachinko gaming machine using the gaming machine control circuit 1 of the first embodiment.

As shown in FIG. 2, a game area 12 surrounded by guide rails 11 is formed on the surface of the game board 10 of the pachinko game machine in the present embodiment, and the game area 12 is located at a substantially central position. A special symbol display device 13 for performing a variable display game is provided, and in a position below the special symbol display device 13, in a variable display game on the special symbol display device 13, a variation for performing a special game when a big hit occurs. A winning device (big winning opening) 14 is provided.

A first-type starting port 15 is provided above the variable winning device (large winning port) 14.

The variable display game on the special symbol display device 13 is a game area 1 by a game ball launching device (not shown).
On condition that the game ball guided in 2 wins the first type starting opening 15, the three symbols of the left symbol, the middle symbol, and the right symbol displayed in the special symbol display device 13 are displayed in a variable display. With the start, after a predetermined time (after 5 seconds or more), the left symbol, the right symbol, the variation of the medium symbol stops in order, and when the three symbols are aligned with the specific symbol at the time of stop, it is a big hit. The jackpot decision, the stop symbol decision, etc. are performed based on the random number generated by the gaming machine control circuit 1, so that the variable display game includes a stochastic element accompanied by contingency, and excites the interest of the game. Is.

FIG. 3 is a block diagram showing a main configuration of a pachinko gaming machine including the gaming machine control circuit 1 according to the first embodiment.

In FIG. 3, the pachinko gaming machine in this embodiment is a gaming machine control circuit 1, a first type starting switch 2
1, continuous switch 22, count switch 23, low-pass filter 24, buffer gate 25, output port 2
6, a driver 27 and a variable winning device (big winning opening) 14 are provided. In FIG. 3, B is a bus.

The gaming machine control circuit 1 is for generating uniform random numbers with a predetermined probability (in this embodiment, a probability of 1/245), and includes a random number generation block 1a and a CPU (Ce
ntral Processing Unit) 7, frequency divider 7a, ROM
(Read Only Memory) 8, RAM (Random Access Memo)
ry) 9 and the random number generation block 1a is
The register 2 is an initial value storage means, a square operation circuit 3 is a first operation means, and a rounding processing circuit 4 is a second operation means. Further, the gaming machine control circuit 1 outputs various kinds of information to the management device of the hall (game shop), for example, winning of the first-type starting opening 15, start of the variable display game, jackpot in the variable display game, and the like. It also has a function to do.

The register 2 is for storing an initial value for random number generation in this embodiment. Specifically, as the initial value stored in the register 2 in this embodiment, the counter is counted by the CPU 7 at startup. Is driven, this counter value is read at a predetermined timing,
The remainder obtained by dividing the read value by "245" (a value based on the jackpot occurrence probability in this embodiment) is stored as an initial value.

The squaring circuit 3 is composed of a parallel multiplication circuit according to Booth's method, has a function of obtaining a partial product and a function of shifting the partial product to the right, and squares the value stored in the register 2. The calculation result is output to the rounding processing circuit 4.

The rounding processing circuit 4 includes a bit shifter 5
And a remainder calculator 6, and the bit shifter 5 is
The lower 2 bits of the 16-bit value input from the squaring operation circuit 3 are bit-shifted as the upper 2 bits as they are (in this case, the shifted 2-bit data is rotated from the left side), and the shifted value is a remainder operation unit. The remainder arithmetic unit 6 outputs the remainder obtained by dividing the value shifted by the bit shifter 5 by “245” as a random number value.

The CPU 7 is an 8-bit microprocessor which is the center of the gaming machine control circuit 1 for controlling various other circuits, and is stored in the ROM 8 in one sequence unit by a reset interrupt process based on a reset signal described later. Various program processes are executed based on the stored program process procedure. When a random number used in the game is required, the random number generation block 1a is controlled to obtain the random number.

The frequency divider circuit 7a divides the clock pulse output from the clock oscillator to generate a reset signal every 2 msec and supplies the reset signal to the CPU 7.

The ROM 8 is a semiconductor memory for storing various control programs and data used by the CPU 7, and the RAM 9 stores program data and the like used during execution of program processing by the CPU 7.
It is a semiconductor memory that temporarily stores data related to games and is used as a work area.

The variable winning device (major winning opening) 14 is opened when a big hit occurs in the variable display game based on the winning timing of the first-class starting opening 15, giving the player a chance of a special game and playing a game. This gives the player many opportunities to win prize balls.

The first type starting switch 21 is a switch which is provided in the first type starting port 15 and detects the winning of a game ball.

Continuation switch 22 and count switch 2
3 is a proximity switch provided in the variable winning device (big winning opening) 14, and the continuation switch 22 is
The count switch 23 detects a passing ball that passes through a specific area (V zone) in the variable winning device (big winning opening) 14, and the count switch 23 wins all the winnings in the variable winning device (big winning opening) 14. It detects a sphere. The 10-count fraud prevention processing is performed based on the detection signals from the switches 22 and 23.

The low-pass filter 24 receives the output signals from the first type starting switch 21, the continuation switch 22 and the count switch 23, and also outputs from a discharge control circuit (not shown) which controls the discharge of the game balls. Request signal is input, and each of these signals is shaped and output as a pulse wave, and the buffer gate 25 amplifies the pulse wave shaped by the low-pass filter 24 and outputs the amplified pulse wave to the bus B.

The output port 26 outputs various signals input via the bus B to the driver 27. The driver 27 is based on the various signals input from the output port 26. (Winning prize) Output a drive control signal for driving 14, or, for example, a jackpot signal, a special figure rotation signal, a starting mouth winning signal, or a special symbol display to be output to a management device on the hall side. Device 13
Other control signals such as a data signal, a control code signal, and a strobe signal to be output to the control circuit, a transmission clock signal to be output to the discharge control circuit (not shown), and a prize ball data signal.

FIG. 4 is a block diagram showing a main configuration of a pachinko gaming machine including a gaming machine control circuit 1 which replaces that shown in FIG.

That is, in the example shown in FIG. 3, the random number generation block 1a is provided with the register 2, the square operation circuit 3, and the rounding processing circuit 4 independently, but in the example shown in FIG. As described above, the CPU 7 may be configured to have the functions of the register 2, the square operation circuit 3, and the rounding processing circuit 4. In this case, the CPU 7
At startup, the internal counter is driven, this counter value is read at a predetermined timing, and the read value is "24
A uniform random number is generated by setting the remainder divided by 5 ″ as an initial value, squaring this initial value, performing bit shift, and further outputting the remainder divided by “245” as a random number value.

Next, the operation (action) of this embodiment will be described.

In the above structure, first, the game ball launched from the game ball launching device (not shown) by the handle operation is guided by the guide rail 11 and launched into the game area 12 in the game board 10.

In the gaming machine control circuit 1, the presence or absence of the input of the first type starting switch 21 is monitored, and when the game ball wins the first type starting port 15, the first type starting switch 21 turns on the game ball. When a winning is detected, chattering of the detection signal is removed, logic conversion is performed, and input processing is performed. In addition, when the winning of the game sphere is detected in the first type starting opening 15, the number of the game spheres that won the prize is stored in a predetermined storage area (hereinafter referred to as a reserve area) up to four, and The value of the random number at the time of winning used in the variable display game is also temporarily stored in the holding area. By the way, the random number for determining the jackpot in the variable display game is
It is generated by the random number generation block 1a in the gaming machine control circuit 1.

Then, the variable display game is started in the special symbol display device 13 based on the memory of the winning of the game ball to the first type starting opening 15, that is, based on the data stored in the reserved area.

In the variable display game process, the gaming machine control circuit 1, for example, the normal operation process, the automatic stop time end monitoring process, the first symbol stop monitoring process, the second symbol stop monitoring and reach determination process, Each process such as three symbol stop monitoring process, symbol determination process, motion end monitoring process, losing motion process, and jackpot motion process is executed.

In this case, the stop symbol in the variable display game is also determined by the random number generated by the random number generation block 1a in the gaming machine control circuit 1, similarly to the above jackpot determination.

FIG. 5 is a diagram showing each symbol display area A, B, C in the special symbol display device 13.

The aforementioned holding area is provided in the RAM 9 of the gaming machine control circuit 1, and this holding area is shown in FIG.
As shown in, as a storage area of the stop symbol corresponding to each symbol display area A, B, C in the special symbol display device 13, it is sequentially updated every reset interrupt. Then, the data of each symbol is judged by the CPU 7 whether it is a big hit symbol or a lost symbol, and when it is judged as a big hit symbol, it is stored in the big hit storage area of the RAM 9 and is a lost symbol. R in some cases
It is stored in the lost storage area of AM9.

On the other hand, in the gaming machine control circuit 1, as described above, based on the random number for determining the big hit, it is judged whether it is a hit or not, and in the case of a hit, by the hit symbol stored in the big hit storage area. The stop symbol is determined, and in the case of a loss, the stop symbol is determined by the loss symbol stored in the loss storage area.

The data relating to the special symbol display device 13 set in the variable display game process is adapted to be output to a display control circuit (not shown) by the display control process.

6 and 7 are flow charts showing the control processing procedure of the pachinko gaming machine by the gaming machine control circuit 1.

When the control processing is started, first, initial information is set (for example, stack pointer setting, RAM 9 access permission, reset signal clearing, etc.) (step S1), and the CPU 7 sets the internal counter. The value is read at a predetermined timing, and the remainder obtained by dividing this counter value by “245” is stored in the register 2 as an initial value.

Next, it is checked whether or not the power is turned on for the first time for the pachinko gaming machine (step S2), and when it is detected that the pachinko gaming machine is supplied with power by the operation of the power switch, the CPU 7 causes the CPU 7 to operate. After the registers used and the RAM 9 are initialized and the wait time which is the time required to confirm the memory contents at power-on is set (step S3),
The wait time is updated by the wait time processing (step S4), and the CPU 7 waits for an interrupt.

On the other hand, in the processing of step S2,
If the power-on is not detected, the memory including the RAM 9 is inspected, that is, the presence or absence of abnormality in the memory is checked (step S5), and if the abnormality is detected in the memory,
After the processes of steps S3 and S4, the CPU 7 is in a state of waiting for an interrupt.

When no abnormality is detected in the memory in the processing of step S5, the gaming machine control circuit 1 performs prize ball control by communication processing relating to prize ball data with the discharge control circuit (not shown). While being performed (step S6), probability setting processing for setting the jackpot probability in the variable display game is performed (step S7).

Then, it is checked whether or not the power-on wait time set in step S3 has ended (step S8). If the wait time has not ended, the CPU 7 goes through the process of step S4. Waits for an interrupt, and when the wait time is over, output processing for outputting the output data set in various subroutine processing is performed (step S9) to determine the hit / miss in the variable display game. Then, a new random number is generated by the random number generation block 1a based on the initial value stored in the register 2, the random number is updated by the random number update process (step S10), and the input process is performed (step S11).

Hereinafter, a power fail monitoring process (step S12) for monitoring the power source voltage of the lamp power source, the solenoid power source, etc., and a count switch winning prize monitoring process (step S)
13), continuation switch winning a prize monitoring process (step S1)
4), after the special symbol operation switch prize monitoring process (step S15) in the first type starting port 15 and fraud monitoring process (step S16) are performed, the value of the event counter for efficiently processing each sequence is set. Based on this, branching processing is performed (step S17).

That is, when the counter value is "0", the voice synthesis processing (step S18), when the counter value is "1", the LED editing processing (step S19), and when the counter value is "2", the lamp editing processing is performed. Processing (step S20),
If the counter value is "3", the variable display game process (step S21), if the counter value is "4", the symbol control editing process (step S22), if the counter value is "5", the data transfer process (step) S23), if the counter value is "6", the external information editing process (step S24),
When the counter value is "7", the input information control process (step S25) is performed.

Next, the display data setting process for the display control circuit is performed (step S26), and the random number data used in the process of step S21 is stored in the register 2 as a new initial value (step S2).
7), the sound edit output process is performed (step S28),
The CPU 7 is in an interrupt waiting state.

Then, based on the above-mentioned reset signal, the CPU 7 is designed to recover from the state of waiting for an interrupt.

The generation of a specific random number in this embodiment will be described below.

As described above, since the remainder of "245" is stored as the initial value stored in the register 2,
The value is between "0" and "244".

Here, if "3" is stored as the initial value stored in the register 2, for example, in the random number generation block 1a, the square operation circuit 3 causes the square of "3" to be "9" (= "0000000000001001
B ") is obtained, and then, in the rounding processing circuit 4, the bit shifter 5 shifts (rotates)" 9 "obtained by the square operation circuit 3 to the right by 2 bits to" 16386 "(=" 01000000000000).
10B ″) is obtained, and the remainder operation unit 6
The remainder of "245" for 386 ", that is," 21 "
6 "is a random number value.

In the next random number generation, "216" is set as a new initial value, and the square operation circuit 3 generates "216656" which is the square of "46656" (= "1011011001).
000000B ") is obtained, and" 11664 "(=" 0010110110010) by the bit shifter 5.
000B ") is obtained, and the remainder operation unit 6 gives" 14 ".
9 ”(=“ 00000000010010101B ”) is obtained as a random number value, and thereafter, a random number sequence as shown in [Table 1] is generated in the same manner.

[0067]

[Table 1]

That is, the random numbers obtained by the conventional digit-up counter shown in FIG. 10 are regular arithmetic sequences, but in the present embodiment, random random number sequences can be generated.

A second preferred embodiment of the present invention will be described below with reference to FIG.
This will be described with reference to FIG. In addition, in FIG. 8 and FIG.
The same parts as those in the first embodiment described above are designated by the same reference numerals.

FIG. 8 is a block diagram showing a main configuration of the gaming machine control circuit 1 according to the second embodiment.

Random number generation block 1a in this embodiment
Is composed of a register 2, a square operation circuit 3, and a rounding processing circuit 4 ', as in the first embodiment. The rounding processing circuit 4', as shown in FIG.
The calculation result storage unit 31 is composed of a region extraction unit 32 and a remainder calculation unit 33.
This is for storing data of 6-bit width, and the area extraction unit 32 extracts 8 bits from the upper 5th bit to the 12th bit of the operation result storage unit 31 as the base of the random number value to be generated. And the remainder calculator 33
Is to output the remainder obtained by dividing the value extracted by the area extracting unit 32 by “245” as a random number value. This means that the value extracted by the area extraction unit 32 is from "0" to
Values up to "255" (8-bit data),
This is because the range from "0" to "244" required in the variable display game is different from that of the range. Therefore, the value extracted by the area extracting unit 32 is "245" to "255". As a countermeasure against the case, the remainder computing unit 33 computes the remainder of “245” with respect to the value extracted by the area extracting unit 32, and this remainder is used as a random number value.

However, in the above-mentioned configuration, when the value stored in the register 2 is a value of "0" to "3", or when the upper 5th bit to the 12th bit stored in the operation result storage unit 31 are 8th. When all the bits are “0”, the value extracted by the area extracting unit 32 is “0”, and the random number sequence obtained thereafter is a repetition of “0”.

Therefore, in order to solve such a problem, in the present embodiment, a value obtained by adding 7 to the value stored in the register 2 is input to the square calculation circuit 3 and the value calculated by the remainder calculation unit 33 is used. The exclusive OR with the value stored in the register 2 is set as a new initial value.

Generation of a specific random number in the second embodiment will be described below.

FIG. 9 is a diagram for explaining an operation example in the second embodiment.

As the initial value stored in the register 2,
Since the remainder of “245” is stored, it takes a value between “0” and “244” as in the first embodiment.

Assuming that "3" is stored as the initial value stored in the register 2 in the same manner as in the first embodiment, the square operation circuit 3 in the random number generation block 1a outputs "10" ( = "3" + "7") squared "1"
00 "(=" 0000000001100100B ",
In this case, n = 16 bits) is obtained, this value is stored in the operation result storage unit 31, and the central 8 bits (= 16 /
2) "6" (= "00000110B"), which is the value of minutes
Is extracted.

Since "6" extracted by the area extracting unit 32 is smaller than "245", the remainder calculating unit 3
In 3, the value “6” is output as it is, this value is used as a random number value, and the value “6” calculated by the remainder calculation unit 33 and the value “3” stored in the register 2 are exclusive OR “5”. ”
(= “00000101B”) is stored in the register 2 as a new initial value.

In this case, in the next random number generation, "5" is set as a new initial value, and the square operation circuit 3 sets "1".
“144” (= “000” which is the square of 2 ”(= 5 + 7)
000001001000B ″) is calculated and stored in the calculation result storage unit 31, and the area extraction unit 32 stores the central 8
The bit “9” (= “00001001B”) is extracted, the remainder operation unit 6 obtains “9” as a random number value, and the operation value “9” of the remainder operation unit 33 and the storage value “5” of the register 2 are obtained. "12" which is the exclusive OR with
(= “00001100B”) is stored in the register 2 as a new initial value. Thereafter, in the same manner, a random number sequence as shown in [Table 2] is generated.

[0080]

[Table 2]

That is, also in this embodiment, similarly to the above-mentioned embodiments, a random random number sequence can be generated by comparing with the random number sequence obtained by the conventional digit-up counter shown in FIG. .

As described above, in this embodiment, the square operation circuit 3 is calculated based on the initial value stored in the register 2.
By rounding the value obtained by squaring the initial value by the rounding processing circuit 4 to generate a random number, a random number of high quality is obtained as compared with the conventional digit-up counter shown in FIG. Random numbers can be generated.

Therefore, in this embodiment, it is possible to further increase the probability of probability in the gaming machine (pachinko gaming machine).

Although the invention made by the present inventor has been specifically described based on the preferred embodiments, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the scope of the invention. Needless to say.

For example, the number of bits to be shifted (rotated) by the bit shifter 5 is arbitrary, and the value obtained by the rounding processing circuit 4 was used as the initial value for the next random number generation in the above-mentioned embodiment. Not limited to this,
Random data obtained in the past may be held, and the exclusive OR of a predetermined number of random number data picked up from the held random data may be used as a new initial value.

Some specific CPUs have a register called a refresh register for refreshing the dynamic memory, and the data held in this refresh register is decremented every predetermined time.

In the CPU having such a refresh register, when it is not necessary to consider the reproducibility of random numbers, the exclusive OR of the value obtained by the rounding processing circuit 4 and the value of the refresh register is newly added. It may be used as an initial value.

Further, in the above description, the invention mainly made by the inventor is applied to the gaming machine control circuit in the pachinko gaming machine, which is the field of application of the background, but it is not limited thereto. Absent.

For example, the present invention can be applied to control of a pachi-slot or a game machine (pachi-con) that keeps the starting rate of the variable display game constant.

[0090]

According to the first aspect of the present invention, the value obtained by squaring the initial value by the first calculating means based on the initial value stored in the initial value storing means is rounded by the second calculating means. By performing the process and generating the random number, it is possible to generate a high-quality random random number as compared with the conventional digit-up counter.

In this case, according to the invention of claim 2,
By shifting the value calculated by the first calculation means by a predetermined number of bits by the bit shifter and using the remainder in the maximum number within the set numerical value range of the value shifted by the remainder calculator as a random number, In addition to the invention described in claim 1, it is possible to generate a high-quality random number within a predetermined range.

According to the third aspect of the present invention, when the number of bits of the initial value is n, a value obtained by squaring the initial value is stored in an area of 2 × n bits and the value of 2 × n is stored.
By using the central n-bit value in the n-bit area as the random number, it is possible to generate a high-quality random number within a predetermined range in addition to the invention described in claim 1.

Further, according to the invention described in claim 4, the value obtained by the second computing means is used as an initial value for the next time, whereby in addition to the invention described in claim 1, 2 or 3, a random value is obtained. It is possible to generate a sequence of random numbers.

According to the fifth aspect of the invention, the exclusive OR of the value obtained by the second computing means and the value obtained in the past is used as the initial value for the next time. In addition to the invention described in Item 1, 2 or 3, it is possible to optimize an initial value which is a source of random number generation, and to generate a higher-quality random number.

[Brief description of drawings]

FIG. 1 is a principle diagram of a gaming machine control circuit according to the present invention.

FIG. 2 is a front view of a game board in a pachinko gaming machine using the gaming machine control circuit of the first embodiment.

FIG. 3 is a block diagram showing a main configuration of a pachinko gaming machine including the gaming machine control circuit according to the first embodiment.

FIG. 4 is a block diagram showing a main configuration of a pachinko gaming machine including a gaming machine control circuit replacing the one shown in FIG. 3;

FIG. 5 is a diagram showing each symbol display area in the special symbol display device.

FIG. 6 is a flowchart showing a control processing procedure of a pachinko gaming machine by a gaming machine control circuit.

7 is a flow chart showing a control processing procedure of the pachinko gaming machine by the gaming machine control circuit, following FIG.

FIG. 8 is a block diagram showing a main configuration of a gaming machine control circuit according to a second embodiment.

FIG. 9 is a diagram for explaining an operation example in the second embodiment.

FIG. 10 is a block diagram showing an overall configuration of a conventional example.

[Explanation of symbols]

 1 Gaming Machine Control Circuit 1a Random Number Generation Block 2 Register (Initial Value Storage Means) 3 Square Operation Circuit (First Operation Means) 4 Rounding Processing Circuit (Second Operation Means) 5 Bit Shifter 6 Remainder Operation Unit 7 CPU 7a Frequency Division Circuit 8 ROM 9 RAM 10 game board 11 guide rail 12 game area 13 special symbol display device 14 variable winning a prize device (large winning hole) 15 first type starting port 21 first type starting switch 22 continuation switch 23 count switch 24 low pass filter 25 buffer gate 26 Output Port 27 Driver 31 Calculation Result Storage Unit 32 Area Extraction Unit B Bus

Claims (5)

[Claims] 1. Controlling a game on a gaming machine,
In a gaming machine control circuit for generating a random number used for the game, an initial value storage means for storing a preset arbitrary value as an initial value, and a first calculation means for squaring the initial value stored in the initial value storage means. And a second calculation means for rounding the calculation result of the first calculation means to obtain a value within a preset numerical range, the value rounded by the second calculation means being a random number. A gaming machine control circuit characterized by outputting as. 2. The second arithmetic means is a bit shifter for shifting the value calculated by the first arithmetic means by a predetermined number of bits, and the value shifted by the bit shifter is a numerical range set by a rounding process. 2. The gaming machine control circuit according to claim 1, further comprising: a remainder computing unit that computes a remainder in the maximum number as a rounded value. 3. The first computing means stores a value obtained by squaring the initial value in a region of 2 × n bit number, where n is the number of bits of the initial value, and the second computing means is 2. The gaming machine control circuit according to claim 1, wherein the central n-bit value of the 2 × n-bit number area stored by the first computing means is a rounded value. 4. The game machine control circuit according to claim 1, 2 or 3, wherein the value obtained by said second arithmetic means is stored in said initial value storage means as an initial value for the next time. 5. An exclusive OR of a value obtained by the second calculation means and a value obtained in the past is stored in the initial value storage means as an initial value for the next time. 2. The game machine control circuit according to 2 or 3.