JPH0787225B2 - Substrate for mounting semiconductor elements - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Overview] Regarding improvement of a semiconductor element mounting substrate having a multilayer structure including a conductor layer and an insulating layer, a short circuit failure between the conductor layer and the semiconductor element mounting pad is caused by changing the shape of the insulating layer. For the purpose of providing a substrate for mounting a semiconductor element capable of preventing the occurrence of a semiconductor element mounting pad, a semiconductor element mounting pad is provided on the substrate, and a multi-layer conductor layer and an insulating layer arranged centering on the semiconductor element mounting pad. A semiconductor element mounting substrate comprising: a semiconductor element mounting substrate, wherein the insulating layer formed so as to cover the conductor layer of the semiconductor element mounting substrate is formed by shifting the position of the end face, and a step is provided between the insulating layers. To do.

[Industrial application field]

TECHNICAL FIELD The present invention relates to an improvement of a semiconductor element mounting substrate having a multilayer structure including a conductor layer and an insulating layer.

In the conventional semiconductor element mounting substrate, the insulating layers of the multilayer structure have no steps between each other, and the end faces are in conformity with each other, and a short circuit failure due to this structure occurs in the conductor layer forming process. is doing.

Under the circumstances as described above, there is a demand for a semiconductor element mounting substrate capable of preventing the occurrence of short circuit failures between conductor layers in the manufacturing process.

[Conventional technology]

A conventional semiconductor element mounting substrate on which four semiconductor elements are mounted will be described in detail with reference to FIGS. 4 and 5.

FIG. 4 is a plan view of a conventional semiconductor element mounting substrate,
FIG. 5 is a diagram showing the right part from the center of the BB cross section of FIG.

As shown in FIG. 5, a semiconductor element mounting pad 16a is formed at a predetermined position on the substrate 11, and the semiconductor element 6 is fixed to the surface of the semiconductor element mounting pad 16a.
12a, 12b, 12c and insulating layers 13a, 13b, 13c are alternately laminated and formed.

Connection vias 14a, 14b, 14c penetrating the insulating layer are provided between the conductor layers to connect the conductor layers, and a component pad 15 connected to the connection via 14c is provided on the surface of the insulating layer 13c.

Since the end surfaces of the insulating layers 13a, 13b, 13c facing the semiconductor element mounting pad 16a are formed at the same position as shown in the figure, this end surface is the semiconductor element mounting pad 16a in the plan view of FIG. Forming a quadrangle surrounding the.

In order to manufacture such a semiconductor element mounting substrate, first, the semiconductor element mounting pad 16a and the conductor layer 12a are formed on the surface of the substrate 11 by using a photolithography technique.

Then, a thin film of polyimide or the like having a film thickness of 13 to 25 μm, which is a material of the insulating layer 13a, is applied and formed on the entire surface, and a hole for forming the connection via 14a and a required insulating portion are formed by using the photolithography technique, and plating is performed. A metal film is grown on the surface of the conductor layer 12a in the hole to form the connection via 14a.

After that, a resist film is formed on the entire surface, the resist film in the portion where the conductor layer 12b is formed is removed by using a photolithography technique, plating is performed, and a metal film is grown on the surface of the insulating layer 13a in this portion to form a conductor layer. 12b is formed and the resist film is removed.

After that, these steps are repeated to sequentially connect vias 14b,
The insulating layer 13b and the conductor layer 12c are formed, and then the connection via 14c, the insulating layer 13c, and the component pad 15 are formed, and the manufacturing of the semiconductor element mounting substrate is completed.

[Problems to be Solved by the Invention]

In the conventional semiconductor element mounting substrate described above,
As the conductor layer and the insulating layer are sequentially laminated and formed,
When the level difference between the surface of the substrate and the surface of the conductor layer or the insulating layer increases, when the resist film is applied over the entire surface, the surface is surrounded by the end surface of the conductor layer and the surface of the substrate as shown in FIG. 6 (a). The resist does not sufficiently wrap around the portion, and the void 18a is generated there.

When the resist is heated to cure in such a state, as shown in FIG. 6 (b), the air in the voids thermally expands, cracks are formed in the resist film 18, and the surface of the insulating layer is cracked. When the conductor layer, the connection via or the component pad is formed by plating, the plating is performed through this crack, and as shown in the figure, there is a problem that a short circuit occurs between the semiconductor element mounting pad 16a and the conductor layer 12a. there were.

An object of the present invention is to provide a semiconductor element mounting substrate that can prevent a short circuit failure between a conductor layer and a semiconductor element mounting pad by changing the shape of an insulating layer that can be easily and easily performed. It was done.

[Means for Solving the Problems]

The semiconductor element mounting substrate of the present invention is a semiconductor element mounting substrate comprising a semiconductor element mounting pad on the substrate and comprising a large number of conductor layers and insulating layers arranged around the semiconductor element mounting pad. The insulating layer formed so as to cover the conductor layer of the semiconductor element mounting substrate is formed by shifting the position of the end face, and a step is provided between the insulating layers.

[Action]

That is, in the present invention, a semiconductor element mounting pad is provided on the substrate, and a plurality of conductor layers and insulating layers are alternately laminated with the semiconductor element mounting pad as the center, and conductors of the semiconductor element mounting substrate are arranged. The insulating layer formed so as to cover the layer is formed by shifting the position of the end surface to form a step between the insulating layers. Therefore, when a resist film is applied, the resist film, the end surface of the insulating layer, and the surface of the substrate Alternatively, since the space surrounded by the surface of the insulating layer immediately below is almost the same in any insulating layer and becomes small, when the resist is applied, the resist sufficiently wraps around this space, so that a void is less likely to occur, Even during heating for curing the resist film, cracks will not occur in the resist film due to thermal expansion of air in the voids, and the semiconductor element mounting pad and the conductor layer Short-circuit fault is possible to prevent the occurrence between.

〔Example〕

An embodiment of the present invention in which four semiconductor elements are mounted will be described in detail below with reference to FIGS.

FIG. 1 is a plan view of a semiconductor element mounting substrate of the present invention, and FIG. 2 is a view showing a right part from the center of the AA cross section of FIG.

As shown in FIG. 2, a semiconductor element mounting pad 6a is formed at a predetermined position on the substrate 1, and the semiconductor element 6 is fixed to the surface of the semiconductor element mounting pad 6a.
A, 2b, 2c and insulating layers 3a, 3b, 3c are alternately laminated.

Connection vias 4a, 4b, 4c penetrating the insulating layer are provided between the conductor layers to connect the conductor layers, and a component pad 5 connected to the connection via 4c is provided on the surface of the insulating layer 3c.

The end surfaces of the insulating layers 3a, 3b, 3c formed so as to cover the conductor layers of the semiconductor element mounting substrate are formed such that the distance from the semiconductor element mounting pad 6a increases as it goes to the upper layer as shown in the figure. Therefore, in the plan view of FIG. 2, this end face forms various squares surrounding the semiconductor element mounting pad 6a.

In order to manufacture such a substrate for mounting a semiconductor element, first, as shown in FIG. 3 (a), copper, aluminum, or gold which is a material of the semiconductor element mounting pad 6a and the conductor layer 2a is formed on the entire surface of the substrate 1. The thin film 2 is formed by the vapor deposition method, and the resist film 7 is formed on the entire surface of the thin film 2.

Next, using a photolithography technique, a resist film 7 is formed.
After patterning and removing unnecessary thin films of these metals by etching, the resist film 7 is removed to form the semiconductor element mounting pad 6a and the conductor layer 2a as shown in FIG. 3 (b).

Next, as shown in FIG. 3 (c), a thin film of polyimide or the like having a film thickness of 13 to 25 μm, which is a material of the insulating layer 3a, is formed on the entire surface by coating, and a hole for forming a connection via 4a is formed by using a photolithography technique. The required insulating portion is formed, plating is performed, and a metal film is grown on the surface of the conductor layer 2a at the bottom of this hole to form the connection via 4a.

After that, as shown in FIG. 3D, a resist film 8 is formed on the entire surface.
Then, the conductor layer 2b is formed by using a photolithography technique.
Is patterned to remove the resist film 8 in the portion where the conductor layer 2b is formed, and plating is performed to grow a metal film on the surface of the insulating layer 3a in this portion to form the conductor layer 2b. The film 8 is removed.

After that, the steps of FIGS. 3 (c) to 3 (d) are repeated to sequentially form the connection via 4b, the insulating layer 3b, and the conductor layer 2c, and further, the connection via 4c, the insulating layer 3c, and the component pad 5 are formed. Forming,
The manufacturing of the semiconductor element mounting substrate is completed.

In the present invention, as shown in FIG.
The end face of the semiconductor element mounting pad 6a more than the end face of the insulating layer 3a.
From the semiconductor element mounting pad 6a farther than the end face of the insulating layer 3b, and the end face of the insulating layer 3c is formed further away from the semiconductor element mounting pad 6a. .

When a step is provided between the insulating layers in this manner, when a resist is applied, a space surrounded by the resist film, the end surface of the insulating layer, and the surface of the substrate or the surface of the insulating layer immediately below is formed in which insulating layer. In the case of, the resist is almost the same and it becomes smaller, so that when the resist is applied, the resist sufficiently wraps around this space, and it is difficult for voids to occur, and even when heating for resist curing, the thermal expansion of air in this void As a result, cracks do not occur in the resist film, and it is possible to prevent a short circuit failure from occurring between the semiconductor element mounting pad and the conductor layer even during the plating process.

〔The invention's effect〕

As is clear from the above description, according to the present invention, the insulating layer formed so as to cover the conductor layer of the semiconductor element mounting substrate is formed by shifting the position of the end face, and the step is provided between the insulating layers. An extremely simple change in the shape of the insulating layer has the advantage that it is possible to prevent short-circuit failures between the semiconductor element mounting pad and the conductor layer, and to provide a semiconductor element mounting substrate that can be expected to significantly improve reliability. Is possible.

[Brief description of drawings]

FIG. 1 is a plan view of an embodiment according to the present invention, FIG. 2 is a sectional view taken along the line AA of FIG. 1, and FIG. 3 is a side sectional view showing the steps of manufacturing the semiconductor device mounting substrate of the present invention. FIG. 4 is a plan view of a conventional semiconductor element mounting substrate, FIG. 5 is a sectional view taken along the line BB of FIG. 4, and FIG. 6 is a side sectional view showing problems in the conventional semiconductor element mounting substrate. is there. In the figure, 1 is a substrate, 2 is a thin film, 2a is a conductor layer, 2b is a conductor layer, 2c is a conductor layer, 3a is an insulating layer, 3b is an insulating layer, 3c is an insulating layer, 4a is a connecting via, and 4b is a connecting via. , 4c is a connection via, 5 is a component pad, 6 is a semiconductor element, 6a is a semiconductor element mounting pad, 7 is a resist film, and 8 is a resist film.

Claims (1)

[Claims] 1. A semiconductor element mounting substrate comprising a semiconductor element mounting pad on a substrate, comprising a multi-layered conductor layer and an insulating layer arranged centering on the semiconductor element mounting pad, the semiconductor element mounting A substrate for mounting a semiconductor element, characterized in that the insulating layer formed so as to cover the conductor layer of the insulating substrate is formed by shifting the position of the end face, and a step is provided between the insulating layers.