JPH0786301A - Method of manufacturing bipolar transistor - Google Patents

Abstract

PURPOSE:To resolve a problem of metal contamination in the base and improve the high frequency characteristics by a selective epitaxial growth to form a base region of second conductivity type. CONSTITUTION:After isolating an element-forming region on the surface of an n-type single crystal Si substrate 1 by LOCUS oxidation, a first SiO2 film 2, a p-type polycrystalline Si film 3, a WSi film 4, and a second SiO2 film 5 by CVD are formed thereon and then photolithography-etching is made to remove the films 5, 4 and 3 from the base region. Then, thermal oxidation is made to form a third SiO2 film 6 oh the side walls of the films 3 and 4, and isotropic wet etching selective epitaxial growth using an HF gas is made whereby the base resistance is reduced by using silicide for a base leading electrode of a bipolar transistor and base junction is realized by the selective epitaxial growth, thus improving the high frequency characteristic of this transistor.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a bipolar transistor using polycide as a base extraction electrode.

[0002]

2. Description of the Related Art Reducing the base resistance is an effective means for improving the high frequency characteristics of a bipolar transistor. Therefore, a structure in which the base extraction electrode is formed of polycrystalline silicon is generally used, and as a means for further reducing the resistance, the base extraction electrode is made of polycide (two-layer structure of doped polycrystalline silicon + metal silicide). There is a method of forming.

The following is an example of this method. Here, it is noted that the polycide is shared as the gate electrode of the MOS transistor to form the BiCMOS integrated circuit, and the application to the BiCMOS integrated circuit is possible. FIG. 3 is a sectional view of a BiCMOS manufacturing process including such a conventional bipolar transistor.

First, as shown in FIG. 3A, after the steps of element isolation by the field oxide film 102 on the Si substrate 101 and gate oxidation, boron is ion-implanted into the deposited polycrystalline silicon film 103 to form a P type. The WSi ₂ film 10
4. The CVD oxide film 105 is sequentially deposited. Then, FIG.
As shown in (b), the W polycide film is processed by the dry etching technique to form the gate electrode 106 and the base extraction electrode 107 at the same time.

Next, as shown in FIG.
After forming the drain 108 and the MOS element 109, a CVD silicon oxide film 110 for protecting the MOS element 109 is formed. Next, an intrinsic base region is opened in the base extraction electrode 107. Since the W polycide film is processed on the underlying gate oxide film, the underlying Si substrate 101 is not scraped.

Next, as shown in FIG. 3D, after opening the base region, the underlying gate oxide film is removed by etching,
Selective epitaxial growth is performed thereon to form a P ⁺ single crystal layer 111 on the base formation planned region. Next, FIG.
As shown in (e), a silicon oxide film is formed by a CVD method, subsequently a sidewall is formed by a well-known RIE method, and an N-type polycrystalline silicon film 112 for an emitter electrode is further formed. An emitter region 113 is formed by thermal diffusion from the polycrystalline silicon film 112.

As described above, in the manufacturing method of the BiCMOS having the bipolar transistor, the SiO ₂ film (also used as the gate oxide film of the MOS transistor) is present in the lower layer of the polycide, and the connecting portion between the base extraction electrode and the single crystal substrate is the base. It is designed to be fixed at the end of the opening. Therefore, the base region can be narrowed and the collector-base parasitic capacitance can be reduced as compared with the case where polycide is directly formed on the single crystal substrate.

In such a structure, if the base layer is formed by selective epitaxial growth, a shallow base junction can be achieved, and it is expected that the high frequency characteristics of the bipolar transistor can be further improved.

[0009]

However, in the above-described conventional device, the side wall of the metal silicide layer is exposed during the selective epitaxial growth. In order to provide selectivity in epitaxial growth, it is necessary to use an etching gas such as HCl, which causes the metal silicide layer to be etched and mixed into the base formation region (epitaxial base layer). The metal contamination of the base region causes problems in the characteristics of the bipolar transistor such as a decrease in current amplification factor (hFE) due to an increase in base recombination current and an increase in emitter-base reverse leakage current.

To prevent this, S is formed on the side wall of the silicide film.
Although it is necessary to form a protective film such as an iO ₂ film, on the other hand, polycrystalline silicon has a problem that the base electrode and the single crystal region cannot be connected unless the side wall is exposed. It has not been technically possible to obtain both the base extraction electrode and the formation of the base layer by selective epitaxial growth.

The present invention eliminates the problem of metal contamination in the base layer that accompanies the coexistence of the base extraction by the polycide electrode and the formation of the base layer by epitaxial growth described above, and provides a method for manufacturing a bipolar transistor having excellent high frequency characteristics. That is the purpose.

[0012]

In order to achieve the above-mentioned object, the present invention provides a method for manufacturing a bipolar transistor, comprising: (1) forming a first silicon oxide film on a first conductivity type single crystal semiconductor substrate; A step of forming a second conductivity type polycrystalline silicon film on the first silicon oxide film, a step of forming a metal silicide film on the polycrystalline silicon film, and a step of forming a metal silicide film on the polycrystalline silicon film. A step of forming a second silicon oxide film, a step of removing the second silicon oxide film, the metal silicide film, and the polycrystalline silicon film in a region where a base is to be formed by photolithographic etching; Forming a third silicon oxide film on the side wall of the metal silicide film and the polycrystalline silicon film; and forming a third oxide film on the side wall of the polycrystalline silicon film by isotropic etching. The step of removing the recon film and the first silicon oxide film at the bottom of the opening and the step of forming the second conductivity type base region by selective epitaxial growth are performed.

(2) The bipolar transistor and MO
An S-transistor is formed at the same time, and the first silicon oxide film is a polyoxide of a MOS transistor including the gate oxide film of the MOS transistor, the polycrystalline silicon film of the second conductivity type, the metal silicide film, and the second silicon oxide film. The gate electrode is formed. (3) A step of forming a silicon nitride film on the first conductivity type single crystal semiconductor substrate, a step of forming a second conductivity type polycrystalline silicon film on the silicon nitride film, and a step of forming a polysilicon film on the polycrystalline silicon film. A step of forming a metal silicide film on the metal silicide film, a step of forming a second silicon oxide film on the metal silicide film, and a second silicon oxide film and a metal silicide film in a region where a base is to be formed by photolithographic etching. ,
A step of removing the polycrystalline silicon film, a step of forming a third silicon oxide film on the side wall of the metal silicide film and the polycrystalline silicon film by thermal oxidation, and a step of forming the polycrystalline silicon by isotropic etching. A step of removing the third silicon oxide film on the side wall of the film, a step of removing the silicon nitride film in the area where the base is to be formed, and a step of forming a second conductivity type base area by selective epitaxial growth are performed. It is the one.

(4) Forming a first silicon oxide film on the first conductivity type single crystal semiconductor substrate, and forming a second conductivity type polycrystalline silicon film on the first silicon oxide film. A step of forming on the polycrystalline silicon film a fourth silicon oxide film having a width wider than both sides of a base formation planned region, forming a metal silicide film, and forming a second metal oxide film on the metal silicide film. A step of forming a silicon oxide film,
A step of removing the second silicon oxide film, the metal silicide film, the fourth silicon oxide film, and the polycrystalline silicon film in the region where the base is to be formed by photolithography and etching; and the metal silicide film by thermal oxidation. A step of forming a third silicon oxide film on the side wall of the polycrystalline silicon film, and a third silicon oxide film on the side wall of the polycrystalline silicon film and the first silicon oxide on the bottom of the opening by isotropic etching. The step of removing the film and the step of forming the second conductivity type base region by selective epitaxial growth are performed.

[0015]

According to the present invention, as described above, after the polycide electrode for drawing out the base is patterned to form the base opening region, oxidation / etching is performed to reduce the difference in the oxidation rate between the polycrystalline silicon and the silicide. Since the oxide film is left only on the side wall of the silicide by using it, and then the base layer is formed by the selective epitaxial growth, it is possible to prevent the contamination of the base layer by the silicide metal when the base layer is formed by the selective epitaxial growth. it can.

Therefore, the use of polycide for the base extraction electrode can simultaneously reduce the base resistance and realize the shallow junction of the base by the selective epitaxial growth, thereby improving the high frequency characteristics of the bipolar transistor.

[0017]

Embodiments of the present invention will be described in detail below with reference to the drawings. First, a first embodiment of the present invention will be described with reference to FIGS. 1A and 1B are sectional views of a bipolar transistor manufacturing process showing the first embodiment of the present invention (No. 1), and FIG. 2 is a sectional view of a manufacturing process of the bipolar transistor (No. 2).

(1) First, as shown in FIG.
A well-known LOCOS is provided at a predetermined position on the surface of the single crystal Si substrate 1.
After separating the element formation region using oxidation, the first Si
O ₂ film 100 Å, P-type polycrystalline Si film 3 1500
Å, WSi film 4 1000 Å, second Si by CVD
The O ₂ film 5 is sequentially formed by 2000Å. After that, photolithography and etching are performed, and the second Si in the base formation planned region is etched.
The O ₂ film 5, the WSi film 4 and the P-type polycrystalline Si film 3 are removed.

(2) Next, as shown in FIG. 1B, thermal oxidation is performed from the state shown in FIG. 1A, and the P-type polycrystalline Si film 3 is formed.
A third SiO ₂ film 6 is formed on the side wall of the WSi film 4. In this case, since the oxidation rate is different, P-type polycrystalline Si
If the third SiO ₂ film 6 of the side wall of the film 3 is about 200 Å, a third SiO ₂ film 6 on the side wall of the WSi film 4 is 350
It will be about 400Å. In addition, the first SiO 2 at the bottom of the opening
₂ Membrane 2 also increases to 200-250Å.

(3) Next, as shown in FIG.
From the state shown in FIG. 1B, HF-based isotropic wet etching is performed for about 300Å. Then, the above-mentioned third SiO
_{Due to} the difference in film thickness between the _two films 6, only the side wall of the WSi film 4 is made of SiO ₂
The film 6a remains, and the second SiO ₂ film 5 on the side wall of the polycrystalline Si film and the first SiO ₂ film 2 on the bottom of the opening are removed. (4) Next, as shown in FIG. 1 (d), selective epitaxial growth is performed from the state of FIG. 1 (c) to form a P ⁺ single crystal layer 7 on the region where the base is to be formed 1500 Å. In that case, the condition is such that the P ⁺ single crystal layer 7 does not grow on the SiO ₂ film 6a.

(5) Next, as shown in FIG. 2A, from the state of FIG. 1D, a SiO ₂ film 8 of 700 Å is formed by the CVD method. Then, deposit a polycrystalline Si film at 2500 Å
Then, the polycrystalline Si sidewall 9 is formed by the well-known RIE method. (6) Next, as shown in FIG. 2B, the SiO ₂ film 8 in the emitter formation region is removed from the state of FIG. 2A using the polycrystalline Si sidewall 9 as a mask. Then, the N-type polycrystalline Si film 10 for the emitter electrode is formed, and the emitter region 11 is formed by thermal diffusion from the polycrystalline Si film 10.

After that, a bipolar transistor is completed through a well-known contact hole forming step and a thermal oxidation step. As described above, according to the first embodiment, the SiO ₂ film 6 is formed only on the side wall of the WSi film 4 as the silicide portion of the polycide for the base extraction electrode of the bipolar transistor.
Forming a side wall of the polycrystalline Si film 3 and the single crystal Si substrate 1
Since it can be exposed, contamination of the base layer with a silicide metal can be prevented when the base layer is formed by selective epitaxial growth.

Therefore, the use of polycide for the base extraction electrode can simultaneously reduce the base resistance and realize the shallow junction of the base by the selective epitaxial growth, thereby improving the high frequency characteristics of the bipolar transistor. Next, a second embodiment of the present invention will be described with reference to FIG.
Will be explained. FIG. 4 is a sectional view showing the main part of the manufacturing process of a BiCMOS having a bipolar transistor according to the second embodiment of the present invention.

(1) First, as shown in FIG. 4A, the process shown in FIG. 1A of the first embodiment is performed to form a polycide gate electrode 401 of a MOS transistor 400, A base formation planned region of the bipolar transistor is formed at the same time. Incidentally, for the P-type polycrystalline Si film 3 which is a step of making the gate electrode N-type before the above step,
In the photolithography / ion implantation step, separate P-type and N-type impurities are introduced into the bipolar transistor region and the MOS transistor region. Then, in the photolithography / ion implantation step, the LDD region 402 of the MOS transistor is formed.

(2) Next, as shown in FIG.
From the state of FIG. 4A, a Si ₃ N ₄ film 403 is formed to 100 Å, and the Si ₃ N ₄ film 403 in the bipolar transistor formation region is removed by a photolithography etching process. (3) Next, as shown in FIG. 4C, thermal oxidation / etching / selective epitaxial growth is performed from the state of FIG. 4B similarly to the first embodiment. Since the MOS transistor region has the Si ₃ N ₄ film 403, it is not affected by epitaxial film growth or the like. After that, in the process shown in FIGS. 1D to 2B of the first embodiment, a photolitho ion implantation process for forming the source / drain regions of the MOS transistor and a contact hole formation. -A BiCMOS type semiconductor integrated circuit is completed by adding a wiring process.

As described above, according to the second embodiment, the bipolar transistor and the MOS transistor are simultaneously formed, the first silicon oxide film is the gate oxide film of the MOS transistor, and the second conductivity type polycrystalline silicon film. A metal silicide film and a second silicon oxide film
The polycide gate electrode of the S transistor can be formed.

Therefore, the high speed of the bipolar transistor can be utilized and the degree of integration of the device can be improved. Next, a third embodiment of the present invention will be described with reference to FIG. FIG. 5 is a sectional view showing the process of manufacturing an essential part of a bipolar transistor according to the third embodiment of the present invention.

(1) First, as shown in FIG.
A well-known LOCO is provided at a predetermined position on the surface of the mold single crystal Si substrate 1.
After the element formation region is separated by using S oxidation, Si ₃ N
₄ Film 201 is formed 500 Å. After that, as in the first embodiment, the P-type polycrystalline silicon film 3, the WSi film 4, the CVD
2nd SiO ₂ films 5 are formed respectively, and photolithography and etching are performed.
The O ₂ film 5, the WSi film 4 and the P-type polycrystalline Si film 3 are removed.

[0029] (2) Next, as shown in FIG. 5 (b), from the state of FIG. 5 (a), by thermal oxidation, a third SiO ₂ film 6 is formed, the third SiO ₂ The film 6 is photolithographically etched, leaving a third SiO ₂ film 6 on the sidewall. (3) Next, as shown in FIG. 5C, Si at the bottom of the opening
_{The 3} N ₄ film 201 is etched. At this time, WSi
The SiO ₂ film 6a remains only on the side wall of the film 4.

(4) Next, as shown in FIG.
Perform selective epitaxial growth from the state of 5 (c), and
P on the area to be formed⁺The single crystal layer 7 is formed. this
At this time, the film thickness is the same as that of the first embodiment compared with the heat of FIG.
First SiO increased by oxidation ₂Smaller by the film thickness of film 2
can do. After that, the diagram of the first embodiment described above
2 (a) to FIG. 2 (b) are performed, and
The rat transistor is completed.

As described above, according to the third embodiment, in addition to the effects of the first embodiment, the formation of the silicon nitride film further prevents the bottom of the opening from being oxidized during sidewall oxidation, so that the film of the selective epitaxial growth layer is not oxidized. The thickness can be reduced. This enables different base shallow junctions, and further improves the high frequency characteristics of the bipolar transistor.

Next, a fourth embodiment of the present invention will be described with reference to FIG. FIG. 6 is a cross-sectional view of the essential part manufacturing process of a bipolar transistor showing the fourth embodiment of the present invention. (1) First, as shown in FIG. 6A, N-type single crystal Si
At a predetermined position on the surface of the substrate 1, after the element formation planned region is separated by using the well-known LOCOS oxidation, a first SiO ₂ film 2 of 100 Å and a P-type polycrystalline silicon film 3 of 1500 Å are formed. After that, 100 Å of SiO ₂ film 301 is formed,
From the planned base formation area by photolithography etching,
0.5μm larger on one side (oversized) 4th SiO
₂ Leave the film 301.

(2) Next, as shown in FIG. 6 (b), the WSi film 4 and the second SiO ₂ film 5 are formed from the state of FIG. 6 (a), and the same as in FIG. 1 (a). An area for forming a base is opened. (3) Next, as shown in FIG. 6C, the third SiO ₂ film 6 is removed from the state of FIG.
It grows so as to sandwich the O ₂ film 301.

(4) Next, as shown in FIG. 6D, HF isotropic wet etching is performed from the state of FIG. 6C. Then, as shown in FIG. 7 which is an enlarged view of the portion A of FIG. 6D, the SiO ₂ film 6a remains only on the side wall of the WSi film 4 due to the difference in the film thickness of the third SiO ₂ film 6 described above. ,
The second SiO ₂ film 5 on the side wall of the polycrystalline silicon film and the first SiO ₂ film 2 on the bottom of the opening are removed.

After that, FIG. 1 of the above-mentioned first embodiment.
The bipolar transistor is completed through the steps shown in (d) to FIG. 2 (b). Thus, the SiO shown in FIG.
_Since the silicide on the sidewall of the polycide film and the polycrystalline silicon film are separated by the ₂ film 301, the diffusion of the silicide metal into the polycrystalline silicon film due to the heat treatment at the time of sidewall oxidation can be suppressed. This is because the silicide metal diffusion rate in the SiO ₂ film 301 is smaller than that in the polycrystalline silicon film. Therefore, contamination of silicide metal during selective epitaxial growth can be further reduced.

Further, in the process of forming the SiO ₂ film on the side wall of the silicide through the side wall oxidation and the wet etching, since the SiO ₂ film exists at the interface between the polycrystalline silicon film and the silicide film, the wet etching solution penetrates into this portion. In contrast, a stable SiO ₂ protective film can be formed. As described above, although there is an increase in the steps of SiO ₂ film formation, photolithography and etching as compared with the first embodiment,
A bipolar transistor having an excellent base reverse leakage characteristic can be formed with high yield.

The present invention is not limited to the above embodiments, and various modifications can be made within the scope of the present invention, and these modifications are not excluded from the scope of the present invention.

[0038]

As described above in detail, according to the present invention, the insulating film is formed only on the side wall of the silicide portion of the polycide for the base extraction electrode of the bipolar transistor, and the side wall of the polycrystalline silicon film and the single crystal are formed. Since the silicon substrate can be exposed, contamination of the base layer with silicide metal can be prevented when the base layer is formed by selective epitaxial growth.

Therefore, the use of polycide for the base extraction electrode can simultaneously reduce the base resistance and realize the shallow junction of the base by selective epitaxial growth, thereby improving the high frequency characteristics of the bipolar transistor.

[Brief description of drawings]

FIG. 1 is a manufacturing process sectional view (1) of a bipolar transistor according to a first embodiment of the present invention.

FIG. 2 is a manufacturing process sectional view (2) of the bipolar transistor according to the first embodiment of the present invention.

FIG. 3 BiC with conventional bipolar transistor
It is a MOS manufacturing process sectional view.

FIG. 4 is a sectional view of a BiCMOS manufacturing process including a bipolar transistor according to the second embodiment of the present invention.

FIG. 5 is a sectional view of a main part manufacturing step of the bipolar transistor showing the third embodiment of the present invention.

FIG. 6 is a sectional view of a main part manufacturing step of the bipolar transistor according to the fourth exemplary embodiment of the present invention.

FIG. 7 is an enlarged cross-sectional view of a portion A of FIG.

[Explanation of symbols]

1 N-type single crystal Si substrate 2, 5, 6, 6a, 8, 301 SiO ₂ film 3 P-type polycrystalline Si film 4 WSi film 7 P ⁺ single-crystal layer 9 Polycrystalline silicon sidewall 10 N-type polycrystalline Si film 11 Emitter region 201,403 Si ₃ N ₄ film 400 MOS transistor 401 Polycide gate electrode 402 LDD region of MOS transistor

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI Technical indication H01L 21/8249 27/06 29/40 7376-4M

Claims (4)

[Claims] 1. A step of: (a) forming a first silicon oxide film on a first-conductivity-type single-crystal semiconductor substrate; and (b) a second-conductivity-type polycrystal on the first silicon oxide film. A step of forming a silicon film, (c) a step of forming a metal silicide film on the polycrystalline silicon film, (d) a step of forming a second silicon oxide film on the metal silicide film, (e) ) The second silicon oxide film, the metal silicide film in a region where a base is to be formed by photolithography etching,
A step of removing the polycrystalline silicon film; (f) a step of forming the metal silicide film and a third silicon oxide film on a sidewall of the polycrystalline silicon film by thermal oxidation; (g) isotropic etching Removing the third silicon oxide film on the side wall of the polycrystalline silicon film and the first silicon oxide film on the bottom of the opening by: (h) forming a second conductivity type base region by selective epitaxial growth A method of manufacturing a bipolar transistor, which comprises: 2. The bipolar transistor and the MOS transistor are formed at the same time, and the first silicon oxide film is the gate oxide film of the MOS transistor, the second conductivity type polycrystalline silicon film, the metal silicide film and the second oxide film. 2. The method of manufacturing a bipolar transistor according to claim 1, wherein the polycide gate electrode of the MOS transistor made of a silicon film is formed. 3. A step of (a) forming a silicon nitride film on a first conductivity type single crystal semiconductor substrate, and (b) a step of forming a second conductivity type polycrystalline silicon film on the silicon nitride film. (C) a step of forming a metal silicide film on the polycrystalline silicon film, (d) a step of forming a second silicon oxide film on the metal silicide film, and (e) a base by photolithographic etching. The second silicon oxide film in the planned formation region, the metal silicide film,
Removing the polycrystalline silicon film, (f) forming the metal silicide film and a third silicon oxide film on a sidewall of the polycrystalline silicon film by thermal oxidation, and (g) isotropic etching By removing the third silicon oxide film on the side wall of the polycrystalline silicon film by: (h) removing the silicon nitride film in the region where the base is to be formed; (i) by selective epitaxial growth And a step of forming a base region, the method of manufacturing a bipolar transistor. 4. (a) a step of forming a first silicon oxide film on a first-conductivity-type single-crystal semiconductor substrate; and (b) a second-conductivity-type polycrystal on the first silicon oxide film. A step of forming a silicon film, (c) a step of forming a fourth silicon oxide film having a width wider than both sides of a base formation planned region on the polycrystalline silicon film, and (d) a step of forming a metal silicide film (E) a step of forming a second silicon oxide film on the metal silicide film, and (f) the second silicon oxide film in the region where a base is to be formed by photolithographic etching, the metal silicide film,
Removing the fourth silicon oxide film and the polycrystalline silicon film; and (g) forming a third silicon oxide film on the side wall of the metal silicide film and the polycrystalline silicon film by thermal oxidation. (H) a step of removing the third silicon oxide film on the side wall of the polycrystalline silicon film and the first silicon oxide film on the bottom of the opening by isotropic etching, and (i) a second conductivity type by selective epitaxial growth. And a step of forming a base region of the bipolar transistor.