JPH0778956A - Fabrication of solid state image sensing element - Google Patents
Fabrication of solid state image sensing elementInfo
- Publication number
- JPH0778956A JPH0778956A JP5172512A JP17251293A JPH0778956A JP H0778956 A JPH0778956 A JP H0778956A JP 5172512 A JP5172512 A JP 5172512A JP 17251293 A JP17251293 A JP 17251293A JP H0778956 A JPH0778956 A JP H0778956A
- Authority
- JP
- Japan
- Prior art keywords
- peripheral circuit
- film
- gate electrode
- transistor
- forming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本願の発明は、周辺回路用トラン
ジスタがＬＤＤ構造である増幅型の固体撮像素子の製造
方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing an amplification type solid-state image pickup device in which a peripheral circuit transistor has an LDD structure.
【０００２】[0002]
【従来の技術】固体撮像素子が微細化されてくると、周
辺回路部におけるトランジスタの短チャネル効果を抑制
するために、このトランジスタをＬＤＤ構造にする必要
がある。図５は、この様な構造を有する増幅型の固体撮
像素子を製造するために従来から考えられていた方法を
示している。この方法では、図５（ａ）に示す様に、Ｓ
ｉ基板１１のイメージ部１２と周辺回路部１３との境界
部等に素子分離用のＳｉＯ2 膜１４を形成し、更に素子
活性領域の表面にゲート絶縁膜としてのＳｉＯ2膜１５
を形成する。2. Description of the Related Art As a solid-state image pickup device is miniaturized, it is necessary to make this transistor an LDD structure in order to suppress the short channel effect of the transistor in the peripheral circuit portion. FIG. 5 shows a conventionally conceived method for manufacturing an amplification type solid-state imaging device having such a structure. In this method, as shown in FIG.
An SiO 2 film 14 for element isolation is formed at the boundary between the image section 12 and the peripheral circuit section 13 of the i-substrate 11, and the SiO 2 film 15 as a gate insulating film is formed on the surface of the element active region.
To form.
【０００３】次に、図５（ｂ）に示す様に、多結晶Ｓｉ
膜１６を全面に堆積させ、図５（ｃ）に示す様に、この
多結晶Ｓｉ膜１６をパターニングして、周辺回路部１３
でゲート電極を形成すると同時に、イメージ部１２の全
面に多結晶Ｓｉ膜１６を残す。そして、多結晶Ｓｉ膜１
６及びＳｉＯ2 膜１４をマスクにした不純物のイオン注
入を行って、相対的に低濃度の不純物層１７を周辺回路
部１３に形成する。その後、図５（ｄ）に示す様に、Ｓ
ｉＯ2 膜２１を全面に堆積させる。Next, as shown in FIG. 5B, polycrystalline Si
The film 16 is deposited on the entire surface, and as shown in FIG. 5C, the polycrystalline Si film 16 is patterned to form the peripheral circuit portion 13.
At the same time as forming the gate electrode, the polycrystalline Si film 16 is left on the entire surface of the image portion 12. Then, the polycrystalline Si film 1
6 and the SiO 2 film 14 are used as a mask to perform ion implantation of impurities to form an impurity layer 17 having a relatively low concentration in the peripheral circuit portion 13. Then, as shown in FIG.
An iO 2 film 21 is deposited on the entire surface.
【０００４】次に、ＳｉＯ2 膜２１の全面をエッチバッ
クして、図５（ｅ）に示す様に、ＳｉＯ2 膜２１から成
る側壁を周辺回路部１３のゲート電極等に形成する。こ
の時、イメージ部１２の多結晶Ｓｉ膜１６が、エッチバ
ックに対するＳｉ基板１１の保護膜になっている。そし
て、多結晶Ｓｉ膜１６及びＳｉＯ2 膜２１、１４をマス
クにした不純物のイオン注入を行って、相対的に高濃度
の不純物層２２を周辺回路部１３に形成する。ここまで
で、周辺回路部１３におけるＬＤＤ構造のトランジスタ
２３が完成する。Next, the entire surface of the SiO 2 film 21 is etched back to form side walls made of the SiO 2 film 21 on the gate electrodes of the peripheral circuit portion 13 as shown in FIG. 5 (e). At this time, the polycrystalline Si film 16 of the image portion 12 serves as a protective film of the Si substrate 11 against etchback. Then, ion implantation of impurities is performed using the polycrystalline Si film 16 and the SiO 2 films 21 and 14 as a mask to form an impurity layer 22 having a relatively high concentration in the peripheral circuit section 13. By this, the LDD-structure transistor 23 in the peripheral circuit section 13 is completed.
【０００５】次に、図５（ｆ）に示す様に、多結晶Ｓｉ
膜１６よりも膜厚が薄い多結晶Ｓｉ膜２４とこの多結晶
Ｓｉ膜２４よりも膜厚が厚いＳｉＯ2 膜２５とを、イメ
ージ部１２でゲート電極のパターンに加工する。そし
て、イメージ部１２のみでＳｉＯ2 膜２５、１４及び多
結晶Ｓｉ膜２４をマスクにした不純物のイオン注入を行
って、不純物層２６をイメージ部１２に形成する。ここ
までで、イメージ部１２におけるセンサ用のトランジス
タ２７が完成する。Next, as shown in FIG. 5 (f), polycrystalline Si
The polycrystalline Si film 24 having a smaller film thickness than the film 16 and the SiO 2 film 25 having a larger film thickness than the polycrystalline Si film 24 are processed into a gate electrode pattern in the image portion 12. Then, the impurity layer 26 is formed in the image portion 12 by performing ion implantation of impurities using the SiO 2 films 25 and 14 and the polycrystalline Si film 24 as a mask only in the image portion 12. By this, the sensor transistor 27 in the image unit 12 is completed.
【０００６】なお、多結晶Ｓｉ膜２４の膜厚を多結晶Ｓ
ｉ膜１６の膜厚よりも薄くしているのは、増幅型の固体
撮像素子では光がゲート電極を透過する必要があるから
である。また、ＳｉＯ2 膜２５の膜厚を多結晶Ｓｉ膜２
４の膜厚よりも厚くしているのは、ＳｉＯ2 膜は多結晶
Ｓｉ膜よりも光が透過し易く、且つＳｉＯ2 膜２５をマ
スクにした不純物のイオン注入でゲート電極に対して自
己整合的に不純物層２６を形成するためである。The thickness of the polycrystalline Si film 24 is set to the polycrystalline S film.
The thickness of the i film 16 is smaller than that of the i film 16 because light needs to pass through the gate electrode in the amplification type solid-state imaging device. Further, the thickness of the SiO 2 film 25 is set to the polycrystalline Si film 2
The thickness of the SiO 2 film is larger than that of No. 4 because the SiO 2 film is more likely to transmit light than the polycrystalline Si film and is self-aligned with the gate electrode by ion implantation of impurities using the SiO 2 film 25 as a mask. This is to form the impurity layer 26.
【０００７】[0007]
【発明が解決しようとする課題】しかし、以上の説明か
らも明らかな様に、上述の方法では、周辺回路部１３に
おけるトランジスタ２３とイメージ部１２におけるトラ
ンジスタ２７とで製造工程が兼用されていないので、周
辺回路部１３におけるトランジスタ２３がＬＤＤ構造で
ある増幅型の固体撮像素子を少ない工程では製造するこ
とができなかった。However, as is clear from the above description, in the above method, the manufacturing process is not shared between the transistor 23 in the peripheral circuit section 13 and the transistor 27 in the image section 12. However, an amplification type solid-state imaging device in which the transistor 23 in the peripheral circuit section 13 has an LDD structure cannot be manufactured in a small number of steps.
【０００８】[0008]
【課題を解決するための手段】請求項１の固体撮像素子
の製造方法は、周辺回路用トランジスタ２３のゲート電
極１６を形成する工程と、前記ゲート電極１６をマスク
にして、前記周辺回路用トランジスタ２３の相対的に低
濃度の不純物層１７を形成する工程と、前記ゲート電極
１６を形成した後に、相対的に薄い導電膜２４と相対的
に厚い絶縁膜２５とを順次に全面に形成する工程と、前
記絶縁膜２５をセンサ用トランジスタ２７のゲート電極
２４のパターンに加工すると同時に、この絶縁膜２５で
前記周辺回路用トランジスタ２３のゲート電極１６の側
壁２５を形成する工程と、前記周辺回路用トランジスタ
２３のゲート電極１６と前記側壁２５とをマスクにし
て、この周辺回路用トランジスタ２３の相対的に高濃度
の不純物層２２を形成する工程と、前記導電膜２４で前
記センサ用トランジスタ２７のゲート電極２４を形成す
る工程とを有している。According to a first aspect of the present invention, there is provided a method of manufacturing a solid-state image pickup device, comprising the steps of forming a gate electrode 16 of a peripheral circuit transistor 23 and using the gate electrode 16 as a mask. 23, a step of forming a relatively low concentration impurity layer 17, and a step of sequentially forming a relatively thin conductive film 24 and a relatively thick insulating film 25 on the entire surface after forming the gate electrode 16. And processing the insulating film 25 into the pattern of the gate electrode 24 of the sensor transistor 27, and at the same time forming the side wall 25 of the gate electrode 16 of the peripheral circuit transistor 23 with this insulating film 25; Using the gate electrode 16 of the transistor 23 and the side wall 25 as a mask, the relatively high-concentration impurity layer 22 of the peripheral circuit transistor 23 is formed. A step of, and a step of forming a gate electrode 24 of the sensor transistor 27 in the conductive film 24.
【０００９】請求項２の固体撮像素子の製造方法は、請
求項１の固体撮像素子の製造方法において、前記側壁２
５が残存している前記周辺回路用トランジスタ２３を形
成する。A method of manufacturing a solid-state image sensor according to a second aspect is the same as the method of manufacturing a solid-state image sensor according to the first aspect.
The peripheral circuit transistor 23 in which 5 remains is formed.
【００１０】請求項３の固体撮像素子の製造方法は、請
求項１の固体撮像素子の製造方法において、前記相対的
に高濃度の不純物層２２を形成した後に前記側壁２５を
除去する工程と、前記側壁２５を除去した後に、前記導
電膜２４で前記センサ用トランジスタ２７のゲート電極
２４を形成すると同時に、前記周辺回路用トランジスタ
２３におけるこの導電膜２４を除去する工程とを有して
いる。A method of manufacturing a solid-state image sensor according to a third aspect is the method of manufacturing a solid-state image sensor according to the first aspect, wherein the side wall 25 is removed after the impurity layer 22 having a relatively high concentration is formed. After removing the side wall 25, the conductive film 24 forms the gate electrode 24 of the sensor transistor 27, and at the same time, the conductive film 24 of the peripheral circuit transistor 23 is removed.
【００１１】[0011]
【作用】請求項１の固体撮像素子の製造方法では、セン
サ用トランジスタ２７のゲート電極２４を相対的に薄い
導電膜２４で形成しているので、光がゲート電極２４を
透過する増幅型の固体撮像素子を製造することができ
る。しかも、相対的に厚くても光を透過させ易い絶縁膜
２５をもゲート電極２４のパターンに加工しているの
で、この絶縁膜２５をマスクにした不純物のイオン注入
等で、ゲート電極２４に対して自己整合的に不純物層２
６を形成することができる。In the method for manufacturing a solid-state image pickup device according to claim 1, since the gate electrode 24 of the sensor transistor 27 is formed of the relatively thin conductive film 24, an amplification type solid-state in which light passes through the gate electrode 24. An image sensor can be manufactured. Moreover, since the insulating film 25, which is relatively thick and easily transmits light, is also processed into the pattern of the gate electrode 24, the insulating film 25 is used as a mask for ion implantation of impurities or the like to the gate electrode 24. Self-aligned impurity layer 2
6 can be formed.
【００１２】また、周辺回路用トランジスタ２３には相
対的に低濃度の不純物層１７と相対的に高濃度の不純物
層２２とを形成しているので、この周辺回路用トランジ
スタ２３はＬＤＤ構造である。そして、センサ用トラン
ジスタ２７のゲート電極２４上の絶縁膜２５と周辺回路
用トランジスタ２３をＬＤＤ構造にするための側壁２５
である絶縁膜２５とを共用している。Further, since the relatively low concentration impurity layer 17 and the relatively high concentration impurity layer 22 are formed in the peripheral circuit transistor 23, the peripheral circuit transistor 23 has an LDD structure. . Then, the insulating film 25 on the gate electrode 24 of the sensor transistor 27 and the side wall 25 for forming the peripheral circuit transistor 23 in the LDD structure.
Is also used as the insulating film 25.
【００１３】請求項２の固体撮像素子の製造方法では、
周辺回路用トランジスタ２３をＬＤＤ構造にするための
側壁２５を除去していないので、除去のための工程が不
要である。In the method of manufacturing a solid-state image pickup device according to claim 2,
Since the side wall 25 for forming the peripheral circuit transistor 23 into the LDD structure is not removed, the removing process is unnecessary.
【００１４】請求項３の固体撮像素子の製造方法では、
周辺回路用トランジスタ２３をＬＤＤ構造にするための
側壁２５を除去した後に、周辺回路用トランジスタ２３
における導電膜２４を除去しているので、この導電膜２
４は周辺回路用トランジスタ２３のゲート電極１６の側
壁部からも除去される。しかも、周辺回路用トランジス
タ２３における導電膜２４はセンサ用トランジスタ２７
のゲート電極２４の形成と同時に除去しているので、製
造工程は増加しない。In the method for manufacturing a solid-state image pickup device according to claim 3,
After removing the side wall 25 for forming the peripheral circuit transistor 23 into the LDD structure, the peripheral circuit transistor 23 is removed.
Since the conductive film 24 in FIG.
4 is also removed from the side wall of the gate electrode 16 of the peripheral circuit transistor 23. In addition, the conductive film 24 in the peripheral circuit transistor 23 is formed by the sensor transistor 27.
Since the gate electrode 24 is removed at the same time that the gate electrode 24 is formed, the number of manufacturing steps does not increase.
【００１５】[0015]
【実施例】以下、本願の発明の第１及び第２実施例を、
図１〜４を参照しながら説明する。なお、図５に示した
例と対応する構成部分には、同一の符号を付してある。The first and second embodiments of the present invention will be described below.
This will be described with reference to FIGS. The components corresponding to those in the example shown in FIG. 5 are designated by the same reference numerals.
【００１６】図１、２が、第１実施例を示している。こ
の第１実施例でも、図１（ａ）に示す様に、ゲート絶縁
膜としてのＳｉＯ2 膜１５を形成するまでは、図５に示
した例と実質的に同様の工程を実行する。1 and 2 show a first embodiment. Also in this first embodiment, as shown in FIG. 1A, substantially the same steps as in the example shown in FIG. 5 are executed until the SiO 2 film 15 as the gate insulating film is formed.
【００１７】しかし、この第１実施例では、図１（ｂ）
に示す様に、その後、多結晶Ｓｉ膜１６で周辺回路部１
３におけるゲート電極を形成し、この多結晶Ｓｉ膜１６
を酸化して、その表面にＳｉＯ2 膜３１を形成する。そ
して、イメージ部１２をレジスト３２で覆い、多結晶Ｓ
ｉ膜１６、ＳｉＯ2 膜１４、３１及びレジスト３２をマ
スクにした不純物のイオン注入を行って、相対的に低濃
度の不純物層１７を周辺回路部１３に形成する。However, in this first embodiment, FIG.
After that, as shown in FIG.
3 to form the gate electrode, and the polycrystalline Si film 16
Is oxidized to form a SiO 2 film 31 on its surface. Then, the image portion 12 is covered with a resist 32, and the polycrystalline S
Ion implantation of impurities is performed using the i film 16, the SiO 2 films 14 and 31, and the resist 32 as a mask to form an impurity layer 17 having a relatively low concentration in the peripheral circuit portion 13.
【００１８】次に、レジスト３２を除去した後、図１
（ｃ）に示す様に、膜厚が３０ｎｍ程度の多結晶Ｓｉ膜
２４と膜厚が１５０ｎｍ程度のＳｉＯ2 膜２５とを順次
に全面に堆積させる。そして、図１（ｄ）に示す様に、
イメージ部１２におけるゲート電極のパターンに、Ｓｉ
Ｏ2 膜２５上でレジスト３３を加工する。Next, after removing the resist 32, FIG.
As shown in (c), a polycrystalline Si film 24 having a thickness of about 30 nm and a SiO 2 film 25 having a thickness of about 150 nm are sequentially deposited on the entire surface. Then, as shown in FIG.
In the pattern of the gate electrode in the image part 12, Si
The resist 33 is processed on the O 2 film 25.
【００１９】次に、レジスト３３をマスクにしたＲＩＥ
でＳｉＯ2 膜２５と多結晶Ｓｉ膜２４とを連続的にエッ
チバックして、図２（ａ）に示す様に、多結晶Ｓｉ膜２
４から成るゲート電極をイメージ部１２に形成すると同
時に、ＳｉＯ2 膜２５及び多結晶Ｓｉ膜２４から成る側
壁を周辺回路部１３のゲート電極に形成する。Next, RIE using the resist 33 as a mask
Then, the SiO 2 film 25 and the polycrystalline Si film 24 are continuously etched back by the etching, and the polycrystalline Si film 2 is removed as shown in FIG.
At the same time as forming the gate electrode of 4 in the image portion 12, side walls of the SiO 2 film 25 and the polycrystalline Si film 24 are formed in the gate electrode of the peripheral circuit portion 13.
【００２０】次に、レジスト３３を除去した後、図２
（ｂ）に示す様に、別のレジスト３４でイメージ部１２
の全体を覆い、多結晶Ｓｉ膜１６、２４、ＳｉＯ2 膜２
５、３１、１４及びレジスト３４をマスクにした不純物
のイオン注入を行って、相対的に高濃度の不純物層２２
を周辺回路部１３に形成する。ここまでで、周辺回路部
１３におけるＬＤＤ構造のトランジスタ２３が完成す
る。Next, after removing the resist 33, FIG.
As shown in (b), the image portion 12 is formed by another resist 34.
The entire surface of the polycrystalline Si films 16 and 24 and the SiO 2 film 2
Impurity ion implantation is performed using the masks 5, 31, 14 and the resist 34 as a mask to relatively increase the concentration of the impurity layer 22.
Are formed in the peripheral circuit section 13. By this, the LDD-structure transistor 23 in the peripheral circuit section 13 is completed.
【００２１】次に、レジスト３４を除去した後、別のレ
ジスト（図示せず）で今度は周辺回路部１３の全体を覆
い、ＳｉＯ2 膜２５、１４、多結晶Ｓｉ膜２４及びレジ
ストをマスクにした不純物のイオン注入を行って、図２
（ｃ）に示す様に、不純物層２６をイメージ部１２に形
成する。ここまでで、イメージ部１２におけるセンサ用
のトランジスタ２７が完成する。なお、不純物層２６は
不純物層２２よりも先に形成してもよい。その後、全面
に層間絶縁膜３５を堆積させ、更に従来公知の工程を実
行して、増幅型の固体撮像素子を完成させる。Next, after removing the resist 34, another resist (not shown) covers the entire peripheral circuit portion 13 this time, and the SiO 2 films 25 and 14, the polycrystalline Si film 24 and the resist are used as masks. The impurities are ion-implanted and the result is shown in FIG.
As shown in (c), the impurity layer 26 is formed in the image portion 12. By this, the sensor transistor 27 in the image unit 12 is completed. Note that the impurity layer 26 may be formed before the impurity layer 22. After that, an interlayer insulating film 35 is deposited on the entire surface, and a conventionally known process is further performed to complete the amplification type solid-state imaging device.
【００２２】図３、４が、第２実施例を示している。こ
の第２実施例でも、図３（ａ）〜（ｄ）に示す様に、イ
メージ部１２におけるゲート電極のパターンに、ＳｉＯ
2 膜２５上でレジスト３３を加工するまでは、図１、２
に示した第１実施例と実質的に同様の工程を実行する。3 and 4 show a second embodiment. Also in this second embodiment, as shown in FIGS. 3A to 3D, the pattern of the gate electrode in the image portion 12 is formed of SiO 2.
2 until the resist 33 is processed on the film 25, as shown in FIGS.
Substantially the same steps as those of the first embodiment shown in FIG.
【００２３】しかし、この第２実施例では、レジスト３
３をマスクにしたＲＩＥでＳｉＯ2膜２５をエッチバッ
クして、図３（ｅ）に示す様に、イメージ部１２でＳｉ
Ｏ2膜２５をゲート電極のパターンに加工すると同時
に、ＳｉＯ2 膜２５から成る側壁を周辺回路部１３のゲ
ート電極に形成するが、多結晶Ｓｉ膜２４はエッチバッ
クしない。However, in this second embodiment, the resist 3
The SiO 2 film 25 is etched back by RIE using 3 as a mask, and as shown in FIG.
At the same time that the O 2 film 25 is processed into the pattern of the gate electrode, the side wall of the SiO 2 film 25 is formed on the gate electrode of the peripheral circuit portion 13, but the polycrystalline Si film 24 is not etched back.
【００２４】次に、レジスト３３を除去した後、図４
（ａ）に示す様に、別のレジスト３４でイメージ部１２
の全体を覆い、多結晶Ｓｉ膜１６、ＳｉＯ2 膜２５、３
１、１４及びレジスト３４をマスクにした不純物のイオ
ン注入を行って、相対的に高濃度の不純物層２２を周辺
回路部１３に形成する。ここまでで、周辺回路部１３に
おけるＬＤＤ構造のトランジスタ２３が完成する。Next, after removing the resist 33, FIG.
As shown in (a), the image portion 12 is formed by another resist 34.
The entire surface of the polycrystalline Si film 16, SiO 2 film 25, 3
Ion implantation of impurities is performed using the masks 1 and 14 and the resist 34 as a mask to form the impurity layer 22 having a relatively high concentration in the peripheral circuit portion 13. By this, the LDD-structure transistor 23 in the peripheral circuit section 13 is completed.
【００２５】次に、再びレジスト３４をマスクにすると
共に多結晶Ｓｉ膜２４をストッパにしたエッチングで、
図４（ｂ）に示す様に、周辺回路部１３のゲート電極の
側壁として残っていたＳｉＯ2 膜２５を除去する。そし
て、レジスト３４を除去した後、ＳｉＯ2 膜２５をマス
クにすると共にＳｉＯ2 膜３１、１４、１５をストッパ
にして多結晶Ｓｉ膜２４をエッチングして、図４（ｃ）
に示す様に、多結晶Ｓｉ膜２４から成るゲート電極をイ
メージ部１２に形成すると同時に、周辺回路部１３から
多結晶Ｓｉ膜２４を除去する。Next, etching is performed again using the resist 34 as a mask and the polycrystalline Si film 24 as a stopper.
As shown in FIG. 4B, the SiO 2 film 25 left on the side wall of the gate electrode of the peripheral circuit portion 13 is removed. Then, after removing the resist 34, the polycrystalline Si film 24 is etched by using the SiO 2 film 25 as a mask and the SiO 2 films 31, 14, and 15 as stoppers.
As shown in, the gate electrode made of the polycrystalline Si film 24 is formed in the image portion 12, and at the same time, the polycrystalline Si film 24 is removed from the peripheral circuit portion 13.
【００２６】その後、別のレジスト（図示せず）で今度
は周辺回路部１３の全体を覆い、ＳｉＯ2 膜２５、１４
及び多結晶Ｓｉ膜２４をマスクにした不純物のイオン注
入を行って、不純物層２６をイメージ部１２に形成す
る。ここまでで、イメージ部１２におけるセンサ用のト
ランジスタ２７が完成する。なお、不純物層２６は不純
物層２２よりも先に形成してもよい。そして、図４
（ｄ）に示す様に、全面に層間絶縁膜３５を堆積させ、
更に従来公知の工程を実行して、増幅型の固体撮像素子
を完成させる。After that, another resist (not shown) covers the entire peripheral circuit portion 13 this time, and the SiO 2 films 25 and 14 are formed.
Further, ion implantation of impurities is performed using the polycrystalline Si film 24 as a mask to form the impurity layer 26 in the image portion 12. By this, the sensor transistor 27 in the image unit 12 is completed. Note that the impurity layer 26 may be formed before the impurity layer 22. And FIG.
As shown in (d), an interlayer insulating film 35 is deposited on the entire surface,
Further, a conventionally known process is executed to complete the amplification type solid-state imaging device.
【００２７】なお、以上の第２実施例では、ＳｉＯ2 膜
２５から成る側壁を周辺回路部１３のゲート電極に形成
する前に不純物層１７を形成しているが、ＳｉＯ2 膜２
５から成る側壁を周辺回路部１３のゲート電極から除去
した後に不純物層１７を形成することもできる。この様
にすると、熱処理を受ける時間が少なく、ゲート電極下
への不純物層１７の拡散が少なくて短チャネル効果が少
ないこと等のために、高性能なトランジスタ２３を得る
ことができる。[0027] In the above second embodiment, although formation of the impurity layer 17 before forming the side wall of SiO 2 film 25 to the gate electrode of the peripheral circuit portion 13, the SiO 2 film 2
It is also possible to form the impurity layer 17 after removing the side wall made of 5 from the gate electrode of the peripheral circuit portion 13. By doing so, a high-performance transistor 23 can be obtained because the heat treatment time is short, the diffusion of the impurity layer 17 below the gate electrode is small, and the short channel effect is small.
【００２８】[0028]
【発明の効果】請求項１の固体撮像素子の製造方法で
は、センサ用トランジスタのゲート電極上の絶縁膜と周
辺回路用トランジスタをＬＤＤ構造にするための側壁で
ある絶縁膜とを共用しているので、周辺回路用トランジ
スタがＬＤＤ構造である増幅型の固体撮像素子を少ない
工程で製造することができる。According to the method of manufacturing a solid-state image pickup device of the first aspect, the insulating film on the gate electrode of the sensor transistor and the insulating film which is the side wall for forming the peripheral circuit transistor in the LDD structure are shared. Therefore, the amplification type solid-state imaging device having the LDD structure as the peripheral circuit transistor can be manufactured in a small number of steps.
【００２９】請求項２の固体撮像素子の製造方法では、
周辺回路用トランジスタをＬＤＤ構造にするための側壁
を除去しておらず除去のための工程が不要であるので、
周辺回路用トランジスタがＬＤＤ構造である増幅型の固
体撮像素子を更に少ない工程で製造することができる。In the method of manufacturing a solid-state image pickup device according to claim 2,
Since the side wall for forming the LDD structure for the peripheral circuit transistor is not removed and the step for removal is unnecessary,
It is possible to manufacture an amplification type solid-state imaging device in which the peripheral circuit transistor has the LDD structure in a smaller number of steps.
【００３０】請求項３の固体撮像素子の製造方法では、
製造工程を増加させることなく、周辺回路用トランジス
タのゲート電極の側壁部から導電膜を除去しているの
で、側壁部へのホットキャリアの注入による相互コンダ
クタンスの経時的劣化が少なく、信頼性の高い固体撮像
素子を製造することができる。In the method for manufacturing a solid-state image sensor according to claim 3,
Since the conductive film is removed from the side wall of the gate electrode of the peripheral circuit transistor without increasing the number of manufacturing steps, the mutual conductance is not deteriorated over time due to the injection of hot carriers into the side wall, and the reliability is high. A solid-state image sensor can be manufactured.
【図１】本願の発明の第１実施例の前半の工程を順次に
示す側断面図である。FIG. 1 is a side sectional view sequentially showing a first half process of a first embodiment of the present invention.
【図２】第１実施例の後半の工程を順次に示す側断面図
である。FIG. 2 is a side sectional view sequentially showing the latter half of the steps of the first embodiment.
【図３】第２実施例の前半の工程を順次に示す側断面図
である。FIG. 3 is a side sectional view sequentially showing a first half process of the second embodiment.
【図４】第２実施例の後半の工程を順次に示す側断面図
である。FIG. 4 is a side sectional view sequentially showing the latter half of the steps of the second embodiment.
【図５】従来から考えられていた方法の工程を順次に示
す側断面図である。FIG. 5 is a side cross-sectional view sequentially showing the steps of a conventionally conceived method.
１２ イメージ部 １３ 周辺回路部 １６ 多結晶Ｓｉ膜 １７ 不純物層 ２２ 不純物層 ２３ トランジスタ ２４ 多結晶Ｓｉ膜 ２５ ＳｉＯ2 膜 ２７ トランジスタ12 Image Part 13 Peripheral Circuit Part 16 Polycrystalline Si Film 17 Impurity Layer 22 Impurity Layer 23 Transistor 24 Polycrystalline Si Film 25 SiO 2 Film 27 Transistor
Claims (3)
形成する工程と、 前記ゲート電極をマスクにして、前記周辺回路用トラン
ジスタの相対的に低濃度の不純物層を形成する工程と、 前記ゲート電極を形成した後に、相対的に薄い導電膜と
相対的に厚い絶縁膜とを順次に全面に形成する工程と、 前記絶縁膜をセンサ用トランジスタのゲート電極のパタ
ーンに加工すると同時に、この絶縁膜で前記周辺回路用
トランジスタのゲート電極の側壁を形成する工程と、 前記周辺回路用トランジスタのゲート電極と前記側壁と
をマスクにして、この周辺回路用トランジスタの相対的
に高濃度の不純物層を形成する工程と、 前記導電膜で前記センサ用トランジスタのゲート電極を
形成する工程とを有する固体撮像素子の製造方法。1. A step of forming a gate electrode of a peripheral circuit transistor; a step of forming a relatively low concentration impurity layer of the peripheral circuit transistor using the gate electrode as a mask; After the formation, a step of sequentially forming a relatively thin conductive film and a relatively thick insulating film on the entire surface, and processing the insulating film into a pattern of a gate electrode of a sensor transistor, and at the same time using the insulating film Forming a side wall of a gate electrode of a peripheral circuit transistor, and forming a relatively high concentration impurity layer of the peripheral circuit transistor by using the gate electrode of the peripheral circuit transistor and the side wall as a mask And a step of forming a gate electrode of the sensor transistor with the conductive film.
トランジスタを形成する請求項１記載の固体撮像素子の
製造方法。2. The method for manufacturing a solid-state image pickup device according to claim 1, wherein the peripheral circuit transistor in which the side wall remains is formed.
た後に前記側壁を除去する工程と、 前記側壁を除去した後に、前記導電膜で前記センサ用ト
ランジスタのゲート電極を形成すると同時に、前記周辺
回路用トランジスタにおけるこの導電膜を除去する工程
とを有する請求項１記載の固体撮像素子の製造方法。3. The step of removing the side wall after forming the relatively high-concentration impurity layer; and the step of forming the gate electrode of the sensor transistor with the conductive film after removing the side wall, and simultaneously. 2. The method for manufacturing a solid-state image sensor according to claim 1, further comprising the step of removing the conductive film in the peripheral circuit transistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17251293A JP3239911B2 (en) | 1993-06-18 | 1993-06-18 | Method for manufacturing solid-state imaging device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17251293A JP3239911B2 (en) | 1993-06-18 | 1993-06-18 | Method for manufacturing solid-state imaging device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0778956A true JPH0778956A (en) | 1995-03-20 |
| JP3239911B2 JP3239911B2 (en) | 2001-12-17 |
Family
ID=15943336
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17251293A Expired - Fee Related JP3239911B2 (en) | 1993-06-18 | 1993-06-18 | Method for manufacturing solid-state imaging device |
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| Country | Link |
|---|---|
| JP (1) | JP3239911B2 (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100748316B1 (en) * | 2001-06-28 | 2007-08-09 | 매그나칩 반도체 유한회사 | Fabricating method of image sensor |
| JP2008041726A (en) * | 2006-08-02 | 2008-02-21 | Canon Inc | Photoelectric conversion device and manufacturing method thereof, and imaging system |
| JP2008060357A (en) * | 2006-08-31 | 2008-03-13 | Canon Inc | Photoelectric conversion device and image pickup system |
| JP2012146989A (en) * | 2012-02-20 | 2012-08-02 | Canon Inc | Photoelectric conversion device and imaging system |
| JP2012160750A (en) * | 2012-04-02 | 2012-08-23 | Canon Inc | Photoelectric conversion device |
-
1993
- 1993-06-18 JP JP17251293A patent/JP3239911B2/en not_active Expired - Fee Related
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100748316B1 (en) * | 2001-06-28 | 2007-08-09 | 매그나칩 반도체 유한회사 | Fabricating method of image sensor |
| JP2008041726A (en) * | 2006-08-02 | 2008-02-21 | Canon Inc | Photoelectric conversion device and manufacturing method thereof, and imaging system |
| US8411187B2 (en) | 2006-08-02 | 2013-04-02 | Canon Kabushiki Kaisha | Photoelectric conversion device, method for producing photoelectric conversion device, and image pickup system |
| US9825077B2 (en) | 2006-08-02 | 2017-11-21 | Canon Kabushiki Kaisha | Photoelectric conversion device, method for producing photoelectric conversion device, and image pickup system |
| JP2008060357A (en) * | 2006-08-31 | 2008-03-13 | Canon Inc | Photoelectric conversion device and image pickup system |
| JP2012146989A (en) * | 2012-02-20 | 2012-08-02 | Canon Inc | Photoelectric conversion device and imaging system |
| JP2012160750A (en) * | 2012-04-02 | 2012-08-23 | Canon Inc | Photoelectric conversion device |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3239911B2 (en) | 2001-12-17 |
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