JPH0771021B2 - Synchronous circuit - Google Patents

Synchronous circuit

Info

Publication number
JPH0771021B2
JPH0771021B2 JP1334399A JP33439989A JPH0771021B2 JP H0771021 B2 JPH0771021 B2 JP H0771021B2 JP 1334399 A JP1334399 A JP 1334399A JP 33439989 A JP33439989 A JP 33439989A JP H0771021 B2 JPH0771021 B2 JP H0771021B2
Authority
JP
Japan
Prior art keywords
circuit
signal
correlation
spread
maximum
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP1334399A
Other languages
Japanese (ja)
Other versions
JPH03192837A (en
Inventor
武男 山本
浩司 常富
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP1334399A priority Critical patent/JPH0771021B2/en
Publication of JPH03192837A publication Critical patent/JPH03192837A/en
Publication of JPH0771021B2 publication Critical patent/JPH0771021B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、同期回路に関し、特に無線通信分野において
スペクトラム拡散変調方式を用いた受信装置の同期回路
に関する。
TECHNICAL FIELD The present invention relates to a synchronizing circuit, and more particularly to a synchronizing circuit for a receiver using a spread spectrum modulation method in the field of wireless communication.

〔従来の技術〕[Conventional technology]

スペクトラム拡散受信装置の同期回路の従来方式のブロ
ック図を第6図に示す。
FIG. 6 shows a block diagram of a conventional system of a synchronizing circuit of a spread spectrum receiver.

この同期回路は、スペクトラム拡散信号の入力端子1、
局部拡散信号106と入力信号101との相関値を検出する相
関検出器1、局部拡散信号106を発生する拡散信号発生
器5、拡散信号発生器5へクロック105を供給するクロ
ック発生器6、相関検出器2の出力102を受けクロック
発生器6のクロックの位相を位相制御信号104によって
制御しながら局部拡散信号106の1周期における位相値
の最大値を検出する最大値検出回路4、最大値検出回路
4からの最大値検出終了信号103を受けその最大相関値
における相関検出器2の出力102の同期状態を判定する
同期判定回路3を有する。以下、この回路の動作を説明
する。
This synchronizing circuit has a spread spectrum signal input terminal 1,
Correlation detector 1 for detecting a correlation value between local spread signal 106 and input signal 101, spread signal generator 5 for generating local spread signal 106, clock generator 6 for supplying clock 105 to spread signal generator 5, correlation Maximum value detection circuit 4, which receives the output 102 of the detector 2 and detects the maximum value of the phase value in one cycle of the local spread signal 106 while controlling the phase of the clock of the clock generator 6 by the phase control signal 104, maximum value detection The synchronization determination circuit 3 receives the maximum value detection end signal 103 from the circuit 4 and determines the synchronization state of the output 102 of the correlation detector 2 at the maximum correlation value. The operation of this circuit will be described below.

入力信号101と局部拡散信号106との間の位相差ψに対す
る相関検出器2の出力102を第2図に示す。Mは出力の
くり返し周期である。スペクトラム拡散受信装置の同期
回路は、入力信号と局部拡散信号との相関値が最大とな
る位相ψになるように局部拡散信号の位相を制御する
ものである。
The output 102 of the correlation detector 2 with respect to the phase difference ψ between the input signal 101 and the locally spread signal 106 is shown in FIG. M is the repeating cycle of the output. The synchronization circuit of the spread spectrum receiver controls the phase of the local spread signal so that the phase value ψ 0 that maximizes the correlation value between the input signal and the local spread signal.

最大値検出回路4は、位相制御信号104によりクロック
発生器6の位相を一定時間ごとにシフトさせる。このク
ロック発生器6の出力するクロック105によって駆動さ
れる拡散信号発生器5の出力もクロックの位相シフトに
合わせて一定時間ごとにその位相がずれる。最大値検出
回路は、位相シフトに合わせて一定時間ごとにその位相
がずれる。最大値検出回路4は、位相シフトごとに相関
検出器2の出力102を観測し、この操作を拡散信号の1
周期である第2図のMの区間だけ行うことによりこの区
間における最大相関値のときの位相ψmaxを検出する。
この様子を第3図に示す。
The maximum value detection circuit 4 shifts the phase of the clock generator 6 by the phase control signal 104 at regular time intervals. The output of the spread signal generator 5 driven by the clock 105 output from the clock generator 6 also shifts its phase at regular time intervals according to the phase shift of the clock. The maximum value detection circuit shifts its phase at regular time intervals according to the phase shift. The maximum value detection circuit 4 observes the output 102 of the correlation detector 2 for each phase shift, and performs this operation on the spread signal 1
The phase ψmax at the maximum correlation value in this section is detected by performing only the section M of FIG. 2 which is a cycle.
This is shown in FIG.

第3図(a)は相関検出器2の出力波形、(b)は位相
制御信号104の波形である。最大検出が終了すると拡散
信号発生器5の位相をψmaxにした後、同期判定回路3
に最大値検出終了信号103を出力する。同期判定回路3
では、この終了信号103を受けてψmaxのときの同期状態
を判定する。判定の結果非同期状態と判定された場合は
再び最大値検出を行う。同期状態の場合は、本同期回路
の動作は終了する。以上の操作により同期回路の動作が
終了するとスペクトラム拡散受信装置における同期状態
すなわち第2図のψの状態が得られる。
3A shows the output waveform of the correlation detector 2, and FIG. 3B shows the waveform of the phase control signal 104. When the maximum detection is completed, the phase of the spread signal generator 5 is set to ψmax, and then the synchronization determination circuit 3
The maximum value detection end signal 103 is output to. Synchronization determination circuit 3
Then, upon receipt of this end signal 103, the synchronization state when ψmax is determined. If the result of determination is that it is in an asynchronous state, maximum value detection is performed again. In the case of the synchronized state, the operation of this synchronizing circuit ends. When the operation of the synchronizing circuit is completed by the above operation, the synchronized state in the spread spectrum receiver, that is, the state of ψ 0 in FIG. 2 is obtained.

〔発明が解決しようとする課題〕[Problems to be Solved by the Invention]

上述した従来の同期回路では、第4図に示すように最大
値検出を行っている途中で、あるψから入力信号が入
ってきた場合、ψmaxは同図のψmaxの位相となってしま
う。相関検出器2の出力102のS/Nが低い場合にはこのψ
maxでは十分なS/Nが得られず同期判定回路3で非同期と
判定され、再び最大値検出を行うことにより第2図のψ
が得られるが、S/Nが高い場合には同期判定回路3は
これを同期状態と判定してしなうため、同期回路は誤っ
た位相で動作を終了してしまうという欠点がある。
In the conventional synchronous circuit described above, when an input signal comes in from a certain ψ 1 during the maximum value detection as shown in FIG. 4, ψ max becomes the phase of ψ max in the same figure. If the S / N of the output 102 of the correlation detector 2 is low, this ψ
In max, sufficient S / N is not obtained and it is judged as asynchronous by the synchronous judgment circuit 3, and the maximum value is detected again, so that ψ in FIG.
Although 0 is obtained, if the S / N is high, the synchronization determination circuit 3 does not determine this as a synchronization state, so that there is a disadvantage that the synchronization circuit ends the operation in an incorrect phase.

本発明の目的は上述した欠点を解決し、最大値検出の途
中から信号が入ってきた場合でも常に正しい同期状態が
得られる同期回路を提供することにある。
An object of the present invention is to solve the above-mentioned drawbacks and to provide a synchronizing circuit which can always obtain a correct synchronizing state even when a signal comes in during the maximum value detection.

〔課題を解決するための手段〕[Means for Solving the Problems]

本発明の回路は、スペクトラム拡散信号を受け局部拡散
信号との相関値を検出する相関検出器と、局部拡散信号
を発生する拡散信号発生器と、前記拡散信号発生器へク
ロックを供給するクロック発生器と、前記相関検出器の
出力を受け前記クロック発生器の位相を制御することに
よって拡散信号の1周期における最大相関値を検出する
最大値検出回路と、前記相関検出器からの信号を受け最
大相関値における周期状態を判定する周期判定回路とを
有するスペクトラム拡散受信装置の同期回路において、
同期判定回路からの同期判定信号を受け前記最大値検出
回路に再び最大相関値の検出を1回だけ行なわしめる同
期制御回路を備えて構成される。
The circuit of the present invention includes a correlation detector that receives a spread spectrum signal and detects a correlation value with a local spread signal, a spread signal generator that generates a local spread signal, and a clock generator that supplies a clock to the spread signal generator. A maximum value detection circuit for detecting the maximum correlation value in one cycle of the spread signal by controlling the phase of the clock generator by receiving the output of the correlation detector, and the maximum value receiving circuit for receiving the signal from the correlation detector. In a synchronization circuit of a spread spectrum receiving device having a period determination circuit for determining the period state in the correlation value,
The maximum value detection circuit receives a synchronization determination signal from the synchronization determination circuit, and is again provided with a synchronization control circuit for detecting the maximum correlation value only once.

〔実施例〕〔Example〕

次に本発明の実施例について図面を参照して説明する。 Next, embodiments of the present invention will be described with reference to the drawings.

第1図は本発明の一実施例の構成を示すブロック図であ
る。第1図の実施例は、第6図の従来回路に加えて、同
期判定回路3からの同期判定信号107を受けて最大値検
出回路4を動作させる同期制御回路7を有する。次にそ
の動作を説明する。
FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. The embodiment shown in FIG. 1 has, in addition to the conventional circuit shown in FIG. 6, a synchronization control circuit 7 for receiving the synchronization determination signal 107 from the synchronization determination circuit 3 and operating the maximum value detection circuit 4. Next, the operation will be described.

第5図は相関検出器2の出力102を示したものである。
区間M1は最大値検出を行なっている部分であり、途中の
ψから入力信号が入ってきている。この場合の最大相
関値のときの位相はψmax1となり、次の区間Dではこの
位相ψmax1で同期判定を行う。同期判定の結果、同期判
定回路3が同期状態と判定した場合、同期判定信号107
が出力され、同期制御回路は再び最大値検出を行うた
め、重力5に指令信号108を出力して最大値検出回路を
1回だけ動作させる。第5図の区間M2がこの最大値検出
を行っている部分であり、入力信号が始めから入ってい
るため、ここで得られる最大相関値の位相ψmax2は第2
図のψに相当するため正しい同期状態を得ることがで
きる。
FIG. 5 shows the output 102 of the correlation detector 2.
The section M 1 is a part in which the maximum value is detected, and the input signal comes in from ψ 1 on the way. In this case, the phase at the maximum correlation value is ψmax 1 , and in the next section D, the synchronization determination is performed with this phase ψmax 1 . As a result of the synchronization determination, when the synchronization determination circuit 3 determines the synchronization state, the synchronization determination signal 107
Is output and the synchronous control circuit again detects the maximum value, the command signal 108 is output to the gravity 5 to operate the maximum value detection circuit only once. Since the section M 2 in FIG. 5 is the part where the maximum value is detected and the input signal is input from the beginning, the phase ψ max 2 of the maximum correlation value obtained here is the second value.
Since it corresponds to ψ 0 in the figure, a correct synchronization state can be obtained.

〔発明の効果〕〔The invention's effect〕

以上説明したように本発明の同期回路は、同期判定後に
再び最大値検出を行う制御回路を有しているため、正し
い同期態が得られない最大値検出の途中からの信号入力
といった場合でも、常に正しい同期状態を得ることがで
きるという効果がある。
As described above, the synchronization circuit of the present invention has the control circuit that performs the maximum value detection again after the synchronization determination, so that even in the case of signal input during the maximum value detection in which the correct synchronization state cannot be obtained, This has the effect of always obtaining the correct synchronization state.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の一実施例の構成を示すブロック図、第
2図は入力信号と局部拡散信号関の位相差に対する相関
検出器2の出力波形図、第3図は従来の同期回路の動作
の説明図、第4図は従来の同期回路で正しく動作しない
場合の説明図、第5図は第1図の同期回路の動作の説明
図、第6図は従来の同期回路の構成を示すブロック図で
ある。 1……入力端子、2……相関検出器、3……同期判定回
路、4……最大値検出回路、5……拡散信号発生器、6
……クロック発生器、7……同期制御回路。
1 is a block diagram showing the configuration of an embodiment of the present invention, FIG. 2 is an output waveform diagram of a correlation detector 2 with respect to a phase difference between an input signal and a locally spread signal, and FIG. 3 is a conventional synchronizing circuit. FIG. 4 is an explanatory diagram of the operation, FIG. 4 is an explanatory diagram when the conventional synchronous circuit does not operate correctly, FIG. 5 is an explanatory diagram of the operation of the synchronous circuit of FIG. 1, and FIG. It is a block diagram. 1 ... Input terminal, 2 ... Correlation detector, 3 ... Sync decision circuit, 4 ... Maximum value detection circuit, 5 ... Spread signal generator, 6
...... Clock generator, 7 …… Synchronous control circuit.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】スペクトラム拡散信号を受け局部拡散信号
との相関値を検出する相関検出器と、局部拡散信号を発
生する拡散信号発生器と、前記拡散信号発生器へクロッ
クを供給するクロック発生器と、前記相関検出器の出力
を受け前記クロック発生器の位相を制御することによっ
て拡散信号の1周期における最大相関値を検出する最大
値検出回路と、前記相関検出器からの信号を受け最大相
関値における周期状態を判定する周期判定回路とを有す
るスペクトラム拡散受信装置の同期回路において、同期
判定回路からの同期判定信号を受け前記最大値検出回路
に再び最大相関値の検出を1回だけ行なわしめる同期制
御回路を備えて成ることを特徴とする同期回路。
1. A correlation detector for receiving a spread spectrum signal and detecting a correlation value with the local spread signal, a spread signal generator for generating the local spread signal, and a clock generator for supplying a clock to the spread signal generator. And a maximum value detection circuit that receives the output of the correlation detector and detects the maximum correlation value in one cycle of the spread signal by controlling the phase of the clock generator, and the maximum correlation circuit that receives the signal from the correlation detector. In a synchronizing circuit of a spread spectrum receiving apparatus having a period judging circuit for judging a periodic state of a value, the maximum value detecting circuit receives the synchronization judging signal from the synchronizing judgment circuit and detects the maximum correlation value only once. A synchronous circuit comprising a synchronous control circuit.
JP1334399A 1989-12-21 1989-12-21 Synchronous circuit Expired - Fee Related JPH0771021B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1334399A JPH0771021B2 (en) 1989-12-21 1989-12-21 Synchronous circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1334399A JPH0771021B2 (en) 1989-12-21 1989-12-21 Synchronous circuit

Publications (2)

Publication Number Publication Date
JPH03192837A JPH03192837A (en) 1991-08-22
JPH0771021B2 true JPH0771021B2 (en) 1995-07-31

Family

ID=18276934

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1334399A Expired - Fee Related JPH0771021B2 (en) 1989-12-21 1989-12-21 Synchronous circuit

Country Status (1)

Country Link
JP (1) JPH0771021B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2726178B2 (en) * 1991-08-07 1998-03-11 三菱電機株式会社 Synchronous decision circuit for spread spectrum demodulator
US5940433A (en) * 1995-06-13 1999-08-17 Ntt Mobile Communications Network, Inc. Acquisition method and system of spreading code

Also Published As

Publication number Publication date
JPH03192837A (en) 1991-08-22

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