JPH0769956B2 - Image input device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to an image input device, which is becoming more popular in recent years, as a peripheral input device for a personal computer or a word processor, a so-called image scanner.

<Prior Art> In recent years, an image input device using a solid-state image sensor, such as a CCD linear image sensor, which replaces an image pickup tube is used as a personal computer to input a document or the like into an electronic file or input an image. It has become easier to create document files that are mixed with text created on a personal computer. Also,
As the sensitivity of the image pickup device itself has increased, the reading length has become wider and the speed has increased, and devices in which chips of 2000 pixels or more are arranged in one line can be driven at 5 to 10 msec / line.

FIG. 5 is a block diagram showing the configuration from such an image input device of the conventional example to the I / O slot of the personal computer 12.

In the figure, 1 is an image sensor, 2 is a drive signal generation circuit that generates various drive signals based on a clock from an oscillator 3, and 4 is a disk having a slit window formed according to scanning of an image input device. A photointerrupter that outputs an encoder pulse when it crosses, 11 is a switch that is operated by continuously pressing it when reading a document, etc.
6 is a serial / parallel converter for converting the serial output of the image sensor 1 into parallel according to the clock from the drive signal generating circuit 2, and 7 is the encoder pulse from the waveform shaping circuit 5 used as the start pulse from the drive signal generating circuit 2. A D flip-flop for synchronization, 8 is a first buffer to which the output of the serial / parell converter 6 is given, and 9 is an output of the D flip-flop 7, a start pulse, a clock and a switch signal corresponding to the operation of the switch 11. The second buffer 10 is an address decoder.

FIG. 4 is a waveform diagram of signals of each part, (A) is a configuration diagram of output data of one line of the image sensor 1, (B) is a start pulse output from the drive signal generating circuit 2, and (C). Indicates a clock output from the drive signal generating circuit 2, and (D) indicates output data of the image sensor 1.

Generally, in an image sensor, as shown in FIG. 4 (A), dummy data and invalid data exist before and after one line, and valid data exist between them. The start pulse is a pulse of one line cycle as shown in FIG. 4 (B), and the clock is
The number of pixels corresponding to the number of pixels is included in one line. For example, assuming that there are 16 dummy components, 512 effective components, and 200 invalid components, the number of clocks in one line is 728. Data "1" or "0" is output from the image sensor 1 in synchronization with the start pulse and the clock, as shown in FIG.

Next, the operation of this conventional example will be described.

First, the data output of the image sensor 1 is converted into parallel data by the serial / parallel converter 6 during the period of one cycle of the start pulse and is given to the first buffer 8. When the personal computer 12 reads the data, the address decoder The output of 10 enables the first buffer 8 to send data to the data bus. As a condition before this lead period, encoder pulse,
The state of the start pulse and the clock, and the state of whether the switch 11 is pressed or not are input to the second buffer 9, and the output of the address decoder 10 enables the second buffer 9 to enable the data bus. Data is sent to.

The synchronization between the encoder pulse and the start pulse in the D flip-flop 7 is to reduce malfunctions on the personal computer 12 side.
When the cycle of the encoder pulse is sufficiently longer than the start pulse, this D flip-flop 7 is unnecessary.

FIG. 6 is a flowchart for explaining the above operation. It is detected whether the switch 11 is turned on or a start pulse arrives, and whether the encoder pulse has changed from the previous state, that is, whether the encoder pulse has changed from high level to low level or from low level to high level Judgment is made based on the output of the buffer 9.

Next, after this condition is satisfied, data (1 byte) is read every time 8 clocks are counted. In other words, it is after the serial / parallel converter 6 completes the data for one byte. Here, the data is read in byte units, but when word transfer of a 16-bit personal computer is used, it may be performed in 16-bit units. In this example, since one line is 728, 728/8 = 91 times are repeated, and one line is completed and the original routine is returned again. The termination of one screen may be terminated at 512 if the memory forming the display screen is 512 lines, or may be terminated by detecting that the switch 11 is turned off midway.

In such a conventional image input device, the period allowed for the personal computer 12 to read data is
This is a period for eight clocks, and if the reading is not completed in this period, the next clock cannot be counted, and the display is stretched to the right or the display is partially completed.

For example, if this clock is 3 μsec,
× 8 = 24 μsec, which means that the computer is required to have a considerably high speed. A clock of 3 μsec means 3 × 728 = 2 for one line in the above-mentioned conventional example.
184 ≈ 2.2 msec, which is a high-speed image sensor of 2 msec / line class, but it still exists at present, and the processing capacity of the personal computer becomes a problem.

Further, the personal computer 12 has a heavy load of software processing such as clock counting and start pulse detection. For example, when there is an interrupt processing such as a keyboard operation at the time of reading data, a malfunction occurs. Therefore, there is a drawback in that almost all interrupt routines must be prohibited to perform scanner data processing.

<Object of the Invention> The present invention has been made in view of the above points, and an object of the present invention is to provide an image input device that can be applied regardless of the performance of a personal computer.

<Structure of the Invention> In order to achieve the above object, according to the present invention, in an image input device for inputting an image read by an image sensor to a computer or the like, one line of output data of the image sensor is written or read. A single line memory, a switching circuit for switching and outputting the clock of the image sensor as a writing clock and a clock of the computer as a reading clock, an encoder pulse corresponding to the scanning of the image sensor, and one line period. A switching control circuit for controlling the switching of the switching circuit based on the start pulse of, the output data from the image sensor is written to the line memory according to the write clock, and the data of the line memory is read out. Read according to the clock It is designed to be sent out and sent to the computer or the like.

According to the above configuration, the output data of the image sensor can be written in the memory at the clock of the image sensor and can be read at any time by the clock of the computer or the like at the time of reading, software processing can be reduced, and the access time of the computer can be reduced. Therefore, the processing can be performed without depending on the entire system.

<Example> Hereinafter, an example of the present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram of an embodiment of the present invention, and the portions corresponding to the conventional example of FIG. 5 are given the same reference numerals.

In the figure, 1 is an image sensor, 2 is a drive signal generation circuit that generates various drive signals based on a clock from an oscillator 3, and 4 is a disk having a slit window formed according to scanning of an image input device. A photointerrupter that outputs an encoder pulse when it crosses, 11 is a switch that is operated by continuously pressing it when reading a document, etc.
6 is a serial / parallel converter for converting serial data from a line memory 13 described later into parallel data, and 7 is for synchronizing the encoder pulse S1 from the waveform shaping circuit 5 with the start pulse S2 from the drive signal generating circuit 2. D flip-flop, 8 is a first buffer to which the output of the serial / parallel converter 6 is applied, 9 is a second buffer to which the output S6 of the D flip-flop 7 and the switch signal S5 are applied, and 10 is an address decoder.

Such a configuration is basically the same as the conventional example shown in FIG.
Further, as described with reference to FIG. 4, the output of one line of the image sensor 1 has dummy data and invalid data before and after the valid data. In this embodiment, the dummy data and the invalid data exist. , 16 dummy parts, 512 effective parts, and 200 ineffective parts.

In the image input device of this embodiment, a line memory 13 for writing or reading the output data of the image sensor 1 for one line is provided between the image sensor 1 and the serial / parallel converter 6, and the D flip-flop 7 is provided. The clock S3 of the image sensor 1 from the drive signal generation circuit 2 based on the encoder pulse S6 from
Is provided as a write clock and a clock (CPU clock) of the personal computer 12 is used as a read clock, and a changeover switch 14 is provided for switching output.

In this embodiment, as described later, the D flip-flop 7
While the encoder pulse S6 outputted from the image sensor 1 is at a high level, the image sensor 1
Output data from the line memory 13 is written to the line memory 13, and while the encoder pulse S6 is at a low level, the data in the line memory 13 is read according to the read clock and output to the serial / parallel converter 6, The data is sent to the personal computer 12.

The clock from the personal computer 12 is the counter
It is output as a byte-by-byte read clock by a gate circuit 15 composed of 16 and an AND gate 17, and this read clock is given to the serial / parallel converter 6 as a conversion clock. This gate circuit 15
The counter 16 of is reset by the output of the address decoder 10.

Next, the operation of the image input device having the above configuration will be described based on the signal waveform diagram of FIG.

2 (A) is an encoder pulse S1 output from the waveform shaping circuit 5 according to the scanning of the image input device, FIG. 2 (B).
Is a start pulse S2 output from the drive signal generating circuit 2, FIG. 2C is a clock S3 of the image sensor output from the drive signal generating circuit 2, and FIG. 2D is a data output S4 of the image sensor 1. 2 (E) is a switch signal S5 corresponding to the operation of the switch 11, and FIG. 2 (F) is an encoder pulse output from the D flip-flop 7.
S6, FIG. 2 (G) is the clock S7 of the line memory 13 output from the changeover switch 14, and FIG. 2 (H) is FIG. 2 (G).
FIG.

In the image input device of this embodiment, as shown in FIG. 2 (F), the high level of the encoder pulse S6 output from the D flip-flop 7 having a function as a switching control circuit for controlling the switching of the switching switch 14 is high. During the level period, one line of the output data of the image sensor 1 is used as the write clock by the 728 clocks S3 of the image sensor shown in FIGS. Written in the encoder pulse
The data in the line memory 13 is
The clock of the personal computer 12 from the change-over switch 14 shown in FIGS. 2 (G) and 2 (H) for 8 times in total, 91 times, is read as a read clock and output to the serial / parallel converter 6.

The personal computer 12 finishes the read clock 8 times, that is, the serial / parallel converter 6 outputs 1
Data (1 byte) is read after all the bytes are aligned, and since one line is 728, 728/8 = 91 times are repeated to complete one line. As a precondition for the reading of the personal computer 12, it is necessary that the encoder pulse S6 is at a low level and the switch 11 is pressed, and this is determined by the output of the second buffer 9.

Thus, during the high level period of the encoder pulse S6, the data of one line is supplied to the clock of the image sensor 1.
S3 is once written in the line memory 13 as a write clock, and while the encoder pulse S6 is at a low level, the data in the line memory 13 is transferred to the personal computer 12
Since the clock of is read out as the read clock and is sent out by the personal computer 12, the personal computer 12 may read the data for one line at an arbitrary cycle while the encoder pulse S6 is at the low level. As in the conventional example, the data in the line memory 13 may be transferred in byte units without the need for processing such as detection of a start pulse and counting of eight clocks, and the processing speed of the personal computer 12 is limited. In addition, unlike the conventional example, it is not necessary to prohibit the interruption of the personal computer 12 during almost all the period of reading the output data of the image sensor 1.

Furthermore, the data read can be completed with a sufficient margin because it can be completed within the low level period of the encoder pulse S6, that is, the period of at least one line, and thus, in the case of the above-mentioned conventional example, within the period of 2.2 msec. It will be possible, and will be applicable to most computers.

FIG. 3 is a flowchart corresponding to the above operation.

First, in step n1, the display screen of the personal computer 12 is cleared and the process proceeds to step n2. It is determined whether or not the switch 11 is turned on. When it is determined that the switch 11 is turned on, the process proceeds to step n3 and the encoder pulse It is determined whether or not S6 is at the low level. When it is at the low level, the process proceeds to step n4 to read the data, and then proceeds to step n5.

In step n5, it is judged whether or not the reading of the data of one line is completed. When it is judged that the reading is completed, the process proceeds to step n6, it is judged whether or not the switch 11 is turned on, and it is judged that it is turned on. If so, the process proceeds to step n7, and it is determined whether or not the reading of the data of one screen is completed. If it is determined that the reading is completed, the process is completed.

In the above embodiment, the data is written in the line memory 13 during the high level period of the encoder pulse S6 and is read out during the low level period, but it is needless to say that it may be reversed as another embodiment of the present invention. Is.

Further, the present invention is not limited to a so-called handy type in which the image input device itself is manually operated, but it is needless to say that the present invention can be applied to a type in which a document is stationary and the image input device is driven by a motor.

<Effects of the Invention> As described above, according to the present invention, the memory is provided and the output data of the image sensor is once written in the memory at the clock of the image sensor, and at the time of reading, the data of the memory is read at the clock of the computer or the like. Since it is configured like this, there is no need to detect the start pulse or count the clock as in the conventional example, the software processing is reduced, and the margin for the period of reading the data is sufficient, which is applicable to most personal computers. You can do it.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention, and FIG.
FIG. 3 is a signal waveform diagram of each part in the figure, FIG. 3 is a flow chart for explaining the operation of FIG. 1, FIG. 4 is a signal waveform diagram of each part, and FIG.
FIG. 6 is a block diagram of the conventional example, and FIG. 6 is a flowchart for explaining the operation of the conventional example. 1 ... Image sensor, 12 ... Personal computer, 13 ... Line memory, 14 ... Changeover switch (changeover circuit).

Claims (1)

[Claims] 1. An image input device for inputting an image read by an image sensor to a computer or the like, wherein a single line memory in which one line of output data of the image sensor is written or read, and a clock of the image sensor. As a write clock, and a switching circuit for switching and outputting the clock of the computer or the like as a reading clock, and switching of the switching circuit based on an encoder pulse corresponding to scanning of the image sensor and a start pulse of one line cycle. A switching control circuit for controlling, writing the output data from the image sensor to the line memory in response to the write clock, reading the data in the line memory in response to the read clock, and sending the data to the computer or the like. To Characteristic image input device.