JPH0766929B2 - Flat semiconductor device - Google Patents

Flat semiconductor device

Info

Publication number
JPH0766929B2
JPH0766929B2 JP62288716A JP28871687A JPH0766929B2 JP H0766929 B2 JPH0766929 B2 JP H0766929B2 JP 62288716 A JP62288716 A JP 62288716A JP 28871687 A JP28871687 A JP 28871687A JP H0766929 B2 JPH0766929 B2 JP H0766929B2
Authority
JP
Japan
Prior art keywords
container
electrode body
regulating member
position regulating
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP62288716A
Other languages
Japanese (ja)
Other versions
JPH01129423A (en
Inventor
勝弘 遠藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP62288716A priority Critical patent/JPH0766929B2/en
Publication of JPH01129423A publication Critical patent/JPH01129423A/en
Publication of JPH0766929B2 publication Critical patent/JPH0766929B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、絶縁性側壁とその両端面に可撓性をもって結
合される電極体からなる容器内に少なくとも半導体基体
を含む部材が位置を容器中央に規制して収容され、外部
からの圧力による電極体と内部収容部品間および内部収
容部品相互間の接触により電気的,熱的接続が行われる
平形半導体装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a container including at least a semiconductor substrate in a container formed of an insulating side wall and electrode bodies flexibly coupled to both end surfaces thereof. The present invention relates to a flat semiconductor device that is regulated and housed in the center, and is electrically and thermally connected by contact between an electrode body and internal housing parts and mutual internal housing parts due to pressure from the outside.

〔従来の技術〕[Conventional technology]

従来のこの種の半導体装置の一例を第2図に示す。第2
図は、電力用平形ダイオードの容器収容構造断面略図を
示してある。本構造は一つのPN接合をもつ半導体基体1
およびこれと加圧接触される内部電極板2とが横方向に
移動をしないように、第3図に示すように円周の一部に
切欠き31をもつほぼ環状の絶縁性部材3を用い、セラミ
ック側壁4の内壁を基準として容器中央に位置規制をし
ている。環状セラミック側壁4は、外部電極体51,52,フ
ランジ61,62と共に気密容器7を形成しており、半導体
基体1と内部電極板2は外部電極体51,52間にはさま
れ、外部からの力で圧接されて電気的,熱的伝導路が形
成されている。
An example of a conventional semiconductor device of this type is shown in FIG. Second
The figure shows a schematic cross-sectional view of a container housing structure of a power flat diode. This structure is a semiconductor substrate 1 with one PN junction.
As shown in FIG. 3, a substantially annular insulating member 3 having a notch 31 in a part of its circumference is used so that the inner electrode plate 2 which is in pressure contact therewith does not move laterally. The position of the inner wall of the ceramic side wall 4 is regulated at the center of the container. The annular ceramic side wall 4 forms an airtight container 7 together with the external electrode bodies 51, 52 and the flanges 61, 62, and the semiconductor substrate 1 and the internal electrode plate 2 are sandwiched between the external electrode bodies 51, 52, and Are pressed together by the force of to form an electrical and thermal conduction path.

〔発明が解決しようとする問題点〕[Problems to be solved by the invention]

かかる構造において、中央位置規制部材3は側壁4の内
面を基準として半導体基体1と内部電極板2を気密容器
7の中心に位置させる必要があるため、セラミック側壁
4の内面加工寸法精度は非常にきびしく要求されると共
に、外部電極体51,52を可撓的に結合するフランジ61,62
とのろう付精度、さらにはセラミック側壁4とフランジ
61,62との溶接精度も要求される。規制部材3の切欠き3
1は、サイリスタの場合にはゲート電極リードの通路の
役もするほか、側壁4,基体1,内部電極板2の多少の寸法
誤差に追随できるように設けられているが、これがある
ため取扱いによっては変形することがあり、かえって位
置規制を困難にする場合が生ずる。
In such a structure, the central position regulating member 3 needs to position the semiconductor substrate 1 and the internal electrode plate 2 at the center of the airtight container 7 with the inner surface of the side wall 4 as a reference. The flanges 61 and 62 are required to be rigid and flexibly connect the external electrode bodies 51 and 52.
Brazing accuracy with ceramic side wall 4 and flange
Welding accuracy with 61, 62 is also required. Notch 3 in regulating member 3
In the case of a thyristor, 1 also serves as a passage for the gate electrode lead, and is provided so as to be able to follow a slight dimensional error of the side wall 4, the base body 1, and the internal electrode plate 2. May be deformed, which may make it difficult to regulate the position.

本発明の目的は、上述の問題を解決して容器内に収容さ
れる少なくとも半導体基体を含む部材の位置規制を変形
しにくい部材で行い、しかも容器内面の寸法精度にきび
しさを必要としない平形半導体装置を提供することにあ
る。
An object of the present invention is to solve the above-mentioned problems and to perform position regulation of a member containing at least a semiconductor substrate housed in a container by a member that is difficult to deform, and yet does not require strictness in dimensional accuracy of the inner surface of the container. To provide a device.

〔問題点を解決するための手段〕[Means for solving problems]

上記の目的を達成するために本発明は、絶縁性側壁とそ
の両端面に可撓性をもって結合される電極体からなる容
器内に少なくとも半導体基体を含む部材が両電極体間に
収容され、容器内部が排気されて不活性ガスと置換が行
われる平形半導体装置において、一方の電極体に外部側
の径大の側面と内部側の径小の側面が環状段差面を介し
て形成され、その電極体の環状段差面,径小側面および
内部収容部材の外周面に当接可能の絶縁性環状中央位置
規制部材を備え、該中央位置規制部材の電極体環状段差
面との当接面の一部にざぐり部が形成され、かつ該中央
位置規制部材の半導体基体との当接面の一部に放射状に
複数の通気孔が形成されたものとする。
In order to achieve the above-mentioned object, the present invention provides a container including at least a semiconductor substrate in a container composed of an insulating side wall and electrode bodies that are flexibly coupled to both end surfaces thereof. In a flat semiconductor device in which the inside is evacuated and replaced with an inert gas, one electrode body is formed with a large-diameter side surface on the outer side and a small-diameter side surface on the inner side via an annular step surface. An insulative annular center position restricting member capable of contacting the annular step surface, the small diameter side surface of the body, and the outer peripheral surface of the internal housing member, and a part of the contact surface of the central position restricting member with the electrode body annular step surface. It is assumed that a countersunk portion is formed and a plurality of ventilation holes are radially formed in a part of the contact surface of the central position regulating member with the semiconductor substrate.

〔作用〕[Action]

上記の中央位置規制部材は、容器の絶縁性側壁内面に比
して寸法精度の高い加工が容易な環状段差面および径小
側面を基準とし、切欠きがないので変形により使用不能
になることもない。さらに、この中央位置規制部材はざ
ぐり部やガス置換を完全とするための通気孔を設けた場
合は、サイリスタなどの制御用リードの通路として役立
つほか、容器内挿入時の部材の支持を容易にし、また電
極体や内部収容部材の熱膨張,熱収縮時の寸法変化を吸
収する役目をもつ。
The central position regulating member is based on an annular stepped surface and a small diameter side surface that are easy to machine with high dimensional accuracy compared to the inner surface of the insulating side wall of the container, and since it has no notch, it may become unusable due to deformation. Absent. Furthermore, this center position regulating member serves as a passage for control leads such as thyristors when a counterbore or a ventilation hole for complete gas replacement is provided, and also facilitates support of the member when inserted into the container. In addition, it also has a role of absorbing dimensional changes during thermal expansion and contraction of the electrode body and the internal containing member.

〔実施例〕〔Example〕

第1図は本発明の一実施例を示し、第2図と共通の部分
には同一の符号が付されている。図から明らかなよう
に、半導体基体1と内部電極板2との横方向移動を防止
するための中央位置規制部材3が容器7のセラミック側
壁4に接しないで、上部電極体51を基準としている。そ
のため、凸形断面をもつ電極体51の段差面81および径小
の側面82に位置規制部材3が接触し、同時に第2図の場
合と同様内部電極板2および半導体基体1の外周面に接
触して電極体51と同心の容器中央に位置決めする。
FIG. 1 shows an embodiment of the present invention, and the same parts as those in FIG. 2 are designated by the same reference numerals. As is clear from the figure, the central position regulating member 3 for preventing the lateral movement of the semiconductor substrate 1 and the internal electrode plate 2 is not in contact with the ceramic side wall 4 of the container 7, but is based on the upper electrode body 51. . Therefore, the position regulating member 3 comes into contact with the stepped surface 81 and the small-diameter side surface 82 of the electrode body 51 having a convex cross section, and at the same time, comes into contact with the outer peripheral surfaces of the internal electrode plate 2 and the semiconductor substrate 1 as in the case of FIG. Then, it is positioned at the center of the container concentric with the electrode body 51.

第4図(a),(b)は、半導体装置がサイリスタの場
合に用いる中央位置規制部材3の詳細図で、図(a)は
第1図の状態にある位置規制部材3を下方から見た平面
図、図(b)は(a)のA−A線断面図である。この部
材3はポリテトラフルオロエチレンのような耐熱性樹脂
からなるが、第2図のものと異なり切欠きがない。ゲー
トリードの通路としては、電極体1の段差面に接する側
に角溝状のざぐり部32が設けられている。この部材3を
用いたサイリスタの組立て工程は、先ずフランジ61によ
り電極体51と側壁4をろう付けおよび溶接で結合し、一
方部材3には第4図の姿勢で内部に内部電極板2,サイリ
スタ基板1を挿入し、その際ゲートリードはざぐり部32
を通じて部材3の外へ出しておく。そして電極体51を下
にして側壁4の図示しないゲートリード引出し管にゲー
トリードを通しながら部材3と内部電極板2、サイリス
タ基板1と共に上からおろし、部材3を電極体51の段差
面81,側面82に接触させる。このようにして位置規制さ
れた収容部材の上にフランジ62を結合した電極体52をお
ろし、フランジ62と側壁4にろう付けしたフランジ部分
とを溶接する。このあと、ゲートリード引出し管を用い
て容器内部を排気し、不活性ガスと置換して引出し管を
封じ切る。その際ガス置換が完全に行われるように、部
材3に放射状に複数の通気孔33が明けられている。
4 (a) and 4 (b) are detailed views of the central position regulating member 3 used when the semiconductor device is a thyristor, and FIG. 4 (a) shows the position regulating member 3 in the state of FIG. 1 from below. 2B is a cross-sectional view taken along the line AA of FIG. This member 3 is made of a heat resistant resin such as polytetrafluoroethylene, but has no notch unlike the member shown in FIG. As a passage for the gate lead, a square groove-shaped counterbore portion 32 is provided on the side in contact with the step surface of the electrode body 1. In the process of assembling the thyristor using this member 3, first, the electrode body 51 and the side wall 4 are joined by brazing and welding by the flange 61, while the member 3 has the internal electrode plate 2 and the thyristor inside in the posture shown in FIG. Substrate 1 is inserted, in which case the gate lead has a counterbore 32
Through the member 3 through. Then, with the electrode body 51 facing down, the member 3 and the internal electrode plate 2 and the thyristor substrate 1 are lowered from above while passing the gate lead through a gate lead extraction tube (not shown) of the side wall 4, and the member 3 is stepped surface 81, Contact the side surface 82. The electrode body 52 having the flange 62 joined thereto is put down on the housing member whose position is thus regulated, and the flange 62 and the flange portion brazed to the side wall 4 are welded together. After that, the inside of the container is evacuated by using the gate lead drawing tube and replaced with an inert gas to seal the drawing tube. At this time, a plurality of ventilation holes 33 are radially formed in the member 3 so that the gas replacement is completely performed.

ざぐり部32は単にゲートリードの通路となるばかりでな
く、部材3の挿入時の治具のひっかけ場所として役立
ち、さらに上述のように温度変動による寸法変化の吸収
にも役立つので、1個所でなく複数個所に設けてもよ
く、従ってダイオードのように外部へ引出すリードを持
たない半導体装置においてもざぐり部32を設けることは
有効である。なお内部電極板を介しないで半導体基体と
電極体とを直接接触させる場合は、部材3の断面はL字
形になる。
The counterbore 32 not only serves as a passage for the gate lead, but also serves as a hooking place for the jig when the member 3 is inserted, and also serves to absorb dimensional changes due to temperature fluctuations as described above, so that it is not a single place. It may be provided at a plurality of places, and therefore it is effective to provide the counterbore portion 32 even in a semiconductor device such as a diode that does not have a lead extending to the outside. When the semiconductor substrate and the electrode body are directly contacted with each other without the internal electrode plate, the member 3 has an L-shaped cross section.

〔発明の効果〕〔The invention's effect〕

本発明によれば、加圧接触平形半導体装置の容器内部収
容部材を容器中央に位置決めするための絶縁性環状部材
を一方の電極体の段差面および径小側壁に当接させるよ
うにしたので、従来の中央位置規制部材のように絶縁性
容器側壁のきびしい寸法精度の加工の必要がなくなり、
構造の簡単な信頼性の高い平形半導体装置を得ることが
できる。さらに、本発明による中央位置規制部材は環状
で変形することはないが、電極体への当接面にざぐり部
や通気孔を形成することにより電極体あるいは収容部材
の温度変動による寸法変化を吸収でき、またサイリス
タ,トランジスタなどの制御リードの引出し用にも利用
することができる。そして、中央位置規制部材に放射状
に複数の通気孔を設けることで容器内の不活性ガスへの
置換を完全に行うことができる。
According to the present invention, since the insulating annular member for positioning the container inner accommodating member of the pressure contact flat semiconductor device in the container center is brought into contact with the step surface and the small diameter side wall of one electrode body, Eliminates the need for dimensional precision machining of the side wall of an insulating container unlike the conventional center position regulation member,
It is possible to obtain a highly reliable flat semiconductor device having a simple structure. Further, although the central position restricting member according to the present invention is annular and does not deform, a dimensional change due to a temperature change of the electrode body or the containing member is absorbed by forming a counterbore or a vent hole on the contact surface to the electrode body. It can also be used for pulling out control leads such as thyristors and transistors. Then, by providing a plurality of ventilation holes radially in the central position regulating member, the replacement with the inert gas in the container can be performed completely.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の一実施例の平形半導体装置の断面図、
第2図は従来の平形半導体装置の断面図、第3図はそれ
に用いる中央位置規制部材の平面図、第4図(a),
(b)は本発明の一実施例のサイリスタに用いる中央位
置規制部材で、(a)は平面図,(b)は(a)のA−
A線断面図である。 1:半導体基体、2:内部電極体、3:中央位置規制部材、3
2:ざぐり部、4:絶縁性容器側壁、51,52:電極体、7:容
器。
FIG. 1 is a sectional view of a flat semiconductor device according to an embodiment of the present invention,
2 is a cross-sectional view of a conventional flat semiconductor device, FIG. 3 is a plan view of a central position regulating member used therein, FIG. 4 (a),
(B) is a central position regulating member used in the thyristor of one embodiment of the present invention, (a) is a plan view, (b) is A- of (a).
It is an A line sectional view. 1: semiconductor substrate, 2: internal electrode body, 3: central position regulating member, 3
2: Counterbore part, 4: Insulating container side wall, 51, 52: Electrode body, 7: Container.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】絶縁性側壁とその両端面に可撓性をもって
結合される電極体からなる容器内に少なくとも半導体基
体を含む部材が両電極体間に収容され、容器内部が排気
されて不活性ガスと置換が行われたものにおいて、一方
の電極体に外部側の径大の側面と内部側の径小の側面が
環状段差面を介して形成され、該電極体の環状段差面,
径小側面および内部収容部材の外周面に当接可能の絶縁
性環状中央位置規制部材を備え、該中央位置規制部材の
電極体環状段差面との当接面の一部にざぐり部が形成さ
れ、かつ該中央位置規制部材の半導体基体との当接面の
一部に放射状に複数の通気孔が形成されたことを特徴と
する平形半導体装置。
1. A container including at least a semiconductor substrate is housed between both electrode bodies in a container composed of an insulating side wall and electrode bodies flexibly coupled to both end surfaces thereof, and the inside of the container is evacuated to be inactive. In the one that has been replaced with gas, one electrode body is formed with a large-diameter side surface on the outer side and a small-diameter side surface on the inner side via an annular step surface, and the annular step surface of the electrode body,
An insulative annular center position regulating member that can contact the small diameter side surface and the outer peripheral surface of the inner housing member is provided, and a counterbore is formed on a part of the contact surface of the center position regulating member with the annular step surface of the electrode body. A flat semiconductor device, wherein a plurality of ventilation holes are radially formed in a part of a contact surface of the central position regulating member with the semiconductor substrate.
JP62288716A 1987-11-16 1987-11-16 Flat semiconductor device Expired - Lifetime JPH0766929B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62288716A JPH0766929B2 (en) 1987-11-16 1987-11-16 Flat semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62288716A JPH0766929B2 (en) 1987-11-16 1987-11-16 Flat semiconductor device

Publications (2)

Publication Number Publication Date
JPH01129423A JPH01129423A (en) 1989-05-22
JPH0766929B2 true JPH0766929B2 (en) 1995-07-19

Family

ID=17733761

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62288716A Expired - Lifetime JPH0766929B2 (en) 1987-11-16 1987-11-16 Flat semiconductor device

Country Status (1)

Country Link
JP (1) JPH0766929B2 (en)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5658872U (en) * 1979-10-13 1981-05-20
JPS5828844A (en) * 1981-08-14 1983-02-19 Hitachi Ltd Semiconductor device
JPS58176953A (en) * 1982-04-12 1983-10-17 Hitachi Ltd Semiconductor device

Also Published As

Publication number Publication date
JPH01129423A (en) 1989-05-22

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