JPH0763121B2 - Monolithic microwave integrated circuit - Google Patents

Description

The present invention relates to a monolithic microwave integrated circuit including a semiconductor device.

<Prior Art> In a conventional monolithic microwave integrated circuit, as shown in FIG. 1, dielectric layers 2 and 3 are provided side by side on a semiconductor substrate 1, and a high frequency signal is provided only on these dielectric layers 2 and 3. Transmission lines, here, microstrip lines 4 and 5 are arranged. The ground conductors 6 and 7 of the dielectric layers 2 and 3 are connected to the ground conductor 8 of the semiconductor substrate 1 (the surface opposite to the surface on which the dielectric layers 2 and 3 are formed) through the connection conductors 11 and 12 on the side surfaces. . The semiconductor element (field-effect transistor in FIG. 1) 13 is a dielectric layer
The semiconductor substrate 1 is formed on the same plane as the surface on which the microstrip lines 4 and 5 are formed between the dielectric layers 2 and 3, and thus the semiconductor substrate 1 is arranged between the dielectric layers 2 and 3. The protrusion 1a having a thickness of 3 is formed, and the field effect transistor 13 is formed on the protrusion 1a. In order to ground the source electrode 14 of the field effect transistor (hereinafter referred to as FET) 13 between the projecting portion 1a of the semiconductor substrate 1 and the dielectric layers 2 and 3, short-circuit plates 15 and 16 are provided.
Is inserted and connected to the short-circuit plates 15 and 16, ground conductor films 17 and 18 are formed on the surface of the protrusion 1a so as to surround the FET 13 from both sides, and the source electrode 14 is connected to the ground conductor films 17 and 18. To be done. The gate electrode 19 of the FET 13 is connected to the microstrip line 4 on the input side, and the drain electrode 21 is connected to the microstrip line 5 on the output side. The connecting portion between the microstrip line 4 and the gate electrode 19 is a ground conductor film 17,1.
8 and coplanar line 22. Microstrip lines 23, 24 connected to the microstrip lines 4,5
Form a matching stub.

As described above, in the conventional monolithic microwave integrated circuit, it is necessary to form the short-circuit plates 15 and 16 between the semiconductor protrusion 1a and the dielectric layers 2 and 3, which makes the monolithic microwave integrated circuit. There has been a problem that the manufacturing process is complicated and the cost of this circuit becomes high. Further, the input signal from the microstrip line 4 is converted to the coplanar line 22 and applied to the FET 13, but due to the influence of the discontinuous portion of the microstrip line-coplanar line conversion unit.
There is also a problem that the performance of the FET 13, for example, gain and frequency characteristics as an amplifier are deteriorated.

<Outline of the Invention> An object of the present invention is to provide a monolithic microwave integrated circuit which is easy to manufacture.

According to the present invention, a semiconductor element is formed on a semiconductor substrate, and a coplanar or slot line is provided on the semiconductor substrate on the same surface as the element. Further, a dielectric layer is formed on the semiconductor substrate so as to cover the coplanar or slot line, and a microstrip line coupled with the coplanar or slot line is formed on the dielectric layer.

<Embodiment> FIG. 2 shows an example of a monolithic microwave integrated circuit according to the present invention, in which parts corresponding to those in FIG. A semiconductor element (FET in this example) 13 is formed on one surface of the semiconductor substrate 1, and a transmission line connected to the FET 13 is formed on the semiconductor substrate 1 on substantially the same surface as the surface on which the FET 13 is formed. In this example, the ground conductor film 6 is formed on the formation surface of the FET 13 except on the FET 13, and the ground conductor film 6 is connected to the ground conductor 8 of the semiconductor substrate 1 through the connection conductors 11 and 12 on both sides. Coplanar lines 25 and 26, one ends of which are respectively connected to the gate electrode 19 and the drain electrode 21, are formed on the ground conductor film 6 on both sides of the FET 13. The dielectric layers 2 and 3 are formed on the semiconductor substrate 1 including the coplanar lines 25 and 26, respectively, and the microstrip lines 4,5 are formed on the dielectric layers 2 and 3, respectively. One ends of the microstrip lines 4 and 5 are connected to the other ends of the coplanar lines 25 and 26 through through holes 27 and 28, respectively. The other ends of the microstrip lines 4 and 5 are connected to the input port 31 and the output port 32, respectively.

Input signal from input port 31 is microstrip line
Gate electrode 1 through 4, through hole 27 and coplanar line 25
Added to 9. The conversion from the micro strip line 4 to the coplanar line 25 is performed through the through hole 27, but since the dielectric layers 2 and 3 are sufficiently thin, the conversion can be performed with a through hole having a diameter of about the line width, which is discontinuous. The components can be made sufficiently small. Therefore, the characteristic deterioration of the FET 13 due to this conversion unit can be ignored, and it can be applied to a high frequency band. Since the electrodes 14, 19, 21 of the FET 13 are in the same plane as the coplanar lines 25, 26, these electrodes can be easily connected to the coplanar lines. The input signal amplified by the FET 13 is obtained from the output port 32 via the coplanar line 26, the through hole 28, and the microstrip line 5.

As described above, in this structure, it is not necessary to insert the short-circuit plate between the semiconductor protrusion and the dielectric layer, and there is no characteristic deterioration due to the discontinuous portion. Further, since the coplanar lines 25 and 26 can be manufactured at the same time in the manufacturing process for manufacturing the FET 13, there is an advantage that the coplanar lines 25 and 26 can be manufactured at the same cost as a single FET element.

<Other Embodiments> FIG. 3 shows another embodiment of the present invention, in which parts corresponding to those in FIG. 2 are designated by the same reference numerals. In this example, semiconductor barrier diodes (hereinafter, referred to as SBD) 30, 40 are formed on the semiconductor substrate 1 as semiconductor elements. In addition, a slot line 33 is formed on the ground conductor film 6 with one end close to both of the SBDs 30 and 40. Further, the slot lines 34 and 35 extend in the opposite direction to the slot line 33 on both outsides of the arrangement of the SBDs 30 and 40. Are formed on the ground conductor film 6. The slot lines 34 and 35 have the same length, and the other ends are connected by the slot line 36. The other end of the slot line 33 is connected to a slot cavity 37 for opening. The conductor films on both sides of one end of the slot line 33 are SBD3.
The cathode 38 and the anode 39 of 0 and 40 are extendedly connected, respectively, and the anode 41 and the cathode 42 of SBDs 30 and 40 are extendedly connected to the conductor films inside the slot lines 34 and 35, respectively. The dielectric layer 2 is formed on the semiconductor substrate 1 including the slot lines 33 and the slot cavities 37, and the dielectric layer 3 is formed on the semiconductor substrate 1 including the slot lines 34, 35 and 36. The microstrip lines 4,5 formed on the dielectric layers 2 and 3, respectively,
When viewed from the direction perpendicular to the plate surfaces of the dielectric layers 2 and 3, one end is orthogonal to the slot lines 33 and 36, and the through holes 27 and 28 are formed.
Through to the ground conductor film 6. A microstrip line 5 is connected to a DC bias applying terminal 45 through a strip conductor 43.

Input signal from input port 31 is microstrip line
4, It is converted and coupled to the slot line 33 through the through hole 27. The slot cavity 37 provides an open condition to improve the conversion efficiency from the microstrip line 4 to the slot line 33. Two SBDs 30 and 40 are connected in series to the slot line 33, and by turning the SBDs 30 and 40 ON and OFF, the input signal propagates to the slot line 34 or 35. The SBD ON-OFF signal is applied from terminal 45 through strip conductor 43. When SBD 30 is ON and SBD 40 is OFF, the signal component propagates through the slot line 35, is converted and coupled to the micro strip line 5 through the through hole 28, and the output is obtained from the port 32. Conversely, when the SBD 30 is OFF and the SBD 40 is ON, an output is obtained via the slot line 34, the phase of the signal is opposite to that in the previous case, and a two-phase modulated wave is obtained.

Thus, the semiconductor elements 30 and 40 and the transmission lines 33, 34 and 35 are formed on the semiconductor substrate 1, the thinner dielectric layers 2 and 3 are formed, and the transmission line 4 is formed on these dielectric layers 2 and 3. By arranging 5 and 5, there is an advantage that a greatly miniaturized two-phase phase modulator can be constructed. Further, since there is no discontinuous portion that causes a parasitic element, there is an advantage that a phase modulator that can operate in a high frequency band can be realized. Further, since the area where the two SBDs 30 and 40 are formed can be made extremely small, there is an advantage that variations in semiconductor elements can be reduced and a circuit with good reproducibility can be manufactured.

The dielectric layer formed on the semiconductor substrate may have a multi-layer structure. Further, as the transmission line formed on the semiconductor substrate or on the dielectric layer, a microstrip line, a slot line, a coplanar line, or a coupling line of these lines may be used.

<Effect> As described above, according to the present invention, the semiconductor element and the transmission line are formed on the semiconductor substrate in substantially the same plane, and one or more dielectric layers are further formed, and the transmission line is formed on the dielectric layer. Are arranged, and these lines and semiconductor elements are combined to form a monolithic microwave integrated circuit, so that factors such as discontinuities that deteriorate the high-frequency characteristics of the circuit can be reduced, and FETs, etc. The cost of the circuit can be reduced by applying the manufacturing process of the semiconductor element, and further, the circuit, which has been problematic in miniaturization and reproducibility, can be significantly miniaturized and the reproducibility can be improved. There is an advantage that can be.

[Brief description of drawings]

FIG. 1 is a perspective view showing a conventional monolithic microwave integrated circuit, and FIGS. 2 and 3 are perspective views showing an embodiment of the present invention. 1 ... semiconductor substrate, 2,3 ... dielectric layer, 4,5 ... microstrip line, 6 ... ground conductor film, 13 ... field effect transistor (FET), 14 ... source electrode, 19 ...... Gate electrode, 21 …… Drain electrode, 25,26 …… Coplanar line, 27,28 …… Through hole, 31 …… Input port, 32…
… Output port, 37 …… Slot cavity, 33 to 36 …… Slot line, 30,40 …… Shottoki barrier diode (SB
D).

Claims (1)

[Claims] 1. A semiconductor element is formed on one surface of a semiconductor substrate, and a coplanar line or slot line connected to the semiconductor element is formed on the semiconductor substrate substantially on the same surface as the semiconductor element formation surface. Alternatively, a monolithic microwave integrated circuit in which a dielectric layer is formed on the semiconductor substrate so as to cover the slot line, and a microstrip line coupled to the coplanar line or the slot line is formed on the dielectric layer.