JPH0758290A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To achieve the high accuracy of the capacity of a capacitor for an IC without making its size large and to reduce the area of a digital IC and an analog IC by a method wherein the lower-layer electrode of the capacitor composed of a silicon material or the surface of an insulating film is etched and flattened by isotropic etching. CONSTITUTION:A field oxide film 12 in a film thickness of about 3000Angstrom is formed on an n-type Si (100) single-crystal substrate 11 by thermal oxidation, and, in addition, a polycrystalline silicon film 13, in a film thickness of 4000Angstrom , which is to be used as a lower-layer electrode is formed on the field oxide film 12. In succession, phosphorus is diffused into the polycrystalline silicon film 13 so as to be provided with a conductive property, and the resistivity of the silicon film 13 is lowered to be 10OMEGAcm or lower. Then, the surface of the polycrystal silicon film 13 is etched and flattened by an isotropic etching method. Thereby, the surface of the film is flattened, the variability of effective surface area of an insulating film is reduced, and the film thickness of the insulating film can be made uniform. Consequently, it is possible to reduce the variability of leakage current density and capacity.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device having a capacitor formed on a substrate.

[0002]

2. Description of the Related Art An IC (integrated circuit) is a DRAM (Dyna
mic Random Access Memory), SRAM (Static Random)
m Access Memory), EEPROM (Electrically Era)
sable and Programmable Read Only Memory) and other semiconductor memory devices; CPU (Central Process Un
It), D / A (Digital / Anarog) converter, and other elements having special functions; custom ICs, etc., all of which are made by laminating thin films on a silicon single crystal substrate. Among these ICs, especially ICs that include analog circuits
Are required to have higher accuracy in electrical characteristics such as wiring resistance value and capacitor capacitance value as compared with digital ICs.

In such an IC which requires high accuracy of electrical characteristics, the accuracy of electrical characteristics is currently increased by increasing the size of transistors and capacitors.

[0004]

However, if the accuracy of the electrical characteristics is increased by increasing the size of the transistors and capacitors as described above, it is difficult to reduce the area of the IC. Further, if the diffusion concentration of impurities such as phosphorus is increased in order to reduce the gate resistance of wirings and transistors, there is a problem that the polycrystalline silicon layer forming the electrode of the capacitor is likely to have grains and the capacitance of the capacitor varies.

In view of such circumstances, an object of the present invention is to
It is an object of the present invention to provide a method of manufacturing a semiconductor device capable of manufacturing a semiconductor device having a small and highly accurate capacitor which is effective for reducing the area of an analog circuit of the semiconductor device and increasing the accuracy.

[0006]

A method of manufacturing a semiconductor device according to the present invention, which achieves the above object, is a method of manufacturing a semiconductor device having a capacitor formed on a semiconductor substrate and comprising a lower layer electrode, an insulating film and an upper electrode. In at least one of the lower layer electrode and the insulating film is made of a silicon-based material, and the surface thereof is etched and planarized by an isotropic etching method.

In the present invention, the silicon-based material means C
Polysilicon formed by VD (Chemical Vapor Deposition) method, single crystal silicon formed by epitaxial growth, conductive material such as metal silicide such as molybdenum silicide or tungsten silicide, or insulating material such as silicon oxide or silicon nitride It means a silicon compound or the like. Further, the polycrystalline silicon or the single crystal silicon may be doped with impurities.

In the present invention, one or both of the lower electrode of the capacitor and the insulating film may be made of a silicon material. For example, when a silicon-based material is used for the lower layer electrode, an insulating material such as silicon oxide, silicon nitride, tantalum oxide, zirconia oxide, or strontium titanate is used for the insulating film, and tungsten, aluminum, copper, or the like is used for the upper layer electrode. A metal film can be used. When an insulating silicon compound such as silicon oxide or silicon nitride is used for the insulating film, metal silicide or metal can be used for the upper electrode or the lower electrode.

In the present invention, the isotropic etching method means a gas phase etching method or the like which has no directivity so as to slowly supply the non-ionized active species without electrically accelerating them. It excludes anisotropic etching such as RIE (Reactive Ion Etching) method in which accelerated ions collide. Preferably, CF ₄ , SF ₆ , Cl ₂ , O ₂ or the like is used as the etching gas. In the vapor phase etching by RIE or the liquid phase etching using HF or the like, flattening of the surface of the thin film made of a silicon material is not recognized.

[0010]

According to the present invention, the surface of the lower electrode or the insulating film of the capacitor made of a silicon-based material is flattened by etching it by an isotropic etching method, thereby flattening the film surface and effectively insulating the insulating film. The variation in the surface area is reduced, and the thickness of the insulating film is made uniform.

[0011]

EXAMPLES The present invention will be described below based on examples.

(Embodiment 1) FIG. 1 is a sectional view showing steps of a method of manufacturing a semiconductor device according to an embodiment. First,
As shown in FIG. 1A, a field oxide film 12 having a film thickness of about 3000 Å is formed on an n-type Si (100) single crystal substrate 11 by thermal oxidation.
A polycrystalline silicon film 13 having a film thickness of 4000 Å to be a lower electrode is formed on the substrate 2 by the CVD method (step (a)). Subsequently, phosphorus is diffused in the polycrystalline silicon film 13 to have conductivity, and the resistivity of this film is lowered to 10 Ωcm or less. Next, the surface of the polycrystalline silicon film 13 is etched and planarized by an isotropic etching method.

This etching process will be described with reference to FIG. As shown in FIG. 2, a processing chamber 2 on which a processing substrate 1 to be processed is placed, a quartz tube 3 connected to the processing chamber 2 and serving as a plasma generation region, and a quartz tube 3 adjacent to the quartz tube 3 to generate microwaves. The surface of the processing substrate 1 is etched by introducing an etching gas into the processing chamber 2 through the quartz tube 3 using a vapor phase etching apparatus including the microwave waveguide 4. CF ₄ 10 is used as an etching gas.
0 sccm and 200 sccm of O ₂ were introduced, and the surface of the polycrystalline silicon film 13 was etched by about 500 Å under the condition that the output of the microwave waveguide 24 was 350 W.

When the surface of the polycrystalline silicon film 13 before and after this etching was observed with a scanning electron microscope (SEM), the results shown in FIG. 3 were obtained. FIG. 3A shows the surface state before etching, and FIG. 3B shows the surface state after etching. From these, it is clear that the surface of the polycrystalline silicon film 13 is flattened by the above etching.

Next, as shown in FIG. 1B, a thermal oxide film 14 having a film thickness of about 400 Å to be an interlayer insulating film is formed on the surface of the flattened polycrystalline silicon film 13. Then, a polycrystalline silicon film 15 having a film thickness of 4000 Å is formed on the thermal oxide film 14 by a CVD method, and phosphorus is diffused in the polycrystalline silicon film 15 so as to have conductivity and its resistivity is 10 Ωcm. Lower to

Next, as shown in FIG. 1C, the thermal oxide film 14 and the polycrystalline silicon film 15 are etched by lithography to form a capacitor region 16.

Finally, as shown in FIG. 1D, a passivation film 17 covering the capacitor region 16 is formed,
An opening was formed so that a part of the polycrystalline silicon film 15 to be the upper layer electrode was exposed. As a result, a capacitor as shown in FIG. 4 was formed. In FIG. 4, 17a is an opening formed in the passivation film 17. In addition, a part of the polycrystalline silicon film 13 serving as a lower layer electrode is also exposed through an opening (not shown). When the performance of the capacitor thus formed was measured by a vapor phase etching apparatus, the leakage current density was ⅕ compared to the case where the lower electrode surface was not flattened, and the variation in capacitance (relative precision variation in capacitance 3σ ) Was reduced to 1/10.

(Embodiment 2) FIG. 5 is a sectional view of an example of a capacitor in which an insulating film made of a silicon oxide layer is flattened by the method of the present invention. As shown in FIG. 5, also in this example, as in Example 1, first, n-type Si (100)
A field oxide film 52 and a polycrystalline silicon film 53 were formed on the single crystal substrate 51. Subsequently, a thermal oxide film 54 having a film thickness of about 450 Å was formed on the polycrystalline silicon 53. Next, using the etching apparatus shown in FIG.
_The surface of the thermal oxide film 54 was etched by about 50Å by ₄ radicals.

Thermal oxide film 5 before and after this etching
When the surface of No. 4 was observed by SEM, it was found that the surface shape was clearly flattened.

Next, a 4000 Å-thick polycrystalline silicon film 55 is formed on the flattened surface of the thermal oxide film 54 by the CVD method, and phosphorus is diffused in the polycrystalline silicon film 55 to have conductivity. To lower the resistivity to 10 Ωcm or less. Next, a capacitor region 56 is formed by lithography, then a passivation film 57 is formed, and an opening 57a is further formed to form a capacitor.

When the performance of the capacitor thus formed was measured by a vapor phase etching apparatus, the leakage current density was 1/2 and the variation in capacitance (relative to the capacitance) was compared with the case where the surface of the lower layer electrode was not flattened. Accuracy variation 3
σ) was reduced to 1/5.

(Embodiment 3) FIG. 6 is a sectional view of an example of a capacitor in which both the lower layer electrode made of a polycrystalline silicon film and the interlayer insulating film are flattened by the method of the present invention. Figure 6
As shown in FIG. 7, in the present embodiment as well, similarly to the first embodiment, first, the field oxide film 62 and the polycrystalline silicon film 63 were formed on the n-type Si (100) single crystal substrate 61.
This polycrystalline silicon film 63 is formed by the CVD method under the conditions that the use gas is SiH ₄ and PH 3, and the substrate temperature is 650 ° C.
It is formed to a film thickness of 4000 Å while doping phosphorus. Next, using the etching apparatus shown in FIG. 2, the polycrystalline silicon film 6 was formed by CF ₄ radicals in the same manner as in Example 1.
3 Surfaces were etched about 500Å.

When the surface of the polycrystalline silicon film 63 before and after this etching was observed by SEM, it was found that the surface shape was clearly flattened.

Then, a film thickness of about 4 is formed on the polycrystalline silicon 63.
A 50Å thermal oxide film 64 was formed. Next, using the etching apparatus shown in FIG. 2, the surface of the thermal oxide film 64 was etched by about 50 Å with CF ₄ radicals in the same manner as in Example 1.

Thermal oxide film 6 before and after this etching
When the surface of No. 4 was observed by SEM, it was found that the surface shape was clearly flattened.

Next, a polycrystalline silicon film 55 having a thickness of 4000 Å was formed on the surface of the flattened thermal oxide film 54 by the CVD method while doping phosphorus. Next, a capacitor region 66 is formed by lithography, then a passivation film 67 is formed, and an opening 67a is further formed to obtain a capacitor.

When the performance of the capacitor thus formed was measured by a vapor phase etching apparatus, the leakage current density was 1/8 and the variation in capacitance (relative to the capacitance) was compared to the case where the lower electrode surface was not flattened. Accuracy variation 3
σ) was reduced to 1/15.

(Embodiment 4) FIG. 7 is a sectional view of an example of a capacitor in which a lower electrode made of a metal silicide film is flattened by the method of the present invention. As shown in FIG. 7, also in this embodiment, as in the first embodiment, first, n-type Si (1
00) A field oxide film 72 was formed on a single crystal substrate 71, and a tungsten silicide film 73 having a thickness of about 3000 Å was formed on the field oxide film 72 as a lower electrode by a CVD method. Next, using the etching apparatus shown in FIG. 2, the surface of the tungsten silicide film 73 was etched by about 500 Å with CF ₄ radicals as in the first embodiment.

When the surface of the tungsten silicide film 73 before and after this etching was observed by SEM, it was found that the surface shape was clearly flattened.

Then, a silicon oxide film 74 having a film thickness of about 400 Å to be an interlayer insulating film is formed on the flattened tungsten silicide film 73 by a CVD method, and an aluminum thin film 75 having a film thickness of 2,000 Å to be an upper layer electrode is further sputtered. Formed by. Next, a capacitor region 76 is formed by lithography, then a passivation film 77 is formed, and an opening 77a is further formed to form a capacitor.

When the performance of the capacitor thus formed was measured by a vapor phase etching apparatus, the leakage current density was 1/2 and the variation in capacitance (relative to the capacitance) was compared with the case where the surface of the lower layer electrode was not flattened. Accuracy variation 3
σ) was reduced to 1/3, respectively.

(Embodiment 5) FIG. 8 is a sectional view of an example of a capacitor in which an insulating film made of a tantalum oxide film is flattened by the method of the present invention. As shown in FIG. 8, also in this embodiment, as in the first embodiment, first, n-type Si (10
0) A field oxide film 82 having a film thickness of about 3000 Å was formed on a single crystal substrate 81, a polycrystalline silicon film 83 having a film thickness of 4000 Å was further formed by a CVD method, and phosphorus was diffused into this film. Then, using the etching apparatus shown in FIG. 2, the surface of the polycrystalline silicon film 83 was flattened by approximately 500 Å with CF ₄ radicals in the same manner as in Example 1.

Next, the planarized polycrystalline silicon film 83
Approximately 650Å film thickness to be an interlayer insulating film by CVD method
Was formed on the tungsten oxide film 84, and an aluminum thin film 85 having a film thickness of 4000 Å to be an upper layer electrode was further formed on the tungsten oxide film 84 by sputtering. Next, a capacitor region 86 is formed by lithography, then a passivation film 87 is formed, and an opening 87a is further formed to obtain a capacitor.

When the performance of the capacitor thus formed was measured by a vapor phase etching apparatus, the leakage current density was 1/2 and the variation in capacitance (relative to the capacitance) was compared to the case where the lower electrode surface was not flattened. Accuracy variation 3
σ) was reduced to 1/5.

(Embodiment 6) FIG. 9 is a sectional view of an example of a capacitor in which an insulating film made of a silicon oxide film and a silicon nitride film is flattened by the method of the present invention. As shown in FIG. 9, also in this example, as in Example 1, first, the film thickness of about 30 was formed on the n-type Si (100) single crystal substrate 91.
A field oxide film 92 of 00Å is formed, and a film thickness of 4
A 000Å polycrystalline silicon film 93 was formed by the CVD method, and phosphorus was diffused into this film. Next, using the etching apparatus shown in FIG. 2, the surface of the polycrystalline silicon film 93 was flattened by about 500 Å with CF ₄ radicals in the same manner as in Example 1.

Next, the flattened polycrystalline silicon film 93 is formed.
A silicon oxide film 9 having a thickness of about 50Å is formed on the upper surface by the CVD method.
4a is formed, and a film thickness of about 3 is formed on the silicon oxide film 94a.
A 00Å silicon nitride film 93b was formed, and a silicon oxide film 94c having a film thickness of about 50Å was further formed on the silicon nitride film 94b to form an interlayer insulating film. A 4000 Å-thickness aluminum thin film 9 serving as an upper layer electrode is formed on the interlayer insulating film.
5 was formed by the sputtering method. Next, a capacitor region 96 is formed by lithography, then a passivation film 97 is formed, and an opening 97 is formed.
a was formed into a capacitor.

When the performance of the thus formed capacitor was measured by a vapor phase etching apparatus, the leakage current density was ⅕ compared with the case where the lower electrode surface was not flattened, and the variation in capacitance (relative to the capacitance) Accuracy variation 3
σ) was reduced to 1/10.

[0038]

As described above, according to the method of manufacturing a semiconductor device of the present invention, the surface of the lower electrode or the insulating film of the capacitor made of a silicon material is flattened by isotropic etching. It is possible to improve the accuracy of the IC capacitor capacitance without increasing the size and to reduce the area of digital and analog ICs.

[Brief description of drawings]

FIG. 1 is a sectional view showing a method for manufacturing a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a sectional view showing an example of a vapor phase etching apparatus used in an embodiment of the present invention.

3 is a scanning electron micrograph showing the surface shape of the lower electrode thin film before and after vapor phase etching in Example 1. FIG.

FIG. 4 is a cross-sectional view showing a capacitor structure created in Example 1.

5 is a cross-sectional view showing a capacitor structure created in Example 2. FIG.

FIG. 6 is a sectional view showing a capacitor structure created in Example 3;

FIG. 7 is a cross-sectional view showing a capacitor structure created in Example 4.

FIG. 8 is a sectional view showing a capacitor structure created in Example 5;

FIG. 9 is a cross-sectional view showing a capacitor structure created in Example 6;

[Explanation of symbols]

1 Processing Substrate 2 Processing Chamber 3 Quartz Tube (Plasma Generation Area) 4 Microwave Waveguide 11, 51, 61, 71, 81, 91 Single Crystal Substrate 12, 52, 62, 72, 82, 92 Field Oxide Film 13, 53 , 63, 83, 93 polycrystalline silicon film 14, 54, 64, 74, 84, 94a, 94c silicon oxide film 15, 55, 65, 85 polycrystalline silicon film 16, 56, 66, 76, 86, 96 capacitor region 17, 57, 67, 77, 87, 97 Passivation film 73 Tungsten silicide film 84 Tantalum oxide film 94b Silicon nitride film

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI Technical indication H01L 27/108

Claims (1)

[Claims] 1. A method of manufacturing a semiconductor device having a capacitor formed of a lower electrode, an insulating film and an upper electrode on a semiconductor substrate, wherein at least one of the lower electrode and the insulating film is made of a silicon material. A method of manufacturing a semiconductor device, characterized in that the surface thereof is etched and planarized by an isotropic etching method.