JPH07334930A - Reproducing device - Google Patents

Abstract

PURPOSE:To obtain a reproducing device which uses interleaved NRZI as recording signal and, at the time of reproduction, the output of reproducing amplifier is subjected to waveform transformation into a partial-response waveform by a decoder circuit using a delay line with T hours of a clock period. CONSTITUTION:The reproducing device uses reproduced signals before they are transformed into partial-response waveform PR (1, 0, -1) by a decoder circuit 6 to generate timing reproducing clocks and generates reproducing clocks by a detection circuit 4, a slicer circuit 5, a pulse edge detection circuit 7, and a PLL which consists of a phase comparison circuit PC13, a LPF14 and a VCO15. Thereby, exact reproducing clocks without being influenced by unbalanced recording patterns are generated. It is also possible to miniaturize the circuits because of the common use of the delay line of the decoder circuit 6 and that of the pulse edge detection circuit 7 and, at the same time, to prevent deterioration of the S/N ratio of the circuit.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital magnetic recording / reproducing apparatus for converting video signals and audio signals into digital signals and recording / reproducing them.

[0002]

2. Description of the Related Art Conventionally, in a digital magnetic recording / reproducing apparatus, a digital signal is recorded on a magnetic recording medium via a magnetic head, and during reproduction, an analog reproduction signal (hereinafter, simply referred to as a reproduction signal) is reproduced from the magnetic recording medium. Reproduction is performed via a magnetic head. At this time, various modulation / demodulation methods have been devised in order to improve the recording density and reduce the reproduction error rate.

In particular, in recent years, in order to achieve high-density digital recording, an interleaved NRZI code (hereinafter referred to as I-NRZI), which is less likely to be affected by a crosstalk signal reproduced from an adjacent track, has been attracting attention.

In the case of I-NRZI, the output of the reproduction amplifier is converted into a partial response waveform (hereinafter PR (1) by a waveform conversion circuit (hereinafter referred to as decoder circuit) using a delay line of a synchronization clock cycle and T time. , 0, -1).). Furthermore, this PR (1,0, -1)
Generates a synchronous clock for bit reproduction from and detects reproduction data (for example, H.Kobayashi DTTang "Appli
cation of Partial-response Channel Cording to
Magnetic Recording Systems "IBM J. RES.DEVELO
P JULY 1970. ).

Here, a conventional example of a reproducing apparatus based on PR (1, 0, -1) will be described with reference to FIG.

The signal reproduced from the magnetic recording medium 31 is
It is output to the reproducing amplifier 33 via the magnetic head 32, amplified to a certain amplitude, and input to the decoder circuit 34.
In the decoder circuit 34, the reproduction signal is PR (1,0,-
In order to convert into 1), the signal delayed by the clock period T time in the delay line 35 and the output of the reproduction amplifier 33 are added by the adder 36. Next, the output of the decoder circuit 34 is detected by the detection circuit 37 and input to the slicer circuit 38.

The operation of the decoder circuit 34 and the detection circuit 37 will be described with reference to FIG. FIG. 4 shows the reproduction signal converted by the decoder circuit 34 and the output of the detection circuit 37 obtained by detecting this signal. FIG. 4A shows a digital signal to be recorded on the magnetic recording medium, and FIG. Indicates the output of the reproduction amplifier 33 at this time. When (b) is input to the decoder circuit 34, the waveform of (c) is delayed by the delay line 35 by the clock period T, and is further added to (b) by the adder 36 and output as the waveform of (d). At this time, if the peak value of the waveform in (d) is held, (e)
Is obtained, and this is the detected waveform.

Next, in the slicer circuit 38, the detection circuit 37
The comparison reference level is determined based on the output of
It outputs a binary digital signal as compared with the output signal of No. 4.

The pulse edge detection circuit 39 includes a delay line 40.
And an exclusive OR circuit (hereinafter referred to as an EX-OR circuit).
41 of which the delay line 40 is a slicer circuit 38.
The digital signal output from is delayed by half the clock period T (T / 2). In addition, the EX-OR circuit 4
At 1, the output of the delay line 40 and the output of the slicer circuit 38 are EX-ORed and output to the phase comparison circuit 42 (hereinafter referred to as PC). In the PC 42, the voltage controlled oscillator circuit 44
(Hereinafter, referred to as VCO.) Phase comparison is performed with a clock output, a high-pass component is removed by a low-pass filter 43 (hereinafter, referred to as LPF), and then a VCO 44 performs LP.
A clock is generated according to the output signal of F43 (Japanese Patent Application No. 4-221054 "Timing reproduction device and auto slicer device").

Finally, in the reproduction data detection circuit 45,
The reproduced data is detected by the output clock of the VCO 44 and the output signal of the decoder circuit 34.

[0011]

In the conventional slicer circuit 3, the output of the decoder circuit 34 is detected by the detection circuit 37.
In the circuit configuration for determining the comparison reference level No. 8, the detection output varies depending on the data pattern, and the comparison reference level may not be determined in some cases.

That is, referring to FIG. 4, since the peak value of the waveform (d) changes depending on the data pattern of the recording signal (a), when this waveform is detected by the detection circuit 37, the peak value changes. Accordingly, the waveform fluctuates as shown in the waveform (e).

That is, since the detection output fluctuates due to the deviation of the data pattern, even if the comparison reference level of the slicer circuit 38 is determined based on the detection output of a certain specific data pattern, the recording data pattern exists at random. Therefore, this value cannot always be the optimum value. Therefore, it is very difficult to determine the optimum value of the comparison reference level from the detected output, and there arises a problem that the comparison is made at the shifted levels. In this case, the edge phase of the reproduction clock varies, reproduction data is detected at a point other than the normal bit synchronization, and the reproduction error rate decreases.

Originally, in order to accurately delay an analog signal, a considerably large circuit is required, which causes a cost increase. Moreover, the delay line usually has a larger circuit scale according to the delay amount, and at the same time, as the delay amount increases, the circuit S / N is deteriorated. Therefore, in the configuration in which the decoder circuit 34 delays the clock cycle T and the pulse edge detection circuit 39 delays T / 2 as shown in FIG. 3, the circuit scale becomes very large, resulting in cost increase and S / N. It causes deterioration and reduces the reproduction error rate.

The present invention has been made in view of the above point, and on the premise of PR (1, 0, -1), the detection output varies due to the above-mentioned deviation of the data pattern, and the comparison reference level is accurately determined. It is an object of the present invention to provide a reproducing device which does not cause such a problem and which is intended to reduce the size of a circuit and at the same time does not cause S / N deterioration.

[0016]

In order to achieve the above object, a reproducing apparatus of the present invention is a digital magnetic recording / reproducing apparatus for converting a video signal and an audio signal into a digital signal and recording / reproducing the same, which is a magnetic recording medium. Reproduction amplification means for amplifying the signal reproduced from the signal to a constant amplitude, waveform conversion means for converting the output of the reproduction amplification means into a partial response waveform, detection means for detecting the output waveform of the reproduction amplification means, and First comparison means for determining a comparison reference level based on the output of the detection means and comparing this level with the output of the reproduction amplification means, and a pulse for detecting an edge component of the pulse from the output of the first comparison means. Edge detection means, phase comparison means for detecting a phase error from the pulse edge detection means, and low-pass filter for removing unnecessary components from the output of the phase comparison means. When, in accordance with the output of the low pass filter, a clock generating means for generating a synchronous clock,
A reproduction data detecting means for detecting reproduction data from the output of the waveform converting means and the output of the clock generating means is provided.

[0017]

Since the reproducing apparatus of the present invention can determine the optimum comparison reference level without being influenced by the bias of the data pattern of the reproduction signal, the comparison reference level is shifted as in the conventional example,
There is no reduction in the reproduction error rate. In addition, PR (1,
Since the delay line of the 0, -1) decoder and the delay line of the clock component detection circuit can be shared, the circuit can be downsized and the deterioration of the circuit S / N can be prevented at the same time.

[0018]

EXAMPLES Examples of the reproducing apparatus according to the present invention will be described below.
A description will be given with reference to the drawings.

FIG. 1 is a block diagram of essential parts of a reproducing apparatus according to the present invention. Video signals and audio signals are converted into digital signals and recorded on the magnetic recording medium 1 by I-NRZI. A reproduction signal reproduced from the magnetic recording medium 1 via the magnetic head 2 is input to the reproduction amplifier 3 where the amplitude is amplified to a certain level.

Next, the output of the reproduction amplifier 3 is detected by the detection circuit 4 and input to the slicer circuit 5. The slicer circuit 5 determines the comparison reference level based on the output of the detection circuit 4,
A binary digital signal is output as compared with the output of the reproduction amplifier 3.

Here, the waveform of the detection circuit 4 will be described with reference to FIG. (A) shows the digital signal to be recorded on the magnetic recording medium 1, and (b) shows the output waveform of the reproducing amplifier 3 at this time. Even if the recording waveform changes as shown in (a), the waveform (b The peak value of) is almost constant. Therefore, the output (c) of the detection circuit 4 hardly changes, and a constant detection output can be supplied to the slicer circuit 5.

That is, since the detection output does not change regardless of the data pattern, the comparison reference level of the slicer circuit 5 can be easily determined based on this. That is,
Even for a random recording data pattern, this comparison reference level is always the optimum value, and comparisons will not occur at different levels.

Therefore, there is no problem that the edge phase of the reproduction clock varies and the reproduction data is detected at a point other than the normal bit synchronization to cause a reduction in the reproduction error rate.

Next, returning to FIG. 1, the pulse edge detection circuit 7 comprises a delay line 8, a slicer circuit 11 and an EX-OR circuit 12, of which the delay line 8 is the reproduction output from the reproduction amplifier 3. The signal is transmitted for half the clock period T (T
/ 2), and further converted into a binary digital signal by the slicer circuit 11. Further, the EX-OR circuit 12 performs an EX-OR between the output of the slicer circuit 5 and the output of the slicer circuit 11 to detect a waveform that can be compared in phase with the clock output from the VCO 15.

Next, in the PC 13, the EX-OR circuit 12
And the output of the VCO 15 are compared in phase, and an error signal corresponding to the phase difference is output to the LPF 14. Furthermore, LP
After separating unnecessary components of high frequency in F14, VCO1
At 5, a clock is generated according to the output of the LPF 14.

The decoder circuit 6 has a T / 2 time delay line 8,
PR (1,0, -1) by adding the reproduction signal delayed by the total delay amount T time (clock cycle) of the two delay lines to the output of the reproduction amplifier 3 by the adder 10.
Convert to.

In this case, the delay line 8 is shared with the pulse edge detection circuit 7, but the delay amount of the decoder circuit and the pulse edge circuit, which originally required T and T / 2 hours respectively, is shared with the delay line 8. Therefore, the total delay amount T of the delay lines 8 and 9 is sufficient.
The delay is reduced by 2 hours. That is, since the circuit scale of the analog delay line is significantly larger than that of the slicer circuit, the pulse edge detection circuit 7 and the slicer circuit 11 are
However, the circuit scale of the entire circuit is reduced, and since it does not pass through an extra delay line, the circuit S / N is not lowered.

Finally, the reproduction data detection circuit 16 detects reproduction data from the output clock of the VCO 15 and the output signal of the decoder circuit 6 which are in phase synchronization.

[0029]

As described above, according to the reproducing apparatus of the present invention, the optimum comparison reference level can be determined without being influenced by the deviation of the data pattern of the reproduced signal, and therefore the comparison can be made as in the conventional example. There is no problem that the reference level shifts and the reproduction error rate decreases.

Further, since the delay line of the PR (1, 0, -1) decoder circuit and the delay line of the clock component detection circuit can be shared, the circuit can be downsized, and at the same time, the circuit S /
It is possible to prevent the deterioration of N.

[Brief description of drawings]

FIG. 1 is a block diagram of essential parts showing a configuration of a reproducing apparatus according to an embodiment of the present invention.

FIG. 2 is a waveform chart showing the timing of the reproducing apparatus in the embodiment.

FIG. 3 is a block diagram of a main part showing the configuration of a conventional playback device.

FIG. 4 is a waveform diagram showing the timing of a conventional playback device.

[Explanation of symbols]

 3 reproduction amplifier 4 detection circuit 5,11 slicer circuit 6 decoder circuit 7 pulse edge detection circuit 8, 9 delay line 10 adder 12 EX-OR circuit 13 phase comparison circuit 14 low-pass filter 15 voltage control oscillation circuit 16 reproduction data detection circuit

Claims (2)

[Claims] 1. A digital magnetic recording / reproducing apparatus for converting a video signal and an audio signal into a digital signal and recording / reproducing the signal, wherein the reproducing / amplifying means amplifies the signal reproduced from the magnetic recording medium to a constant amplitude. Waveform conversion means for converting the output of the reproduction amplification means into a partial response waveform, detection means for detecting the output waveform of the reproduction amplification means, and a comparison reference level determined based on the output of the detection means, and this level First comparing means for comparing the output of the reproduction amplifying means, pulse edge detecting means for detecting an edge component of a pulse from the output of the first comparing means, and phase for detecting a phase error from the pulse edge detecting means Comparing means, a low-pass filter for removing unnecessary components from the output of the phase comparing means, and a synchronous clock according to the output of the low-pass filter. A clock generating means for generating a, the output of the clock generating means and the output of the waveform converting means, reproducing apparatus, characterized in that it is composed of a playback data detecting means for detecting the reproduced data. 2. The waveform converting means delays the output of the reproduction amplifying means for the time of a half cycle of the synchronous clock, and the output of the first delay means further delays the time of a half cycle of the synchronous clock. The second delay means and the addition means for adding the output of the second delay means to the output of the reproduction amplification means, and the pulse edge detection means uses the output of the first delay means as a reference level. 2. A second comparing means for comparing, and an arithmetic means for taking an exclusive OR of the output of the first comparing means and the output of the second comparing means. Playback device.