JPH07333292A - Transistor characteristics evaluating apparatus - Google Patents

Abstract

PURPOSE:To obtain a wide dynamic range and to rapidly measure by providing a square wave generator connected to a gate electrode and a logarithmic amplifier connected to a source (or a drain) electrode. CONSTITUTION:A predetermined voltage Vd is applied from a constant-voltage power source 6 to the drain electrode DO (or the source electrode SO) of a transistor to be inspected, and a square wave such as a sawtooth wave, etc., is input from a square wave generator 7 to the gate electrode GE. The waveform obtained from the electrode SO (or the electrode GE) is measured by a logarithmic amplifier 8 having a large dynamic range. Thus, the transistor characteristics of the extremely wide fine current range of a measuring range can be accurately measured by special calculation and evaluated. Accordingly, this apparatus can be applied to the evaluation of a thin film transistor which is required for the six digit or more dynamic range in a fine current range like the dynamic characteristics of the thin film transistor for a liquid crystal display unit.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a field effect transistor, and more particularly to a device for measuring and evaluating dynamic characteristics of a thin film transistor used in a liquid crystal display device.

[0002]

2. Description of the Related Art Since a thin film transistor has a feature that it can be easily formed on a glass substrate, its importance as a switching element of a liquid crystal display device has recently been rapidly increasing. FIG. 6 shows a configuration example of an equivalent circuit of an active matrix liquid crystal display device using thin film transistors as switch elements. In FIG. 6, a large number of gate lines G1, G2, ..., Gn and a large number of source lines S1,
S2, ..., Sm are wired in a matrix form, each gate wiring G is connected to the scanning circuit 1, each signal wiring S is connected to the signal supply circuit 2, and a thin film transistor (switch element) 3 is provided at the intersection of each line. A circuit is formed by connecting the storage capacitor portion 4 serving as a capacitor and the liquid crystal element 5 to the drain electrode of the thin film transistor 3.

FIG. 7 and FIG. 8 show an example of the structure of a thin film transistor array substrate in the conventional active matrix liquid crystal display device shown in the equivalent circuit of FIG. 6 in which parts such as gate wiring G and source wiring S are provided on the substrate. Is shown. In the thin film transistor array substrate shown in FIGS. 7 and 8, the gate wiring G is formed on the transparent substrate 6 such as glass.
And the source lines S are arranged in a matrix.
Further, the thin film transistor 3 is provided near the intersection of the gate line G and the source line S. Then, another substrate is arranged so as to face the active matrix display substrate, and liquid crystal is sealed between the two substrates to form a liquid crystal display device.

The thin film transistor 3 shown in FIGS. 7 and 8 has a general structure of an etch stopper type, and a gate insulating film 9 is formed on a gate wiring G and a gate electrode 8 drawn from the gate wiring G. Provided, this gate insulating film 9
A semiconductor film 10 made of amorphous silicon (a-Si) is provided on the semiconductor film 10, and a drain electrode 11 and a source electrode 12 made of a conductive material are provided on the semiconductor film 10 so as to face each other. An ohmic contact film 10a of ion-doped amorphous silicon or the like is formed on the uppermost layer of the semiconductor film 10, and an etching stopper 13 is formed on the ohmic contact film 10a sandwiched between the drain electrode 11 and the source electrode 12. There is. The gate electrode 8 has a double structure composed of an upper layer gate insulating film 8a and a lower layer gate wiring 8b, and is made of a transparent electrode material from above the drain electrode 11 to the lateral side of the drain electrode 11. The transparent pixel electrode 15 is formed.

Further, a passivation film 16 is provided on the gate insulating film 9, the transparent pixel electrode 15, the source electrode 12, etc. so as to cover them. An alignment film (not shown) is formed on the passivation film 16, and liquid crystals are provided above the alignment film to form an active matrix liquid crystal display device.
By applying an electric field to the liquid crystal molecules, the orientation of the liquid crystal molecules can be controlled.

By the way, FIG. 9 is an explanatory view showing the channel length in the thin film transistor array substrate having the structure shown in FIG. 7 and FIG. The channel portion means a portion between the source and drain in the semiconductor film 10 where carriers move. In this structure, if the processing dimension showing the minimum process pattern is S and the process margin is ΔL,
The channel length L = S + 2ΔL. The arrows in the semiconductor layer 10 in FIG. 9 indicate carrier movement paths.

Next, FIG. 10 shows a channel protection film type thin film transistor array substrate. In the structure of this example, an ohmic contact preliminary film is laminated on a semiconductor film 10 'and a source electrode 12' is formed thereon. Drain electrode 1
After forming 1 ′, the ohmic contact preliminary film is etched using these as a mask to form ohmic contact films 10a ′ and 10a ′, and the protective film 1 is formed thereon.
6'is formed. In this structure, the distance between the source and drain is the channel length L.
Becomes The arrow in the semiconductor layer 10 'of FIG. 10 indicates the carrier movement path.

[0008]

By the way, in developing the above-mentioned thin film transistor, it is necessary to understand its electrical characteristics accurately. In particular, the drain current characteristic with respect to the gate voltage (Id-Vg characteristic) is widely used as a measurement item for obtaining an important parameter. Conventionally, a dedicated measuring device has not been found for measuring the Id-Vg characteristic, and therefore, a device for measuring static characteristics developed for a single crystal silicon FET (field effect transistor) has been used instead. A measuring device and a measuring method using this device will be outlined below.

In the drain DO of the thin film transistor 1 having the structure shown in FIG. 11, 1 pA to 1 mA or more (1 × 10 ⁻⁹
A to 1 × 10 ⁻³ A) A constant voltage power source 3 for generating a drain voltage is connected via a measurable minute ammeter 2. Next, the gate GE of the thin film transistor 1 is connected to a power supply 4 capable of varying the voltage in a ramp shape or a step shape, and the source SO is grounded. Id-Vg was measured by using the device configured as described above.
To measure the characteristics, the gate voltage is swept at about 1 V / sec or slower than that and the drain current is measured by the minute ammeter 2.

However, since the minute ammeter 2 has to measure a minute current and has a wide measurement range (for example, a range of 1 pA to 1 mA and a measurement range of 6 digits or more is required), the current integration / Since the amplifier gain needs to be switched, there is a problem that high-speed sweep cannot be performed. For example, using the device having the above structure, the structure as shown in FIG.
FIG. 12 shows the results of static characteristics obtained with the width (W) / channel length (L) of the i-semiconductor film 10 (region between the source and drain) = 12/7 and Vd = 11V. However, in the device having the above structure, the dynamic characteristics cannot be measured, so that 10 to 20 mse which is important in the application to the liquid crystal display device.
Since the off characteristics of the TFT in the region c cannot be grasped, a device capable of sweeping at a high speed to measure the dynamic characteristics has been desired.

On the other hand, it is generally known that the leak current (Ioff) when the TFT is off, which is an important parameter of the thin film transistor, has different static characteristics and dynamic characteristics. For example, T. Motai et al. Have announced that the source follower load resistance at the time of turning on and off the TFT is switched in synchronization with the gate pulse to evaluate the dynamic characteristics. (T.Mo
tai et-al "Dinamic Characteristics of Off-State Am
orphous-Silicon ThinFilm Transistors ", TECHNICAL D
IGEST Japan-Korea Joint Symposium onInformationDis
play, Oct. 1991.)

However, this method requires one each for ON and OFF.
It is a measurement of drain current only at points,
It was not a method capable of completely measuring the dynamic characteristics of the Id-Vg characteristics of thin film transistors. That is, since the static characteristic and the dynamic characteristic of the thin film transistor are different, the measurement of the dynamic characteristic is an important point when considering the operation in an actual environment. However, in order to realize the measurement of the dynamic characteristics, there has been a problem that a high speed measurement technique corresponding to a wide dynamic range of 6 digits or more is required in addition to realizing the high speed measurement of the minute current.

The present invention has been made in view of the above circumstances. Since a wide dynamic range can be secured and high-speed measurement can be performed, dynamic characteristics of Id-Vg characteristics of a transistor can be evaluated, and parasitic capacitance occurs in the thin film transistor. However, it is an object of the present invention to provide a transistor characteristic evaluation device capable of canceling out this influence and performing higher speed and more accurate measurement.

[0014]

According to a first aspect of the present invention, in order to solve the above problems, in a transistor characteristic evaluation device including a drain electrode, a source electrode, and a gate electrode, a prism connected to the gate electrode is used. It comprises a wave generator, a power supply connected to either the drain electrode or the source electrode, and a logarithmic amplifier connected to either the source electrode or the drain electrode not connected to the power supply. is there.

According to a second aspect of the present invention, in order to solve the above-mentioned problems, in the transistor characteristic evaluation device according to the first aspect, an inverting amplifier for applying a reverse phase voltage of a gate voltage for driving a transistor is an input of a logarithmic amplifier. It is connected to the terminal via a capacitor.

According to a third aspect of the present invention, in order to solve the above-mentioned problems, the transistor characteristic evaluation apparatus according to the second aspect is configured so that a compensation transistor having the same structure as the transistor under measurement is incorporated as a capacitance. is there.

According to a fourth aspect of the present invention, in order to solve the above problems, the transistor according to the first, second or third aspect is a thin film transistor formed at a crossing portion of a gate wiring and a source wiring formed on a transparent substrate. It was done.

According to a fifth aspect of the present invention, in order to solve the above problems, in the transistor characteristic evaluation device according to the fourth aspect, the gate electrode and the source electrode of the thin film transistor are insulated from each other through an insulating film, and the gate electrode and the source are insulated from each other. The insulating layer between the electrodes serves as a parasitic capacitance.

[0019]

Function: A predetermined voltage is applied from the power supply to the drain electrode or the source electrode of the transistor, and a square wave from the square wave generator is input to the gate electrode, which is obtained from the source electrode or the drain electrode to which the power supply is not connected. Since the waveform is measured with a logarithmic amplifier with a large dynamic range, the transistor characteristics in a very small current range with an extremely wide measurement range can be accurately measured and evaluated without any special arithmetic processing. Therefore, the device of the present invention can be applied to the dynamic characteristic evaluation of a transistor which requires a dynamic range of 6 digits or more in a minute current region, such as measurement of dynamic characteristics of thin film transistors for liquid crystal display devices.

Next, when it is necessary to measure in a wide dynamic range in a minute current region in a thin film transistor for liquid crystal display devices in which a parasitic capacitance is added between a gate electrode and a source electrode, a logarithmic amplifier is used. An inverting amplifier that inverts and outputs the output of the square wave generator is connected to the input side, and the waveform from this inverting amplifier is input to the logarithmic amplifier via the compensation capacitor to compensate for the coupling current component due to parasitic capacitance. Then, the transistor characteristics can be canceled, which enables accurate evaluation of the transistor characteristics. The compensation capacitance may be adjusted by operating the transistor with the drain electrode of the transistor open so that the output of the logarithmic amplifier is minimized. In addition, since the influence of parasitic capacitance can be eliminated, 5
The measurement accuracy is improved up to the measurement frequency limit of about 0 Hz.

Further, in order to completely remove the coupling current component due to the parasitic capacitance and perform more accurate measurement, a compensation transistor having the same structure as the transistor to be measured is incorporated in place of the compensation capacitance. The inverted waveform of the waveform sent from the inverting amplifier is input to the logarithmic amplifier side through the compensation transistor. Further, the gain of the inverting amplifier at this time is set to 1, and the adjustment can be easily performed.

[0022]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a first evaluation device according to the present invention.
An example is shown, and the device of this example has a drain electrode D
The drain electrode DO is connected to the thin film transistor 1 having O, the source electrode SO, and the gate electrode GE.
Constant-voltage power supply 6 for drain connected to the gate and a square wave generator 7 such as a sawtooth wave connected to the gate electrode GE
And a logarithmic amplifier 8 connected to the source electrode SO. Further, in each of the drain power source 6, the square wave generator 7 such as a sawtooth wave, and the logarithmic amplifier 8, the pole not connected to the thin film transistor 1 is grounded.

The measurement band of the logarithmic amplifier 8 is usually 1
TFT of a practical size, although it is in the range of 10 ⁻⁹ to 1 × 10 ⁻³ A
^Has an off current of approximately 1 × 10 ⁻¹³ to 10 ⁻¹² A and an on current of 1
× 10 ⁻⁶ to 10 ⁻⁵ A. To fill this gap, the channel width (W) / channel length (L) of the TFT to be measured needs to be about 1000 times the practical size. For example, the relationship of W / L = 8640 μm / 7 μm can be set. However, it is preferable to make W variable so that this value does not affect the process due to the increase in the TFT size. Since the drain current and the source current are equal to each other, the logarithmic amplifier 8 may be connected to either the source electrode SO side or the drain electrode DO side, but in this embodiment, the logarithmic amplifier 8 is connected to the source electrode SO side. The voltage level of the sawtooth wave is, for example, -20 to 2
It can be set to 0V, but this may be changed as appropriate according to the gate voltage level to be observed.

Using the above device, W / L = 8640 μm /
A channel protection film type thin film transistor array substrate having a relationship of 7 μm is used, and the voltage level of the sawtooth wave is −2.
The Id-Vg characteristic was measured under a sweep condition of 0 to 20 V and 2 Hz. The result is shown in FIG. As is clear from FIG. 2, it is apparent that the region of 10 to 20 msec required by the TFT in the application to the liquid crystal display device can be sufficiently grasped.

By the way, in the first embodiment, the constant voltage power source 6 is connected to the drain electrode DO and the source electrode S
Although the logarithmic amplifier 8 is connected to O, the logarithmic amplifier 8 may be connected to the drain electrode DO and the constant voltage power source 6 may be connected to the source electrode SO. With this configuration, the Id-Vg characteristic of the transistor 1 can be measured as in the case of the first embodiment.

FIG. 3 shows a second embodiment of the evaluation apparatus according to the present invention. In the apparatus of this embodiment, the first embodiment described above is used.
The same structures as those in the embodiment are designated by the same reference numerals, and the description of those parts will be omitted. The device of this example differs from the device of the first embodiment described above in that a line 10 connecting the gate electrode GE and the square wave generator 7 and a line 11 connecting the source electrode SO and the logarithmic amplifier 8 are connected. The point is that an inverting amplifier 12 and a compensation capacitor 13 are incorporated between them.

Normally, when a thin film transistor array substrate having a structure as shown in FIG. 9 or 10 is constructed, an insulating film interposed between the source electrode SO and the gate electrode GE constitutes a capacitance, and this capacitance is shown in FIG. Such parasitic capacitance 14 is added to the circuit. This parasitic capacitance 14
Is the coupling of the gate voltage to the source. Therefore, the measurement frequency limit (fma
x) is defined, and this measurement frequency limit is expressed by the following equation. fmax = 1 / (2π ・ Roff ・ Cgs)

However, Roff is the off resistance of the thin film transistor (about 1E10Ω), and the parasitic capacitance Cgs is about 5 p.
F (1000 times the practical size), and the measurement frequency limit is about 3 Hz. Therefore, the measurement frequency is set to 2 in the measurement of the first embodiment in accordance with the value of this measurement frequency limit.
It is set to Hz. On the other hand, in the structure of the second embodiment, the measurement frequency limit can be raised to about 50 Hz.

That is, as shown in FIG. 3, by adjusting the gain of the inverting amplifier 12 incorporated in the circuit and the capacitance value of the compensation capacitor 13, a current having a phase opposite to the current flowing by the coupling is generated to cancel the current. You can This adjustment may be performed with the drain electrode DO of the thin film transistor 1 open, so that the output of the logarithmic amplifier 8 becomes the minimum. As a result, in the structure of the second embodiment, the measurement frequency limit can be raised to about 50 Hz.

FIG. 4 shows a third embodiment of the evaluation apparatus according to the present invention. In the apparatus of this embodiment, the above-mentioned second embodiment is used.
The same structures as those in the embodiment are designated by the same reference numerals, and the description of those parts will be omitted. The device of this example is different from the device of the second embodiment described above in that a compensation thin film transistor 15 having the same structure as the thin film transistor 1 is provided instead of the compensation capacitor 13. The drain electrode DO1 of the compensation thin film transistor 15 is connected to the output side of the inverting amplifier 12, the gate electrode GE1 is connected to the input side of the logarithmic amplifier 8, and the source electrode SO1 is open.

The parasitic capacitance 14 generally has voltage dependency. Therefore, as in the second embodiment, the compensation capacitor 12 is simply used.
In some cases, it may not be possible to completely compensate by just providing. In such a case, the structure of the third embodiment is effective. According to the structure of this example, the deviation can be completely compensated by the coupling of the parasitic capacitance 14, and the measurement accuracy in the minute current region is improved. Further, in this structure, the compensation thin film transistor 15 has the same structure as the thin film transistor 1, and the same parasitic capacitance as that generated in the thin film transistor 1 also occurs in the compensation thin film transistor 15. Therefore, the gain of the inverting amplifier 12 is set to 1. Thus, the parasitic capacitance of the thin film transistor 1 can be compensated and the adjustment can be easily performed.

FIG. 5 shows a triangular waveform generated by the square wave generator 7 and Id-Vg obtained when this waveform is input.
Show the characteristics. As described above, the wave generated by the square wave generator 7 may be a sawtooth wave, a triangular wave, or any other square wave.

[0033]

As described above, the present invention applies a predetermined voltage from a constant voltage source to the drain electrode or source electrode of a transistor, inputs a square wave from a square wave generator to the gate electrode, and supplies the source electrode with a square wave. Alternatively, since the waveform obtained from the gate electrode is measured by a logarithmic amplifier having a large dynamic range, it is possible to accurately measure and evaluate the transistor characteristics in a very small current region having a very wide measurement range without performing special calculation processing. Therefore, the device of the present invention can be applied to the evaluation of thin film transistors which require a dynamic range of 6 digits or more in a minute current region, such as measurement of dynamic characteristics of thin film transistors for liquid crystal display devices.

Next, when it is necessary to measure the characteristics in a wide dynamic range in a minute current region in a thin film transistor for a liquid crystal display device in which a parasitic capacitance is added between a gate electrode and a source electrode, logarithm is used. An inverting amplifier that inverts and outputs the output of the square wave generator is connected to the input side of the amplifier, and the waveform from this inverting amplifier is input to the logarithmic amplifier via the compensation capacitance to reduce the coupling current component due to the parasitic capacitance. Can be compensated and cancelled, which enables accurate measurement. The compensation capacitance may be adjusted by operating the transistor with the drain electrode of the transistor open so that the output of the logarithmic amplifier is minimized. Further, since the influence of the parasitic capacitance can be eliminated, the measurement accuracy is improved up to the measurement frequency limit of about 50 Hz which is usually allowed for the logarithmic amplifier.

Further, in order to completely remove the coupling current component due to the parasitic capacitance and perform more accurate measurement, a compensation transistor having the same structure as the transistor to be measured is incorporated in place of the compensation capacitance. The inverted waveform of the waveform sent from the inverting amplifier is input to the logarithmic amplifier side through the compensation transistor. At this time, the parasitic capacitance generated in the compensation thin-film transistor and the parasitic capacitance generated in the thin-film transistor to be measured have the same value, so the gain of the inverting amplifier can be set to 1, and its adjustment can be performed easily and easily measured. You can

[Brief description of drawings]

FIG. 1 is a first transistor characteristic evaluation device according to the present invention.
It is a circuit diagram which shows an Example.

FIG. 2 is a diagram showing a result of measurement of dynamic characteristics of Id-Vg characteristics at 2 Hz using the device of the present invention.

FIG. 3 shows a second transistor characteristic evaluation device according to the present invention.
It is a circuit diagram which shows an Example.

FIG. 4 is a third embodiment of the transistor characteristic evaluation device according to the present invention.
It is a circuit diagram which shows an Example.

FIG. 5 is a diagram showing an example of a square wave used in the transistor characteristic evaluation apparatus according to the present invention and a waveform obtained by measurement.

FIG. 6 is a diagram showing an equivalent circuit of a general liquid crystal display device.

FIG. 7 is a plan view showing a structural example of a general active matrix display substrate.

FIG. 8 is a cross-sectional view showing the main parts of a structural example of a general active matrix display substrate.

FIG. 9 is a cross-sectional view showing a channel portion and a channel length of the one structural example.

FIG. 10 is a cross-sectional view showing a channel portion and a channel length of another structural example of a general active matrix display substrate.

FIG. 11 is a circuit diagram showing an example of a conventional transistor characteristic evaluation device.

FIG. 12 is a diagram showing static characteristics of Id-Vg characteristics measured by a conventional measuring device.

[Explanation of symbols]

 1 Thin Film Transistor 6 Power Supply 7 Square Wave Generator 8 Logarithmic Amplifier 12 Inverting Amplifier 13 Compensation Capacitance 14 Parasitic Capacitance 15 Compensation Thin Film Transistor GE Gate Electrode SO Source Electrode DO Drain Electrode

Claims (5)

[Claims] 1. A device for evaluating characteristics of a transistor comprising a drain electrode, a source electrode and a gate electrode, wherein a square wave generator connected to the gate electrode and a power source connected to either the drain electrode or the source electrode. And a transistor characteristic evaluation device comprising a logarithmic amplifier connected to a source electrode or a drain electrode to which the power source is not connected. 2. The transistor characteristic evaluation device according to claim 1, wherein an inverting amplifier that applies a reverse phase voltage of a gate voltage that drives the transistor is connected to an input terminal of a logarithmic amplifier via a capacitor. Transistor characteristics evaluation device. 3. The transistor characteristic evaluation device according to claim 2, wherein a compensation transistor having the same structure as the transistor under measurement is incorporated as a capacitance. 4. A transistor characteristic evaluation device, wherein the transistor according to claim 1, 2 or 3 is a thin film transistor formed at an intersection of a gate wiring and a source wiring formed on a transparent substrate. 5. The transistor characteristic evaluation device according to claim 4, wherein the gate electrode and the source electrode of the thin film transistor are insulated via an insulating film, and the insulating layer between the gate electrode and the source electrode serves as a parasitic capacitance. A transistor characteristic evaluation device characterized by the above.