JPH07321462A - Target mark forming method of multilayer printed wiring board - Google Patents

Abstract

PURPOSE:To accurately achieve positioning by forming a cut-out which is larger than a target mark at an inner-layer copper-clad lamination plate directly below the target mark, laminating an outer-layer lamination plate as a multilayer lamination plate, and then performing copper-plating to an outer-layer circuit pattern and the target mark. CONSTITUTION:An inner-layer copper-clad lamination plate 56 and an outer-layer lamination plate 50 are formed by laminating copper foils 60 and 54 on one surface of semi-transparent insulation substrates 58 and 52. A circuit pattern 62 is formed at the inner-layer lamination plate 56 by photoetching. A clearance 66 which is cut larger than a mark 70 is formed on the pattern 62, directly below a target mark 70 formed at the outer-layer lamination plate 50. A multilayer lamination plate 74 is formed while sandwiching an insulation layer 72 between the inner-layer lamination plate 56 and the outer-layer lamination plate 50. An outer-layer circuit pattern consisting of a land 68A, a target mark 70A, etc., is formed at the multilayer lamination plate 74. Then, a copper-plated layer 76 and a pre-flux layer 78 are formed on the pattern, thus achieving an accurate positioning.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming a target mark on a multilayer printed wiring board which is read by an image processing device provided in an automatic mounting machine and serves as a reference for determining a component mounting position.

[0002]

2. Description of the Related Art Recently, miniaturization and high integration of electronic parts are rapidly progressing. For example, in ICs and LSIs, surface mountable ICs (FICs, PLCCs, etc.) have been put into practical use, and flat package ICs with pins (leads) provided on four sides of the package as the functionality of LSIs has advanced.
(QFP) is spreading.

Particularly, the arrangement pitch of pins is narrow (for example, 0,
About 5 mm) ICs and LSIs must be able to be mounted with high precision by an automatic mounting machine. Therefore, conventionally, an image recognition device reads the component mounting position of the printed wiring board, that is, the position of the land and the pin (or lead) position of the component,
The pin (or lead) and the land are aligned with high precision.

Next, the mounting process by the automatic mounting machine will be described. FIG. 4 is a diagram showing a circuit pattern on the printed wiring board side on which the QFP type IC is mounted, and FIG. 5 is a diagram showing a mounting process by an automatic mounting machine. A large number of IC mounting lands 12 are formed on the printed wiring board 10, and a pair of target marks 14 and 16 are formed on a diagonal line B passing through the center A of the IC mounting position.

The target marks 14 and 16 are formed in a circular shape in the same process as the land 12. That is, first, a circuit pattern including the lands 12 and the target marks 14 and 16 is formed on the copper clad laminate using a known photoetching technique. A through hole may be formed if necessary.

A large number of ICs 18 are supplied from a tray 20 as shown in FIG. 5, and a first robot (not shown) selects one IC 18 from this tray 20 and transfers it to the rough positioning station 22. IC1 at this station 22
Rough positioning is performed by sandwiching the outer shape of 8 with four claws.

Then, a second robot (not shown)
The C18 is sucked by a suction head (not shown) and is carried to the mounting position of the printed wiring board 10. At this time, the second robot uses the two CCD cameras 24 provided on the transfer path,
An image of the lead of the IC 18 adsorbed on the adsorption head is image-recognized by 26 and its position is detected and stored.

The suction head of the second robot has a CCD camera (not shown) for recognizing the image of the target marks 14 and 16, and when carrying the IC 18 to the mounting position,
The marks 14 and 16 are sequentially image-recognized and the center A on the diagonal line B connecting the centers thereof is calculated. The lead of the IC 18 is accurately aligned with the land 12 while the center of the IC 18 is aligned with the center A.

Here, conventional target marks 14 and 16 are used.
Was manufactured in the same process as the circuit pattern of the land 12 and the same post-processing was performed. There are a solder coat treatment method and a preflux treatment method as a method of the subsequent treatment.
The solder coat treatment method is a method in which a substrate is immersed in a molten solder bath and hot air is blown when the substrate is lifted from the solder bath to blow off unnecessary solder (called hot air leveling). In the pre-flux treatment method, after a substrate is plated with copper, a liquid (flux) containing alkylbenzimidazole as a main component is applied to the entire surface in order to prevent copper oxidation.

[0010]

[Problems of the prior art] In the solder coating method, since unnecessary solder is blown off by hot air, a uniform solder thickness cannot be obtained, and uneven surfaces are formed on the surfaces of the target marks 14 and 16. Therefore, when the image is read by the CCD camera, diffuse reflection of light occurs, and the image reading becomes inaccurate. Particularly, in the case of circular target marks 14 and 16, the read image does not become a perfect circle, and the center coordinates thereof are incorrect. As a result, the component leads are displaced, so that it is necessary for the operator to correct the alignment.

In the pre-flux treatment method, the copper plating surface is smooth, and the pre-flux treatment film is transparent and sufficiently thin (several μm), so that the entire substrate 10 including the target marks 14 and 16 is extremely smooth. Therefore, in the case of a printed wiring board having no inner layer circuit, the marks 14, 1
The image recognition of No. 6 can also be performed satisfactorily.

However, since the printed wiring board used here usually uses a semi-transparent insulating substrate such as glass epoxy resin, when it is formed in multiple layers, the copper foil of the circuit pattern of the inner layer appears to overlap the target mark. Become. Further, the copper-plated target mark has a reduced contrast with its surroundings due to the pre-flux treatment, and the image contrast ratio with the copper foil of the inner layer circuit pattern is also reduced. Therefore, when the inner layer circuit pattern overlaps under the target mark, the outer shape of the target mark cannot be accurately recognized when the image is read by the CCD camera, and accurate mounting of components cannot be performed.

Therefore, conventionally, it has been necessary to scrape off the transparent film of the pre-flux adhering to the target mark to expose the underlying copper plating layer and to increase the contrast with the surroundings before automatic mounting of components. For this reason, there is a problem that the mounting efficiency of the components is deteriorated and the productivity is poor.

[0014]

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and when the preflux treatment method is applied,
Even if the inner layer circuit pattern overlaps the target mark of the multilayer printed wiring board, the target mark image can be recognized with high accuracy without scraping off the pre-flux film on the target mark, and the mounting positioning accuracy of components is improved. An object of the present invention is to provide a target mark forming method capable of performing the above.

[0015]

According to the present invention, an object of the present invention is to provide a method for forming a target mark on a multi-layer printed wiring board, which is read by an image recognition device provided in an automatic mounter for electronic parts and serves as a positioning reference when parts are mounted. Method for forming a target mark of a multilayer printed wiring board, which comprises the following steps: a. Forming an inner layer circuit pattern having a clearance notched larger than the target mark on the inner layer copper clad laminate directly below the target mark; b. A step of laminating an outer layer laminated board on the inner layer laminated board having the inner layer circuit pattern formed in the step a to obtain a multilayer laminated board; c. Forming an outer layer circuit pattern and the target mark on the multilayer laminate; d. Copper plating the outer layer circuit pattern and the target mark of the multi-layer laminate; e. This is achieved by performing a pre-flux treatment on the outer layer laminate.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a view showing a processing step according to an embodiment of the present invention, FIG. 2 is a processing flow chart of the same, and FIG. In FIG. 1A, reference numeral 50 denotes an outer layer copper clad laminate, which is obtained by adhering a copper foil 54 to one surface of a translucent insulating substrate 52 made of glass epoxy resin.

In FIG. 1B, reference numeral 56 denotes an inner layer copper clad laminate, which is a semi-transparent insulating substrate 58 like the outer layer laminate 50.
The copper foil 60 is adhered to one surface of the. The outer layer laminated plate 50 and the inner layer laminated plate 56 are made of semitransparent substrates 52, 5
It is needless to say that the copper foils 8 and 8 may be provided on both sides, but here, in order to simplify the description, the copper foils 54 and 60 are provided on only one side, respectively.

As shown in FIG. 1B, a circuit pattern 6 is formed on the inner layer laminated plate 56 by a known photoetching method or the like.
2 is formed (step 100). This circuit 6 here
2, the target mark 70 is formed immediately below the target mark 70A formed on the outer layer laminated plate 50 as described later.
A clear lance 66, which is notched larger than A, is formed.

That is, since the land position 68 and the target mark position 70 (see FIG. 1A) to be formed on the copper foil 54 of the outer layer laminate 50 are predetermined, the target mark position 70 is determined. The clear lance 66 is formed under the same procedure as the circuit pattern 62.

The outer layer laminated plate 50 is laminated on the inner layer laminated plate 56 with the insulating layer 72 interposed therebetween to form a multilayer laminated plate 74 ((C) of FIG. 1, step 102). Here, the insulating layer 72 is a translucent glass epoxy resin like the insulating substrates 52 and 58. Next, an outer layer circuit pattern is formed on the multilayer laminated board 74 (step 104). The outer layer circuit pattern includes the IC mounting land 68A (corresponding to the land 12 in FIGS. 4 and 5), the target mark 70A (also corresponding to 14 and 16), and other wiring patterns. It should be noted that drilling processing for through holes and the like are also performed as necessary (see FIG. 1D).

Next, the multi-layer laminated board 74 is plated with copper (step 106). That is, the land 68A and the target mark 70A are processed by electroless copper plating.
A copper plating layer 76 is formed on the above. FIG. 1E shows this state.

Flux coating is then applied to the multi-layer laminate 74 (step 108). In this pre-flux treatment, the multilayer laminated plate 74 is clamped in a conveying device and dipped in a flux tank for a predetermined time, excess flux is removed by a squeegee roller at the time of pulling, and a predetermined amount of flux is applied to a uniform thickness. .

As the flux used here, for example, a flux containing alkylbenzimidazole as a main component is used. Reference numeral 78 in FIG. 1 (F) shows this pre-flux treated layer. The size of the clearance 66 is CC
When the target mark 70A is read by the D camera, the size is set to a size that allows the target mark 70A to be clearly discriminated from the inner layer circuit pattern 60 below. For example, as shown in FIG. 3, the target mark 70A has a diameter of 1
Clearance 66 is 2 mm on a side when the circle is mm.
Can be a square.

In the product manufactured by the above steps, the copper plating layer 76 is formed on the target mark 70A and the preflux layer 78 is formed on the copper plating layer 76. The preflux layer 78 is sufficiently thin and has flatness. Good, its surface is smooth. Further, there is a clearance 66A for the inner layer circuit pattern 62 below the target mark 70A, and the inner layer circuit pattern 62 does not overlap the target mark 70A.

Therefore, when applied to the above-mentioned automatic mounting machine, an image recognition device such as a CCD camera can accurately detect the shape of the target mark 70A. Therefore, components such as ICs can be positioned with high precision at their mounting positions.

In the above embodiment, the present invention is applied to the two-layer laminated plate 74 in which the inner layer laminated plate 56 and the outer layer laminated plate 50 are laminated. When applied to a multi-layer laminate having three or more layers, a clearance is provided in the inner layer adjacent to the second layer, that is, the outer layer, which has the greatest effect on the contrast of the target mark. In this case, the clear lance may or may not be provided in the other inner layer.

The shapes of the target mark 70A and the clear lance 66 are not limited to those in this embodiment, and the target mark may be square or the clear lance may be circular. In short, any shape may be used as long as it can secure a sufficient space around the target mark so that the outline of the target mark can be read by the CCD camera. The shape of the target mark and the shape of the clearance are preferably set such that when one is circular and the other is rectangular, confusion is less likely to occur during image recognition by the CCD camera.

[0028]

As described above, according to the first aspect of the present invention, since the inner layer circuit pattern below the target mark is formed with a clearance larger than that of the target mark, even if the target mark is subjected to the pre-flux treatment, its contrast is improved. Can be made bigger. Therefore, the shape of the target mark can be read with high accuracy by the image recognition device.
Further, the positioning accuracy of the mounted components is improved, and it becomes possible to accurately mount a narrow pitch IC or the like.

[Brief description of drawings]

FIG. 1 is a diagram showing processing steps according to an embodiment of the present invention.

[Figure 2] Processing flow chart

FIG. 3 is a diagram showing an example of the shape of a clearance.

FIG. 4 is a diagram showing an example of a circuit pattern.

FIG. 5 is a diagram showing a mounting process by an automatic mounting machine.

[Explanation of symbols]

 12, 68A Land 14, 16, 70A Target mark 18 IC 50 as a mounting component Outer layer laminate 56 Inner layer laminate 62 Inner layer circuit pattern 66 Clearance 74 Multilayer laminate 76 Solder layer 78 Preflux layer

Claims (1)

[Claims] 1. A method for forming a target mark on a multi-layer printed wiring board, which is read by an image recognition device provided in an automatic mounter for electronic parts and serves as a positioning reference when parts are mounted, characterized by including the following steps: Method for forming target mark of multilayer printed wiring board: a. Forming an inner layer circuit pattern having a clearance notched larger than the target mark on the inner layer copper clad laminate directly below the target mark; b. A step of laminating an outer layer laminated board on the inner layer laminated board having the inner layer circuit pattern formed in the step a to obtain a multilayer laminated board; c. Forming an outer layer circuit pattern and the target mark on the multilayer laminate; d. Copper plating the outer layer circuit pattern and the target mark of the multi-layer laminate; e. The process of pre-fluxing the outer layer laminate.