JPH0731737A - Microcomputer chip for controlling game machine, and collating device for detecting its illegality - Google Patents

Abstract

PURPOSE:To prevent illegality by executing control by a central processor using a program written in a built-in ROM and data written in a built-in RAM for rewriting inhibition, and also, inhibiting a program operation executed from the outside of a designated area without executing a check of the program written in the built-in ROM unless an identification code is inputted from a collating device. CONSTITUTION:As for the microcomputer chip, if a power source is turned on when an ID collating device is not connected, a discriminating circuit 9 compares an input pulse with a check pulse. At the time of non-coincidence, a reset circuit 16 is operated, a game machine control CPU 5 is reset, and an operation of the game machine is inhibited. To the CPU 5, an illegal address execution inhibiting circuit 14 is connected, and in the case a program other than that of a built-in ROM 7 is executed, the reset circuit 16 is operated. When abnormality does not exist, the game machine is controlled by the built-in ROM 7 and built-in RAM 8. The built-in ROM 7 uses a rewriting inhibition ROM inspected and supervised by a third inspecting organ and a supervisory body.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an application program (equipment control program or equipment control program which is mounted on a pachinko gaming machine, a spinning-type gaming machine, an arrange ball, a jean ball gaming machine, etc. Data) for activating a semiconductor chip, which can prevent the semiconductor chip from being modified into a program that operates outside the legal standards after being certified, and for testing the modified chip The present invention relates to a matching device.

A gaming machine such as a pachinko machine is a product that cannot be sold unless it has passed the certification and type verification of the gaming machine in accordance with the rules of the National Public Safety Commission based on the rules of the Business Act of Customs and Microprocessors. Must also pass the type test conducted by a third-party inspection organization, apply for the certification to a third-party supervisory organization for those that have passed this type, and market the game machines that have passed the certification. It is a mechanism that can be distributed to other companies, and can be used for sales at pachinko halls.

Therefore, after receiving the type approval, a third party performs a modification such as replacing the board of the game machine, replacing the chip, modifying the microprocessor, rewriting the ROM of the microprocessor, etc., and playing illegal games. There is a case where it is used as a machine, and preventing the modification after passing the type is an issue today.

[0004]

2. Description of the Related Art A conventional game machine of this type includes a device that continuously operates an electric accessory, a device that electrically controls the electric accessory, and a circuit that is integrated with a microprocessor. It is known to control the rotation of a rotating drum in a torso-type game machine, and those circuits that pass the type test of a third-party inspection organization will emit a winning ball to the user with a certain probability. Is configured to.
In the case of gaming machines, it is obliged to store application programs and data in a predetermined address area.

[0005]

However, in the case of such a conventional microprocessor, even if a third party modifies the control program and data in the circuit after passing the type test, it is only the product that has passed the type test and the appearance. It is difficult to distinguish and it is likely to be handled as a product that has passed the type test. Therefore, there is an inconvenience that such a fraudulent act on a game machine by a third party cannot be sufficiently prevented. If such fraud is left unchecked, the player will be at a disadvantage, and the credibility of the public third-party inspection agency inspecting the product that has passed the type approval will be damaged, and the type test will become less meaningful. May come. Therefore, the present invention has been made in view of the above-mentioned drawbacks of the prior art. In addition to providing a configuration for preventing unauthorized modification of a microprocessor incorporated in a gaming machine, a built-in ROM and control in the microprocessor in the gaming machine are provided. The purpose is to provide a circuit with a function for preventing tampering with programs and data. A further object of the present invention is to provide a program collating device capable of checking the modification status of a control program of a gaming machine after the gaming machine is installed in a pachinko hall after a type test.

In the conventional program check, a third party inspection body carefully examines the contents from various angles at the time of application for the type test, but after the test has passed, the inspection agency leaves control and the type For game machines equipped with the programs that have passed the test, the game machine manufacturers apply for verification to a third-party supervisory organization, and products that pass this verification are shipped to the game hall. Therefore, since the gaming machine control program check is not performed regularly, it is not possible to know when and at what stage who is performing fraud such as chip replacement and program modification.

[0007]

[Means for Solving the Problems] That is, as a game machine development maker, even if a chip in which a legitimate program is written is built in and shipped, a third party intervenes to rewrite the program or the ROM There are also problems such as being unable to take responsibility because it is altered. This is a single R
This is because the OM can be easily modified, and firstly, it was considered important to prevent modification of the ROM of the passing program in order to prevent fraud.

Secondly, when writing the program to the chip after passing the test, the development maker side does the work separately in one fair organization, and prohibits the subsequent writing to the chip. If it is applied, the cost will be reduced and the reliability of the chip will be increased. It should be noted that the writing may not be performed by a fair organization, but may be performed by the development maker side. Thirdly, if the game machine incorporating the ROM is illegal, it will be illegal if it is possible to easily verify whether the program content has passed the test by a third-party supervisory organization such as the police that controls it. People will also be worried about when they will be checked, and will not risk the risk of cheating easily. However, the matching device found that the mechanism of the device that checks whether the program installed in the ROM mounted on the chip is a product that passed the type application is simple or that the internal software security is poor. There is a risk of modifying the program or the circuit so that it cannot be executed. Therefore, an identification code for each device is further added to the program on the ROM written in the microcomputer chip, and an identification code encrypted by a specific encryption algorithm is further added. Also, while writing the check code calculated by a predetermined algorithm while sequentially scanning the encrypted identification code and checking the program contents with a collating device etc., whether the check code written in the chip built-in ROM matches or not. Can be checked by a matching circuit provided in the chip. Furthermore, an external device assigns a recognition code between the microcomputer chip and the collating device so that the contents of the ROM data such as the identification code in the chip, the encrypted identification code and the check code cannot be easily read, and is sent from the collating device. When the generated identification code matches the identification code of the chip, the chip outputs the data in the built-in ROM and RAM to the collation device.

That is, the invention of claim 1 stores an application program, an identification code and an encrypted identification code for each model of a gaming machine, and a check code calculated based on the application program, the identification code, and the encrypted identification code in a predetermined area. The built-in ROM, the built-in RAM in which the data for the user program is written, which prohibits the rewriting of data from the outside, and the recognition code transmitted from the outside are checked to see if it is correct.
If it is correct, a check code is calculated based on the application program, identification code, and encrypted identification code written in the built-in ROM, and the check code is compared with the check code written in the built-in ROM. Identification means for outputting an externalized identification code to the outside,
A microcomputer chip for controlling a gaming machine, which comprises an application program written in a built-in ROM and a central processing unit for executing a gaming program based on user data.

According to a second aspect of the present invention, a connection terminal for connecting to a terminal of a gaming machine microcomputer chip, a built-in RAM for writing ROM data and RAM data transmitted from the microcomputer chip, and a predetermined one for the microcomputer chip. Send the identification code of
The built-in ROM in which a program for controlling each device of the device is written, and the identification code sent from the microcomputer chip as a result of transmitting the identification code to the microcomputer chip are demodulated and compared with the identification code to determine whether the proper or not. And an identification code demodulation circuit configured to determine that the identification code is illegal, wherein the identification code demodulation circuit stores a CPU, a program for deciphering an encrypted identification code, an encryption key code, etc. This object is achieved by a collation device for illegally detecting a microcomputer chip for controlling a gaming machine, which is composed of a built-in ROM and a built-in RAM provided with the above.

[0011]

In the microcomputer chip according to the present invention, the program written in the ROM incorporated in the chip is not checked unless the recognition code is normally input from the collating device, but is written in the control program written in the ROM and the RAM. Based on the data, the central processing unit controls the gaming machine. In the device according to the present invention, the program is prohibited from operating outside the designated area, and each program control circuit prohibits the program from reading the data of the storage means outside the chip. Therefore, access to the external storage means is prohibited during execution of the program.

If the ROM in the chip is made of a rewritable ROM, the program cannot be rewritten after the permission is obtained. Further, in a fraud prevention system for a microcomputer chip in which a collating device and a microcomputer chip are combined, the collating device is connected to a predetermined terminal of the chip for collation. The microcomputer chip has a check code according to an algorithm incorporated in the identification means based on an application program, an identification code and an encrypted identification code written in a built-in ROM as a first step when a predetermined identification code is input from the collation device. Calculate this code and the built-in RO in advance
Compare with the check code written on M. After that, the identification code and the encrypted identification code or the error code written in the built-in ROM together with the built-in RAM data are sent to the collating device which is an external means.

The transmitted encrypted identification code is demodulated by the identification code demodulation circuit in the collating device, compared with the identification code read from the internal ROM by the central processing unit in the collating device, and the result of collation coincides. When done, it is configured to give an OK sign. As a result, since the program written in the ROM in the microcomputer chip is easily checked by the collating device, it becomes impossible to carry out fraudulent acts because of fear of being inspected. Further, since the identification code demodulation circuit in the collation device cannot easily read the contents written in the ROM from the outside, the security of the collation device is ensured. Further, even if an illegal chip is mounted, the verification device checks the result, and when the result of the verification is a coincidence, the OK sign is displayed, so that the illegality of the chip is also detected.

[0014]

The present invention will be described in detail below with reference to the illustrated embodiments. As shown in FIG. 1, the operating system considered by the gaming machine control microcomputer chip and the collation device for detecting an illegal program in the chip is a chip (development chip) with a built-in EPROM produced by an IC maker as shown in FIG. It is wholesaled from a machine microcomputer chip maker to a game machine development maker, and the development maker uses the EPROM built-in chip to create a program for game machine control within the range conforming to the law, and this is a third-party inspection agency for game machines. To submit a type test application. The inspection organization tests whether the program written in the EPROM with a built-in chip is appropriate and notifies the development maker of the test result (whether it passes or not). RO passed the test
The M data is sent from the inspection agency to the microcomputer chip maker as compatible ROM data, and the identification code corresponding to each model is included in each ROM (including data such as the date of approval and the selection number of the encryption key code).
And a predetermined encryption algorithm (eg Feel Eight)
The encrypted identification code and the check code calculated based on the program stored in the ROM, the identification code, and the encrypted identification code are added. The third-party inspection body creates a correspondence table of the passed models and the identification numbers given to them. Then, the compatible ROM data and the identification code are sent to, for example, a public ROM writing institution (the writing institution of the development maker may be used), and the ROM writing institution from the IC maker (or chip maker) is a rewrite-prohibited ROM for mass production (eg, fuse ROM). ) Receiving a built-in chip (mass production chip), it writes ROM data that has passed the type test in a predetermined format, and writes an identification code and an encrypted identification code, and also performs a rewrite prohibition process on the ROM.

Next, a ROM built-in ROM-protected chip, in which ROM data, a type test-approved ROM data, an identification code, an encrypted identification code, and the like are written, is delivered from a ROM writing organization, and the development maker uses a gaming machine based on the delivered chip. Produced, applied for certification to a third-party supervisory organization, and the gaming machines that have passed the certification test are delivered to the pachinko hall and used for sales. The pachinko hall side will apply for certification to the supervisory agency in order to operate using products that have passed such certification, and the business is permitted. On the other hand, a third party supervisory organization, which is in the position of inspecting the business situation, is provided with a collating device capable of collating the contents of the ROM in the chip, and the official of the third party supervisory agency visits the pachinko hall to play a game machine. ROM built-in chip can be easily
The contents of can be inspected (verified).

The data of the chip to be collated and the outline of the collation system are as shown in FIG. 2, and the rewriting-prohibited ROM in the microcomputer chip has a game program, an identification code given by the microcomputer chip development maker, and a predetermined code. Based on the encryption key code, for example, the encrypted identification code encrypted according to the encryption procedure such as field check and cyclic redundancy check, and the check code calculated by a predetermined algorithm based on the game program, the identification code, and the encrypted identification code. In addition, an error code (for example, data having a different format from the identification number or the encrypted identification number) for displaying an error on the ID collation device when the check codes do not match is written, and the ID collation device has a chip. Identification code read from built-in ROM and Of the identification code by demodulating the encrypted identification code in the data, and is configured to match the contents of the ROM data by comparing with the aforementioned identification code. When the identification codes match as a result of collation, OK is displayed, and when they do not match, NG is displayed. Further, the identification number read from the built-in ROM is displayed on the LCD of the collation device so that the official can visually check the identification number of the model. Further, the ID collating device prints the contents of the sent RAM in the built-in microcomputer chip as RAM data.

Specifically, the control program for the gaming machine has a gaming machine control board 2 mounted on the back surface of the gaming machine 1, and the connection terminals 4 of the ID collating device 3 are directly connected to the chip terminals of the gaming machine board 2. It is configured to be connectable (Fig. 3). In this embodiment, the microcomputer chip installed on the gaming machine board 2 has a structure shown in the block diagram of FIG.

In FIG. 4, reference numeral 5 is a central processing unit (CPU) for executing and controlling a game machine program, and a CPU
5 is connected to a clock generator 6 that generates a clock required for operation. The CPU 5 uses a parallel input / output port for inputting or outputting various external data via various buses, an application program for game, an identification code for collation, and encrypts it based on a predetermined encryption key code. Rewriting prohibition built-in ROM7 in which a check code calculated by a predetermined algorithm (field rate, cyclic redundancy check) from the identification code for verification, error code and application program, identification code and error code is written, and for game control Of the built-in RAM 8 for temporarily storing the data of the ROM and the identification code input from the external device, when this matches, the calculation of the check code of the ROM 7 data and the check written in the built-in ROM 7 in advance by the procedure described later. After comparing with the code, the ROM 7 The contents of the data (identification code and encrypted identification code or an error code)
And an identification circuit 9 as an identification means for outputting the contents of the RAM 8 data to an external device, a counter / timer circuit 10 for setting a time and controlling various timings, and a watchdog timer (WDT) 12 for monitoring an abnormal operation of the CPU. And a reset circuit 16 and an illegal address execution prohibition control circuit (IATG) 14 for prohibiting execution of programs from other than the built-in ROM 7, 18 is a memory control circuit for the built-in ROM 7, and 20 is a ROM for the ROM 7. It is a memory program control circuit for writing. The error code is transmitted when the identification number is incorrect when the check code comparison result is correct.

Next, FIG. 5 shows a concrete block diagram of the discrimination circuit 9, which includes a data input / output circuit 22 for inputting / outputting data of the discrimination circuit 9 and a data input / output circuit.
A timing generation circuit 24 that adjusts the trigger timing based on a trigger timing pulse input from an external device (ID collation device) via 22 and outputs information (baud rate) related to the communication speed, and the ROM and R of the chip.
Address counter 26 connected to an address bus for performing address generation and sequential access operation of the address during AM access, parallel / serial conversion circuit 28 connected to chip data bus, and generation of reference clock for each block , A divider / timer circuit 30 that determines the baud rate when transmitting serial data and monitors the timer during each operation, and a recognition code that determines whether the recognition code input from an external device matches the previously stored recognition code The judgment circuit 32, the ROM check circuit 34 for calculating a check code by the same method as the predetermined algorithm based on the program, the identification code, the encrypted identification code and the error code written in the chip built-in ROM 7, and the data input. Output circuit 22, timing generation circuit 24, address counter 26, parallel / serial Al conversion circuit 28, divider /
It comprises a timer circuit 30, an identification code judging circuit 32, and an ID control circuit 36 for controlling the operation of the ROM check circuit 34. The ID control circuit 36 confirms the identification code sent from the collation device, and then issues a bus release request to put the central processing unit 5 into a floating state, and
Suspend U5. Further, in the data input / output circuit 22, it may be considered that a third party may cause the circuit to be destroyed by causing an excessive current to flow into the SD terminal of the microcomputer chip by a third person as shown in FIG. A self-diagnosis circuit 21 is incorporated so as not to operate the game machine in some cases. The self-diagnosis circuit 21 receives a fetch cycle from the CPU 5 and generates a predetermined check pulse twice, and an OR circuit 21b, an output terminal 21c, and an output circuit 21d for the check pulse transmitted from the generation circuit 21a. (Having a buffer function), input circuit 21e (having a buffer function), comparison circuit 21 via input terminal 21f
It is configured such that a pulse is directly input to the comparison circuit 21g from the check pulse generation circuit 21a, and the comparison circuit 21g is configured to output the pulse to the reset circuit 16. Has become. Reference numeral 21h is a switching circuit for switching a signal input from the ID terminal of the chip to the trigger / timing / pulse receiving terminal or the recognition code receiving terminal. XBP is a baud rate / pulse output terminal, and CHKD is an ID collation data output terminal.

In the built-in ROM 7 of the chip, for example, as shown in FIG. 7, an area from address 0000H to address 3FDFH is used as a user program area (application program area), and an identification code and an encrypted identification code from 32FE from address 3FE0H. And the selection number of the encryption key code is written. Addresses 4000H to 7DFF are unused areas, 512 bytes from addresses 7E00H to 7FFFH are dedicated to RAM, and areas 8000H to FFFFH are unused areas. From the address to 3FFFH,
The data is controlled so that it cannot be read. In this embodiment, the capacity of the RAM is 256 by the switching device.
It is configured to switch to / 512 bytes.

Next, FIG. 9 relates to a block diagram of a microcomputer chip collating apparatus according to an embodiment of the present invention. A built-in RAM 42 connected to the main CPU 40 by a system bus, and a built-in ROM 44 in which a control program for each device of the matching device is written;
A security CPU 46 serially connected to the CPU 40 and a RAM 48 and a ROM 50 connected to the CPU 46. The ROM 50 is a serial input / output device SIO in a bootstrap mode for loading a program into the RAM 48.
The program is written in the ROM 50 via the, and after the contents are confirmed, the reading is disabled. In this ROM50,
A predetermined algorithm for demodulating the encrypted identification code
(Program), multiple encryption key codes are written. The CPU 40 includes a printer 54 and a serial interface RS-232C via the printer interface 52.
Connected with 56. In addition, 58 is a TTL level interface, 60 is the determination result of the identification code is "OK",
L for displaying "NO" or "ERR"
Reference numeral 62 is an ED display, "start" of the ID collating device,
Various check switches such as "print", and 63 is a battery for supplying power to each circuit. Reference numeral 65 is an LCD display for displaying an identification number read from the microcomputer chip and a guide for matching.

In this embodiment, a trigger timing pulse is sent to the ROM 44 for the gaming machine control CPU 5,
The function of controlling the reception protocol based on the baud rate output from the control CPU 5, the function of inputting operation keys, the function of controlling each display, and the collation of the identification code on the LCD display. The function of displaying the result, the function of causing the printer to print the contents of the RAM transmitted from the main CPU 40, and the security CPU 46
, A control program having a function of transmitting an encrypted identification code and receiving a demodulated identification code is incorporated.

The RAM 42 is provided with a work area for executing a program, an area as a transmission / reception data buffer of the gaming machine control CPU 5, and an area as a transmission / reception buffer of the security CPU 46.

The microcomputer chip and the ID collating device according to the embodiment of the present invention having the above-mentioned configuration are
It works as follows. In the microcomputer chip, the check pulse generation circuit 21a in the self-diagnosis circuit 21 in the data input / output circuit 22 of the identification circuit 9 receives the fetch cycle when the power is turned on when it is not connected to the ID verification device. Output terminal 21c and comparison circuit 21g
To the output circuit 21
d, the input circuit 21e, and the pulse input via the input terminal 21f are compared. If the pulses match, comparison circuit 21
g does not output to the reset circuit 16 and does not match
Comparison circuit 21 (when there is no pulse coming from the input terminal)
Since the circuit is abnormal from g, a reset signal is output to the reset circuit 16 to reset the gaming machine control CPU 5,
Prevent the gaming machine from operating. When there is no abnormality, the CPU 5 for gaming machine control has not been reset, so the internal ROM
By controlling the operation of the gaming machine according to the application program written in 7 and the data written in the built-in RAM 8, the game becomes possible. In the CPU 5, the address at which the IATG 14 is running the program is constantly monitored, and when the IATG 14 is out of the specified address range, an interrupt is made to operate the reset circuit. In addition, the WDT 12 detects a malfunction (runaway) due to noise or the like and restores the normal state. Note that the control of the game machine by the program is performed via the parallel I / O port. Therefore, the chip of this embodiment shifts to the control of the gaming machine without checking the contents of the program at the beginning of starting.

Next, as shown in FIG. 3, when the connecting terminal 4 of the collating device 3 according to the present embodiment is connected to the terminal of the microcomputer chip, the microcomputer chip and the collating device 3 are as shown in the flow chart of FIG. Works. That is, the switch of the verification device 3 is turned on, the connection terminal 4 is connected to the SD terminal of the chip, and the verification switch 62 is pressed. Then, the trigger timing pulse is sent out by the control of the ROM 44 in the matching device 3. The microcomputer chip side receives this signal, measures the timing with the data input / output circuit 22 of the identification circuit, and when it is confirmed, a baud rate pulse is sent from the timing generation circuit 24 to the matching device 3 via the data input / output circuit 22. Sent out.

When the data input / output circuit 22 cannot confirm the timing, the timing generator circuit 24
Since the rate pulse is not transmitted, the collation device 3 judges that the baud rate pulse has not been received within the predetermined time, and judges it as an error, and displays an error. In the present embodiment, the collation device 3 again sends the trigger timing pulse to the microcomputer chip and receives the baud rate pulse from the microcomputer chip.

Upon receiving the baud rate pulse, the verification device 3 determines the baud rate and sends a predetermined identification code possessed by the verification device 3 to the microcomputer chip. On the microcomputer chip side, the transmitted recognition code is compared with the recognition code input in advance by the recognition code judgment circuit 32 of the discrimination circuit to judge whether or not the recognition code is correct. When the recognition code cannot be confirmed within the predetermined time, the chip side waits for the trigger timing pulse, and the collation device 3 side displays an error message (") on the display unit because the microcomputer chip side does not send the data within the predetermined time. ERR "). When the identification codes match, the ID control circuit 36 of the identification circuit 9 brings the CPU 5 of the chip into a floating state (reset state), and then the ROM check circuit.
Instruct 34 to check the data written in the built-in ROM 7.

The ROM check circuit 34 accesses the ROM 7 built in the microcomputer chip and calculates a check code according to a predetermined algorithm while sequentially scanning the program, the identification code and the encrypted identification code. In this embodiment, the check code is calculated by Field Eight developed by Nippon Telegraph and Telephone Corporation or a cyclic redundancy check. The calculated check code is
A check is made with a calculated check code previously written in a predetermined address of the ROM7, and if they do not match, the RAM is
The data (512 bytes) and the error code (32 bytes) stored in the predetermined address of the ROM 7 are sent to the collation device 3, and when they match, the RAM data, the identification code stored in the predetermined address of the ROM 7 and the encrypted identification. The code is sent to the collation device 3 as serial data. The format of the data to be sent is specified in advance. In this embodiment, as shown in FIG. 8, STX, RAM data (512 bytes), ROM identification code and encrypted identification code (32
Bytes), checksum, etc., and then the microcomputer chip returns to the initial state.

The collation device 3 which has received the ROM data and the like.
Temporarily stores the data in the RAM 42, checks the data format and the number of data bytes, and when an error code is sent, the ROM 44 is set because the identification code and the data format are set differently. The control program stored in is judged as a code check error and an error is displayed on the display ("ER
When the check result of the data format and the number of data bytes is OK, 512 bytes of RAM data are printed by the printer 54 and 32 bytes of ROM data (identification code) are transferred to the security CPU 46.
The CPU 46 demodulates the encrypted identification code according to the demodulation program written in the ROM 50. A predetermined encryption key code is used to encrypt the identification code. Therefore, in this embodiment, a plurality of encryption key codes are stored in advance in the built-in ROM 50 for maintaining confidentiality, and these are selected on the basis of the selection number written in the transmitted identification code data, and the predetermined code is selected. It is demodulated by a predetermined algorithm based on the encryption key code of.

The security CPU 46 collates the demodulated identification code with the identification code sent from the ROM 7 to determine whether they match. If the identification codes match as a result of the determination, the fact is sent to the central processing unit 40, and the control program written in the ROM 44 instructs the display 60 to display "OK". At this time, the identification number is also displayed on the LCD,
Whether or not the correct ROM suitable for the model is set in the chip can be determined by the official of the third-party supervisory organization by comparing the target table of the model and the identification number. If the matching result codes do not match, the fact is sent to the central processing unit 40 and the control program is displayed on the display unit 60.
To display "NO". After the inspection is completed, the switch is turned off to complete the inspection.

In the present embodiment, if the demodulation algorithm of the identification code is generally known, it is easy to tamper with the ROM 7 with a built-in microcomputer chip. Therefore, when a third party reads the ROM 50 connected to the security CPU 46, It is configured to automatically erase data about the algorithm.

In this embodiment, the system for inspecting each gaming machine with the ID collating device has been described.
As shown in FIG. 11, the collating device 3 is interposed between the cables connecting the hall computer and each gaming machine,
It is also possible to make a system in which a hall computer checks the contents of a ROM built in a microcomputer chip built in each gaming machine one by one. With this configuration, it is possible to check the gaming machines in the entire hall in a short time.

In this embodiment, the rewritable ROM is used as the built-in ROM, but the present invention is not limited to this, and a normal ROM may be used. However, in this case, when the game machine is operated, the identification circuit 9 is operated to cause the ID control circuit 36 to put the CPU 5 of the chip in a floating state (reset state), and then the ROM check circuit.
Instruct the 34 to check the data written in the built-in ROM 7, the ROM check circuit 34 accesses the ROM 7 built in the microcomputer chip, and sequentially scans the program, the identification code, and the encrypted identification code, and a predetermined algorithm. Calculate the check code according to. In this case as well, the check code is calculated by Field Eight developed by Nippon Telegraph and Telephone Corporation or a cyclic redundancy check. The calculated check code is the same as the calculated check code previously described in the predetermined address of the ROM 7. It is advisable to check the identification number each time it is collated.

[0034]

As described above, in the microcomputer chip according to the present invention, the identification code and the encrypted identification code are stored in the built-in ROM as the mass production chip after passing the type test by the third party inspection organization. Is written, and a check code calculated according to a predetermined algorithm based on the application program, the identification code, and the encrypted identification code is written, and the identification code and the check code are changed when the program is modified. Therefore, even if the entire board is replaced, the chip is replaced, the built-in ROM is replaced, or the contents of the program are changed, the inspection can be easily performed. Furthermore, the contents of the ROM built into the microcomputer chip built into the game machine delivered to the hall and whether the chip itself has passed the type test can be easily checked by the collating device. It is easier to detect fraud in the on-site inspection than the conventional device.

[Brief description of drawings]

FIG. 1 is a schematic diagram showing an operation system of an apparatus according to the present invention.

FIG. 2 is a schematic diagram showing a program detection process by a microcomputer chip and a matching device.

FIG. 3 is a schematic diagram showing a state in which a matching device is connected to a gaming machine.

FIG. 4 is a block diagram of a microcomputer chip according to the present invention.

FIG. 5 is a detailed block diagram showing an identification number matching circuit in the microcomputer chip.

FIG. 6 is a block diagram of a self-diagnosis circuit incorporated in a data input / output circuit.

FIG. 7 is a diagram showing addresses of programs and the like stored in a built-in ROM and RAM.

FIG. 8 is a diagram showing a format of data transmitted from a microcomputer chip to a matching device.

FIG. 9 is a block diagram showing a matching device according to the present invention.

FIG. 10 is a flowchart of a procedure for detecting fraud in a program embedded in a microcomputer chip using the collating device according to the present invention.

FIG. 11 is a block diagram showing an example in which a microcomputer chip and a matching device according to the present invention are applied.

[Explanation of symbols]

1 gaming machine 2 board 3 ID collating device 4 connection terminal 5 central processing unit (CPU) 6 clock generation circuit 7 rewrite prohibition built-in ROM 8 built-in RAM 9 identification circuit 10 counter / timer circuit 11 parallel input / output port 12 watchdog timer ( WDT) 14 Illegal address execution prohibition control circuit (IAT
G) 16 reset circuit 18 memory control circuit 20 memory program control circuit 21 self-diagnosis circuit 21a check pulse generation circuit 21b OR circuit 21c output terminal 21d output circuit 21e input circuit 21f input terminal 21g comparison circuit 21h switching circuit 22 data input / output circuit 24 Timing generation circuit 26 Address counter 28 Parallel / serial conversion circuit 30 Divider / timer circuit 32 Recognition code judgment circuit 34 ROM check circuit 36 ID control circuit 40 Main CPU 42 Built-in RAM 44 Built-in ROM 46 Security CPU 48 RAM 50 ROM 52 Printer interface 54 Printer 56 Serial interface 58 TTL level interface 60 LED display 62 Various verification switches 63 Battery 65 LCD display

Claims (2)

[Claims] 1. A built-in ROM in which an application program, an identification code and an encrypted identification code for each type of gaming machine, and a check code calculated based on the application program, the identification code, and the encrypted identification code are stored in a predetermined area. , Built-in RAM that prohibits rewriting data from the outside where user program data is written, and built-in ROM that checks whether it is correct based on the recognition code sent from the outside and if the recognition code matches Scan the built-in ROM to determine whether the program written in is certified or not, compare the check code with the check code stored in the built-in ROM, and write the check code to the external device. The identification means for outputting the identification code and the encrypted identification code, and the built-in ROM A gaming machine control microcomputer chip having a central processing unit for executing a gaming program based on a written application program and user data. 2. A connection terminal for connecting to a terminal of a gaming machine microcomputer chip, a built-in RAM for writing ROM data and RAM data transmitted from the microcomputer chip, and a predetermined identification code for the microcomputer chip. Built-in ROM in which a program for transmitting and controlling each device of the device is written, and the encrypted identification code sent from the microcomputer chip as a result of transmitting the identification code to the microcomputer chip is demodulated and compared with the aforementioned identification code. And an identification code demodulation circuit configured to determine whether the identification code is proper or improper, and the identification code demodulation circuit stores a CPU, a program for decoding an encrypted identification code, an encryption key code, and the like. ROM with read protection And a built-in RAM. 3. A collation device for fraudulent detection of a gaming machine control microcomputer chip according to claim 1.