JP2008023381A - Arithmetic processing unit for game machine - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce burdens of program execution and to facilitate the verification of a program for games from the outside in an arithmetic processing unit for a game machine with a means for judging propriety of the program for the games. <P>SOLUTION: The program is sectioned into the program 1 for the games and a propriety judgement program 3 and respectively stored in first and second storage means. A program execution means 7 is also sectioned into a game execution means for executing the program for the games and a propriety judgement means for executing the propriety program, the propriety judgement means 5 executes the propriety judgement program 3 prior to the execution of the program for the games, and the game execution means 6 executes the program 1 for the games only when the propriety is confirmed. Since an external controller for executing a control operation in a game process under the control of the program execution means 7 is included and communication processing with the external controller is left to a communication means, the burdens on the program execution means 7 are reduced. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an arithmetic processing unit for gaming machines for controlling games such as pachinko gaming machines, arrange balls, rotary gaming machines, and jean ball gaming machines.

  A recent game machine, for example, when a specific condition is satisfied in accordance with a prize in a specific area, for example, causes a variable display game to be played using a special symbol display device provided on the game board surface, and a player is made corresponding to the game result. A game in which the profit state changes significantly is widely spread, and a variable display game using a special symbol display is executed by program control including random number generation control. In addition to the arithmetic processing unit that executes the game program in the gaming machine, the program control such as a discharge control device for performing the prize ball discharge control and a display control device for performing the symbol display control of the special symbol display device, etc. In addition to the progress control of the game program, the game processing unit also provides instructions for display symbols to the display control device, instructions for the number of prize balls to the discharge control device, etc. Running.

  Since the number of devices controlled by such programs has increased, the characteristics of the gaming machine are determined by the gaming program rather than the conventional nail adjustment. There is a desire to incorporate more diverse expressions in the area and to differentiate from competitors, but as mentioned above, the arithmetic processing unit for gaming machines is not limited to the progress control of the main program for gaming, Since the display design instruction to the display control device and the number of prize balls to the discharge control device are also executed, processing load such as communication timing control for these external devices is added at present. There is a demand to reduce the burden required for communication with these external devices as much as possible, and to allocate more capabilities to the progress management of the original game main program.

  In addition, in the case of such a highly-programmed gaming machine, depending on the gaming program, it becomes an extremely high-gaming-type gaming machine, so at present, in order to play a healthy game Only game programs that have been certified by the certification body can be used, but the program is altered by exchanging ROMs in order to improve the ability to attract customers, and the security function against program alteration is improved. Ingenuity has been made.

  More specifically, when the game program developed by the manufacturer passes the certification by the certification organization, the accepted program is brought into a third party organization. A third-party organization derives a security code from a passed program according to a predetermined encryption algorithm, and creates a master ROM in which the original game program and the security code derived from the game program according to the encryption algorithm are written. . The manufacturer is constituted by a one-chip microcomputer, and copies the master ROM into the ROM of the gaming machine arithmetic processing apparatus in which the security program (the above-described encryption algorithm and verification procedure, etc.) is registered in advance and mounts it on the gaming machine. When the power is turned on, the legitimate gaming machine processing device thus obtained first starts the security program and calculates the security code from the gaming program stored in the ROM according to a predetermined encryption algorithm. Is temporarily saved in the RAM area. On the other hand, a security code created by a third party is written in the ROM, and the security code written in advance in the ROM and the security code saved in the RAM are originally created according to the same encryption algorithm. Therefore, both of them must have the same nature. Therefore, the alteration of the program is prevented by making it possible to execute the game program for the first time when a match between the security codes is detected as a result of the comparison between the two.

  By the way, such a security function was born in order to prevent the amusement store from exchanging ROMs at night, etc., and it is not always perfect if an illegal act involving leakage of the encryption algorithm is performed. On the other hand, in order to further improve the security function, irregular on-site inspection by an inspection organization is indispensable. For on-site inspection, it is possible to visually check the trace of the seal seal peeling, but in order to provide a more complete security function or improve the deterrence of tampering, the actual program is read and It is desirable to confirm the verification. However, when an arithmetic processing unit for a gaming machine that is made into a one-chip microcomputer is mounted on an inspection device, the number of pins is so large that the pins are bent when inserting and removing the chip for inspection. There was a problem, and there was a need for a system that could make on-site inspections easier. Accordingly, the present invention provides a game machine calculation that allows a game program to be discharged to a confirmation device by diverting a communication means for performing data communication with an external control device without inserting or removing a chip. An object is to provide a processing apparatus.

  First, the configuration of the present invention will be described in principle with reference to FIGS. As shown in FIG. 1, an arithmetic processing unit for gaming machines according to the present invention includes a first storage means 2 for storing a game program 1 and a game program 1 stored in the first storage means 2. A second storage unit 4 for storing a validity determination program 3 for determining the validity, and a validity determination program 3 stored in the second storage unit 4 are executed to execute the first storage unit 2. When the legitimacy of the game program 1 stored in is confirmed, legitimacy determination means 5 that permits execution of the game program 1 stored in the first storage means 2, and the legitimacy determination means 5 A program execution means 7 including at least a game execution means 6 for executing the game program 1 stored in the first storage means 2 based on the fact that the execution of the game program 1 is permitted by Execution means Under the control of, and a communication unit 9 for executing communication processing with an external control device 8 for performing a control operation in the gaming process.

  Prior to the game execution means 6 executing the game program 1 stored in the first storage means, the validity determination means 5 executes the validity determination program 3 stored in the second storage means, and its validity The game program 1 is allowed to be executed only when the game is approved. In the process of executing the game program 1, for example, an external control device 8 such as a display control device for performing display control of the special symbol display device executes each control operation under the control of the program execution means 7. Since independent communication means is used, the time required for program processing and the program for communication control can be saved.

  As shown in FIG. 2, the communication unit 9 includes a transmission data storage unit 10 that temporarily stores transmission data from the program execution unit 7 to the external control device 8, and a transmission that is temporarily stored in the transmission data storage unit 10. Data transmission means 11 for sending data to the external control device 8, reception data storage means 12 for temporarily storing reception data from the external control device 8 to the program execution means 7, and reception data storage means 12 Data receiving means 13 for receiving received data from the external control device for temporary storage, transmission state storing means 14 for storing that the transmission data storing means 10 holds transmission data, and the received data storing means 12 The reception status storage means 15 for storing the possession of the reception data, and at least the data reception means 13 When the reception data from the external control device 8 is received, the reception state storage unit 15 is set and the reception data is written to the reception data storage unit 12, and the transmission state storage unit 15 is set. Transmission / reception control means 16 for sending transmission data written in the transmission data storage means 10 from the data transmission means 11 is provided.

  The program execution means 7 shown in FIG. 1 sets the transmission state storage means 14 of the communication means 9 shown in FIG. 2 and sends the data to the transmission data storage means 10 when sending data to the external control device 8. On the other hand, if the transmission data is written, the transmission / reception control means 16 sends the transmission data in the transmission data storage means 10 from the data transmission means 11 to the external control device 8, and when the reception status storage means 15 is set. Since the reception data written in the reception data storage means 12 may be taken in, communication with the external control device 8 can be performed in the same procedure as the data communication with the in-chip device.

  Further, as shown in FIG. 3, the arithmetic processing unit for gaming machine determines the validity of the gaming program 1 via a terminal point 17 for connecting the communication means 9 to the external control device 8. The validity determining means 5 can be connected to a confirmation device 18 for performing the game program 1 in response to a game program discharge request from the confirmation device 18 connected via the terminal point 17. Is supplied to the confirmation device 18 via the communication means 9.

  That is, the external control device 8 and the communication means 9 are connected when the game program 1 is sent to the confirmation device 18 for determining the validity of the game program 1 stored in the first storage means 2. Since there is no trouble such as damage of the IC pin accompanying the attachment / detachment of the chip because the terminal point 17 is also used, there is no need to attach / detach the arithmetic processing unit for gaming machines from the base. The chip can be soldered on the substrate, and the reliability of the device is improved.

  Further, as shown in FIG. 4, the arithmetic processing device for a gaming machine of the present invention comprises a non-volatile memory, and includes a discharge number storage means 20 for counting and storing the number of operations of the program discharge means 19. The correctness determination means 5 includes an immobilization means 21 that disables the program execution means 7 when it is determined that the count stored value of the ejection number storage means 20 has reached a preset value.

  As shown in FIG. 4, the number-of-discharges storage means 20 constituted by a non-volatile memory determines the number of times that the program discharge means 19 has been operated, that is, the number of times that the confirmation device 18 has confirmed the validity of the game program 1. When the count is stored, and the stored count value reaches a preset value, the disabling means 21 can disable the program execution means 7. Therefore, it becomes difficult to attempt to discharge the game program 1 for the purpose of decoding the game program 1, and the integrity of the program is improved.

  Further, as shown in FIG. 5, the arithmetic processing unit for gaming machine is connected to the gaming machine through a terminal point 17 for connecting the communication means 9 to the external control unit 8. It is connectable with the confirmation apparatus 18 for determining the legitimacy of the program 1 and the arithmetic processing unit for gaming machines, and the legitimacy judging means 5 includes an identifying means 22 for judging the legitimacy of the checking apparatus 18. Then, the validity determination means 5 has been authenticated by the confirmation device 18 connected through the terminal point 17 and the authentication device 18 by the identification means 22. A program for sending the game program 1 to the confirmation device 18 via the communication means 9 in response to a game program discharge request from the confirmation device 18 connected via the terminal point 17 Comprising a non-discharge means 19.

  In such a case, the game program 1 is discharged on condition that the authentication of the gaming machine on the confirmation device 18 side and the authentication of the confirmation device 18 by the identification means 22 on the gaming machine side are performed. It is possible to effectively prevent leakage of programs for use.

  Further, on the premise of the above, the arithmetic processing unit for gaming machines is constituted by a non-volatile memory as shown in FIG. 6, and includes a discharge number storage means 20 for counting and storing the number of operations of the program discharge means 19. The legitimacy determination means 5 is configured to execute the program execution means 7 when the count stored value of the ejection number storage means 20 reaches a preset value or when the authentication of the confirmation device 18 by the identification means 22 is denied. Disabling means 21 for disabling the function is provided.

  That is, the discharge number storage means 20 constituted by a non-volatile memory counts and stores the number of times the program discharge means 19 is operated, and the disabling means 21 disables the program execution means 7 when the count storage value reaches a preset value. In addition, the program execution means 7 is disabled even if the identification device 22 fails to authenticate the confirmation device, so try to discharge the game program for the purpose of decoding the game program, etc. And the integrity of the program is improved

  According to the first aspect of the present invention, when the game program is sent to the confirmation device in order to determine the validity of the game program stored in the first storage means, the communication with the external control device is performed. Since it is also used as a terminal point for connecting communication means, there is no trouble such as damage to the IC pin when attaching and detaching the chip, and it is not necessary to attach and detach the arithmetic processing unit for gaming machines from the base. The arithmetic processing device chip can be soldered on the base, and the reliability of the device is improved. In addition, the discharge number storage means constituted by a non-volatile memory counts and stores the number of times of operation of the program discharge means, that is, the number of times that the checking operation of the game program is confirmed by the confirmation device. When the set value is reached, the disabling means can disable the program execution means, so that it becomes difficult to attempt to discharge the gaming program for the purpose of decoding the gaming program, and the integrity of the program is improved. improves.

  Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings. As shown in FIG. 7, the accessory control device 31 is centered on an arithmetic processing device 32 for a gaming machine constituted by a one-chip microcomputer, a crystal oscillator 33, a driver 34 for sending signals to an external device, and data externally. A filter 35, an output port 36, an input port 37, an external bus 38, a sound generator 39 that generates various sound effects, an amplifier 40, and the like are included. Moreover, as an example of an external device at the output stage, a display control device 41 for performing display control of symbols for a variable display game as a special game, a discharge control device 42 for performing discharge control of prize balls, and advantageous for a player A variable winning device 43 that can be converted into a first state and a second state that is disadvantageous for the player, and the display control device 41, which will trigger a variable display game (for example, a combination game of symbols), which will be described later. A memory display 44 that displays the number of rights to play a variable display game based on a winning ball to the start switch 48, a decoration display 45 that displays a jackpot state during the jackpot, information that informs the management device 47 of the jackpot state, It has an external information terminal 46 and the like for sending various information such as information notifying the execution of the variable display game. Further, as an example of an external device at the input stage, a first type start switch 48 for detecting a winning in a specific winning area that triggers a variable display game using the display control device 41, a so-called variable winning device during a big hit 43, a count switch 49 for counting the number of winning balls, a continuation switch 50 for detecting a winning ball in a continuous winning area for continuing the big hit state, and the above-described display control for controlling the display of the variable display game. The display control device 41 and the above-described discharge control device 42 for performing the discharge control of prize balls are included. In the present embodiment, external devices other than the display control device 41 and the discharge control device 42 are connected to the arithmetic processing device 32 for gaming machines via the output port 36 or the input port 37, respectively. Are connected to a communication control device (SCU1 or SCU2) of the arithmetic processing unit 32 for gaming machines via a connector. Reference numeral 51 denotes a speaker for generating various sound effects.

  FIG. 8 is a block diagram showing an example of the internal configuration of the arithmetic processing unit 32 for gaming machines. 52 is a CPU core, 53 is RAM, 54 is ROM, 55 is a memory control circuit, 56 is a nonvolatile memory, and 57 is discharge control. Communication control unit (SCU1) assigned to the device 42, 58 is a communication control unit (SCU2) assigned to the display control unit 41, 59 is an external bus interface, 60 is an internal bus, 61 is a clock generator, and 62 is a reset allocation. Control circuit, 63 is a CTC, 64 is an address decoder, 65 is an output control circuit, 66 is a PIO, and 67 is a watchdog timer.

  The CPU core 52 is an 8-bit microprocessor, for example, and executes the gaming operation of the gaming machine in units of one sequence based on the gaming program stored in the ROM 54. The RAM 53 is for temporarily storing data generated during the execution of the program. In particular, in the context of the present invention, the random number generating data is used as a register area for counting and storing, and a variable display game is started. A register area for storing the number of winning balls to the starting hole, a register area for storing a branch processing number, and the like are prepared. The ROM 54 functions as a first storage means and a second storage means, and stores a security program and a game program. The memory control circuit 55 is for controlling switching of programs executed by the CPU core 52, and in particular in relation to the present embodiment, the security program is started at the time of activation. The nonvolatile memory 56 is a memory unit that retains stored contents even when the power is turned off. The number of times that the game program has been inspected by the confirmation device, which will be described later, is counted and stored in the nonvolatile memory 56, and the nonvolatile memory 56 constitutes a discharge number storage means. The external bus interface 59 sends an address and data to the external bus 38. The clock generator 61 divides the output of the external crystal oscillator 33 to an appropriate frequency and supplies it to the CPU core 52, communication control devices 57 and 58, and external devices. The reset interrupt control circuit 62 generates a system reset signal for resetting the entire processing unit 32 for gaming machines, a reset signal for only the CPU core 52, and the like. The watchdog timer 67 is for preventing program runaway due to noise or the like, and resets the CPU core 52 if not cleared within a set time.

  Next, FIG. 9 is a block diagram showing an internal configuration of the communication control devices 57 and 58, and 68 temporarily stores data to be transmitted to the external control device (that is, the display control device 41 and the discharge control device 42). A transmission data buffer, 69 is a reception data buffer for temporarily storing data received from the external control device, 70 is a status register indicating that reception data has been written to the reception data buffer 69, and 71 is a transmission data buffer for receiving transmission data. A command register to be set when writing, 72 is a receiver having a serial / parallel conversion function for taking received data from an external device, 73 is a transmitter having a parallel / serial conversion function for sending transmission data to the external device, and 74 is a clock generator 61. In synchronization with the generated clock, the receiver 72 and the A baud rate generator for actuating the emitter 74. Reference numeral 75 denotes a transmission / reception controller. When the receiver 72 fetches reception data from an external device, the status register 70 is set and the reception data is stored in the reception data buffer 69. When the command register 71 is set, the transmission data buffer 68 is set. The transmission data is sent to the transmitter 73. Further, 76 is a mode register for setting a baud rate and the like, and 77 is a bus in the communication control device.

  Next, FIG. 10 is a block diagram showing in principle the connection state between the accessory control device 31 and the game program confirmation device (simply referred to as confirmation device) 78, and an external control device on the accessory control device 31 side. The connector 79 (that is, the output connector of the communication control device 57) to which the (discharge control device 42 in this embodiment) is connected and the connector on the confirmation device 78 side are connected by a cable 81. Therefore, in the present embodiment, it is not necessary to attach or detach the gaming machine arithmetic processing device 32 from the base constituting the accessory control device 31 at the time of inspection of the gaming program.

  Next, FIG. 11 is a block diagram showing an example of the internal configuration of the confirmation device 78, 82 is a CPU, 83 is a ROM storing an operation program of the confirmation device, and 84 is a memory for storing various intermediate data generated during the confirmation operation. RAM, 85 is a start switch for starting the confirmation device 78, 86 is a filter for removing noise of the start switch 85, 87 is an input port, and 88 is a normal LED that is lit when it is determined that the game program is normal , 89 is an abnormal LED that is turned on when it is determined that the game program is abnormal, 90 and 91 are drivers and output ports, 92 is a socket in which a master ROM 93 for determination is mounted, and 94 is an internal bus of the confirmation device 78 Indicates.

  Next, the operation of the present embodiment will be described with reference to the above items and the flowcharts shown in FIGS. First, the power source on the gaming machine side is turned on in step S1, and the program shown in FIG. 12 is started.

  In step S2, the memory control circuit 55 (see FIG. 8) starts executing the security program prepared in the ROM 54 when the system is activated. First, when the security program is executed, first, in step S3, it is confirmed whether or not an inoperable flag is set in the nonvolatile memory 56. This inoperability flag is set in step S9 when the confirmation operation by the confirmation device 78 is executed a predetermined number of times or more, and since it is normally cleared, the process proceeds to the next step S4. If is set, the system will hang.

  Subsequently, in step S4, it is determined whether or not the status register 70 in the communication control device 57 is set. This status register 70 remains initially cleared at this point unless the confirmation device 78 is attached to the connector 79. Accordingly, the process proceeds to step S11. If the status register 70 is set within the predetermined time in step S11, the process proceeds to step S5, and if not set within the predetermined time, the process proceeds to step S21 (FIG. 14). Since the confirmation device 78 is attached only at the time of on-site inspection, the case where the process proceeds to step S21 will be described first.

  In step S21, encrypted data is calculated from the game program in the ROM 54 in accordance with a predetermined encryption algorithm. That is, an algorithm for encrypting the given data is stored in advance in the security program in the ROM 54, the game program read from the ROM 54 is encrypted according to the encryption algorithm, and the calculated encrypted data Is temporarily stored in the RAM 53. On the other hand, encrypted data previously encrypted by a third party is stored in a partial area (for example, the end area) allocated to the game program in the ROM 54. In step S22, the encrypted data in the ROM 54 is stored. Is read. In step 23, the encrypted data stored in advance in the ROM 54 and the data obtained by encrypting the game program based on the encryption algorithm in step S21 are collated. The area is switched from the security program to the game program shown in FIG. In case of mismatch, the system hangs up.

  When the game program of FIG. 15 is entered, initialization processing (clearing various flags, etc.) is performed in step S27, and prize ball control processing is performed in step S28. The prize ball control process is shown in detail in FIG. First, in step S51, it is checked whether or not the status register 70 of the communication control device 57 is set. The communication control device 57 is connected to the discharge control device 42 except during on-site inspection (see FIG. 7). When the discharge control device 42 detects a winning ball, it sends a prize ball request to the receiver 72 of the communication control device 57. Yes. When the transmission / reception controller 75 receives a prize ball request from the receiver 72, it sets a reception flag in the status register 70 and writes a prize ball request in the reception data buffer 69.

  When the status register 70 of the communication control device 57 is set in the prize ball control process that is repeated for each periodic interrupt request from the reset interrupt control circuit, the CPU core 52 performs the prize ball control process described below. If not, return to the main routine. That is, when the status register 70 is set, the CPU core 52 reads the reception data stored in the reception data buffer 69 and determines whether or not a prize ball request is made. In the case of a request for a winning ball, the number of winning balls is set. In this embodiment, depending on whether the winning area of the winning ball is a winning hole for starting the variable display game or other winning areas. There is a difference in the number of winning prize balls.

  Therefore, in this embodiment, a register area for counting and storing the number of winning balls to the starting hole is provided in the RAM 53, and each time a winning ball detection signal is applied to the starting switch 48 (see FIG. 7), the register 53 shown in FIG. As will be described later, a register area for counting and storing the number of winning balls in the starting hole is added, and each time the prize ball discharging process based on winning in the starting hole is performed, the value in the register area is subtracted. . In addition, in this embodiment, winning in the start hole is given a meaning as the number of rights to start the variable display game in addition to the meaning of discharging the winning ball, and the right to start the variable display game is given. As for the number, for example, “4” is set as an upper limit value, and continuous winnings into the starting hole 48 are allowed to overflow. On the other hand, since no special upper limit is set for discharging the prize balls, A first register area for counting and storing the number of winning balls to the starting hole for discharging the winning ball, and a number for storing the number of winning balls to the starting hole for starting the variable display game A second register area is provided separately. The register area discriminated in step 54 is a first register area for counting and storing the number of winning balls in the starting hole for prize ball discharge processing, and is added in step S44 of FIG. It is an area.

  If the first register area for starting hole counting storage in the RAM 53 is “1” or more, the CPU core 52 calculates the number of prize balls (for example, seven) determined for the starting hole in the communication control unit 57. Set in the transmission data buffer 68 and subtract 1 from the first register area for starting hole count storage (steps S56 and S57). If the first register area for starting hole count storage is "0", A predetermined number of winning balls (for example, 13) is set in the transmission data buffer 68 in the communication control device 57 (step S55), and then the command register 71 in the communication control device 57 is set, and the main routine of FIG. Return to.

  When the command register 71 in the communication control device 57 is set in this way, the transmission / reception controller 75 sends the number of prize balls written in the transmission data buffer 68 to the discharge control device 42 via the transmitter 73, and the discharge control device. 42 discharges the designated number of prize balls.

  Thus, when returning from the prize ball control process to the main routine, the CPU core 52 proceeds to an input process of the start switch 46 for starting the variable display game using the display control device 41 in step S29. The input process of the start switch 46 is shown in detail in FIG. When the process proceeds to the input process of the start switch 46, the CPU core 52 checks in step S43 whether the start switch 46 is turned on in accordance with winning in the specific area. If the start switch 46 is not turned on, the process directly returns to the main routine. On the other hand, if the start switch 46 is turned on, "1" is added to the first register area for storing the start hole count prepared in the RAM 53 in step S44. As described above, the register count value is subtracted in step S57 of FIG. 17 in accordance with the execution of the prize ball discharge to the starting hole.

  Subsequently, in step S45, the CPU core 52 checks whether or not the count value in the second register area for storing the start hole count in the RAM 53 is “4” or less. In the present embodiment, the number of rights for starting a variable display game using the display control device 41 can be maintained up to a maximum of “4”, but more than that, even if the start switch 46 is operated, it overflows. Therefore, if the count value in the second register area for starting hole count storage exceeds “4”, the process returns to the main routine as it is, and if it is “4” or less, the second register area for starting hole count storage is set to 1. After the addition (S46), a random number for determining the result of the variable display game is acquired.

  More specifically, a random number creation area for creating a random number and a random number storage area for storing a random number value for determining a special symbol acquired from the random number creation area are allocated in the RAM 53. For example, when the probability is 1/200, the content is cyclically updated in the “random number creation area addition step S30” for each interrupt process of the main routine between (0 to 199). In step S47, the CPU core 52 reads the numerical value in the random number generation area (that is, the numerical value incremented between 0 and 199), stores the numerical value in the random number storage area in step 48, and returns to the main routine. To do. In the main routine, the random number generation area is added in step S30. However, since the start switch 46 is not turned on every time interrupt processing is performed, the obtained random number value is random.

  After adding the random number generation area in step S30 of the main routine, in step S31, normal processing and symbol variation are performed in accordance with the process number (the process number is stored in the register area for storing the process number prepared in the RAM 53). The process branches to any one of processing, jackpot processing, and loss processing, and after each branch processing, external information processing (information transmission to the centralized management device, etc.) of step S36 to step S40, output processing (output of various solenoids, etc.) , Lamp LED processing (processing for lighting decorative lamps, etc.), sound output processing (sound effect generation processing), fraud monitoring processing (monitoring processing of various fraudulent acts), etc. are executed in sequence, and at the next interrupt timing, step S28 Return to.

  When the register area for storing the process number indicates “normal process”, the process jumps to “normal process” in step S60 of FIG. 18, and the contents of the second register area for starting hole count storage are viewed in step S61. This second register area for storing the start hole count is added in step S46 of FIG. 16 when the start switch 46 is turned on, and the second register area for storing the start hole count indicates "0". In steps S71 and S72, normal display data is set in the transmission data buffer 68 of the communication control device 58, and a transmission command is set in the command register 71 of the communication control device 58, and the process returns to the main routine. As the command register 71 is set in this manner, the transmission / reception controller 75 of the communication control device 58 serially transmits the normal display data written in the transmission data buffer 68 to the display control device 41 via the transmitter 73. The display control device 41 performs normal display. When the second register area for starting hole count storage is determined to be “0” in step S61, the process number change process is not performed. Therefore, in the branch process in step S31 repeated for each interrupt request, Until the second register area for starting hole count storage becomes “1” or more, the process branches to “normal processing” in FIG.

  On the other hand, if the second register area for starting hole count storage is “1” or more in step S61, “1” is subtracted from the second register area for starting hole count storage in step S62, and then in the RAM 53 in step S63. The random number value in the random number storage area (the numerical value written in step S48 described above) is read and compared with a predetermined determination value in step S64. As a result, if the random number value read from the random number storage area is a numerical value corresponding to the jackpot, the jackpot stop information (for example, display data “7.7.7”) is transmitted to the transmission data buffer of the communication controller 58 in step S66. 68, the big hit flag is set in the RAM 53 in step S67, and the process proceeds to step 69. If the random number is a value other than the jackpot, in step S68, loss stop information (for example, display data other than “7.7.7”) is set in the transmission data buffer 68 of the communication control unit 58. In this case, the big hit flag is not set and the routine proceeds to step 69. In step S69, the command register 71 of the communication control device 58 is set. In step S70, the processing number flag in the RAM 53 is changed to "symbol fluctuation processing", and the process returns to the main routine. The process proceeds to the symbol variation process of FIG. 19 by branching with the process number of step S31 corresponding to the request. Then, when the command register 71 is set, the communication control device 58 displays the data (“big hit stop information” or “missing stop information”) set in the transmission data buffer 68 via the transmitter 73. Serially transmitted to the control device 41.

  On the other hand, when the display control device 41 receives the “hit stop information” or “offset stop information”, the display design of the variable display device outside the figure is updated, and the display design changes when the received stop information is obtained. Is transmitted to the communication control device 58, indicating that the change of the symbol has been stopped. When the communication controller 58 receives this information via the receiver 72, the transmission / reception controller 75 sets the status register 70 and sets the received data in the reception data buffer 69.

  When the processing unit for the gaming machine branches to the symbol variation process of FIG. 19 by branching to the process number of step S31 at the next interrupt timing, the status register 70 of the communication controller 58 is set (set) in step S75. If not, the process returns to the main routine and is executed after the branch processing at the next interrupt timing.) If so, the content of the reception data buffer 69 of the communication control device 58 is read at step S76, and at step S77. It is determined whether or not it is variation stop information (information indicating that the variation of the symbol has been stopped). As a result, if it is confirmed that the variation stop information is present, whether or not a big hit flag is set in the RAM 53 in step S78. Is determined. This jackpot flag is set in step S67 when a jackpot is generated as a result of the random number determination in step S65 of the normal processing of FIG. 18 already described. If the jackpot flag is set in the RAM 53, the CPU core 52 is set. In step S79, the contents of the process number register in the RAM 53 are changed to a process number indicating a jackpot process, and in step S80, the jackpot flag in the RAM 53 is cleared and the process returns to the main routine. If the big hit flag is not set, the contents of the process number register in the RAM 53 are changed to the process number indicating the loss process in step S81, and the process returns to the main routine.

  Then, when branching to the jackpot process in the branch process in step S31 of the main routine at the next interrupt timing, the process associated with the jackpot (for example, long-time opening of the variable winning device 43, the decoration display indicating the jackpot on the decoration display 45) , The sound effect generated by the jackpot from the speaker 51, the transmission of the jackpot occurrence to the management device 47, etc.), and these are transmitted to the management device in steps S36 to S39, or to the target control target device Communicated. Further, when branching is performed in the branching process in step S31 of the main routine, preparations are made for processing associated with the loss (for example, decoration display indicating a displacement on the decoration display 45, generation of a sound effect due to the displacement from the speaker 51, etc.) These are also transmitted to the management apparatus 47 in steps S36 to S39, or are transmitted to the target control target device.

  The operation up to this point is when the confirmation device 78 is not attached. Next, the operation when the confirmation device 78 is attached will be described. The confirmation device 78 is mounted using a connector for connecting the discharge control device 42 shown in FIG. Therefore, when connecting the confirmation device 78, the connector of the discharge control device 42 is pulled out, the confirmation device 78 is attached thereto, and the power supply of the arithmetic processing device 32 for gaming machines is turned on.

  FIG. 20 shows the operation on the confirmation device 78 side. In step S84, the CPU 82 on the confirmation device side 78 (see FIG. 11) performs the start switch after initialization processing such as initialization of the program counter according to the program in the ROM 83. Wait for 85 to be pressed. When the activation switch 85 is pressed, the CPU 82 turns off the normal LED 88 and the abnormal LED 89 and then transmits an activation signal to the receiver 72 of the communication control device 57 via the output port 91 and the driver 90. In response, the transmission / reception controller 75 of the communication control device 57 sets the status register 70 and writes an activation signal in the reception data buffer 69.

  On the other hand, on the side of the arithmetic processing unit 32 for gaming machines, the processing of FIG. If it is confirmed in step S4 that the status register 70 of the communication control device 57 has been set before the predetermined time set in step S11 elapses, the content of the reception data buffer 69 of the communication control device 57 is read in step S5. In S6, it is determined whether or not the signal is a regular activation signal. If no legitimate activation signal is detected, it is assumed that some device is attached for the purpose of leakage of the game program, etc., so that the system is set after the inoperable flag is set in the nonvolatile memory 56 in step S9. Hang up. If it is determined in step S6 that the signal is a normal activation signal, 1 is added to the value stored in the sending number memory in the nonvolatile memory 56 in step S7, and the count value in the sending number memory is set in step S8. It is determined whether or not a value (for example, 5) or more has been reached. It is unnatural to frequently perform an on-site inspection for one gaming machine, and in order to prevent leakage of a game program, etc., when the value of the number-of-transmissions memory is greater than or equal to the set value in step S8 Sets an inoperable flag in the nonvolatile memory 58 in step S9 to hang up the system.

  If the number-of-transmissions memory is equal to or less than the set value in step S8, a process for sending an accessory code (game machine ID code) is executed in step S10. More specifically, the command register 71 of the communication control device 57 is set and the accessory code is written into the transmission data buffer 68. On the communication control device 58 side, when the command register 71 is set, the transmission / reception controller 75 serially transmits the accessory code written in the transmission data buffer 68 to the connector 80 of the confirmation device 78 via the transmitter 73.

  On the other hand, the program shown in FIG. 20 is executed on the confirmation device 78 side, and it waits for the accessory code transmitted from the connector 80 to be taken in via the filter 86 and the input port 87 in step S88. Then, when the accessory code is fetched, it is determined whether or not the accessory code is normal in step S89. If the accessory code is not normal, the abnormality LED 89 does not need to be compared with the game program. Lights up to indicate that an abnormality has occurred and ends the operation. That is, it corresponds to the game authentication work performed on the confirmation device side. If it is determined in step S89 that the accessory code is normal, the CPU 82 on the confirmation device 78 side sends the confirmation device code (confirmation device ID code) to the communication control device via the output port 91 and the driver 90. The data is transmitted to 57 receivers 72. In response, the transmission / reception controller 75 of the communication control device 57 sets the status register 70 and writes the confirmation device code in the reception data buffer 69.

  After the game machine code is sent out in step S10, the game machine processing unit 32 waits for the status register 70 of the communication control device 57 to be set in step S12. When the status register 70 is set, the contents of the reception data buffer 69 are read in step S13, whether or not the confirmation device code is determined in step S14, and whether or not the code is normal in step S15. If the determination result is negative, an inoperable flag is set in the nonvolatile memory 56 in step S20 to hang up the system. That is, it corresponds to the authentication work of the confirmation device performed on the gaming machine side.

  If it is determined in step S15 that the confirmation device code is normal, the CPU core 52 on the gaming machine arithmetic processing device 32 side transmits the game program stored in the ROM 54 to the confirmation device 78 side in step S16. Needless to say, the transmission procedure is performed via the communication control device 57 as described above. The transmission of the game program is repeatedly executed until all the data is transmitted while adding the read address of the ROM 54 in steps S17 and S18. When the transmission of all the data of the game program is completed, the CPU core 52 completes the data transmission. The final information shown is transmitted to the confirmation device 78 side.

  On the other hand, on the confirmation device 78 side, the game program transmitted in step S91 is read for each transmission unit, and when the final information is confirmed in step S92, the game program read from the game machine side is loaded into the master ROM 93 attached to the socket 92. When a match is detected with the master program stored in advance (step S93), and when the coincidence of both is detected at step S94, the normal LED is turned on at 88 and the operation is terminated, and when no coincidence is detected. In step S96, the abnormal LED is turned on and the operation ends.

  The following are typical examples of aspects of the present invention other than those described in the claims.

(1)
A first storage means for storing a game program; a second storage means for storing a validity determination program for determining the validity of the game program stored in the first storage means; A game program stored in the first storage means when the validity determination program stored in the second storage means is executed and the validity of the game program stored in the first storage means is recognized. Validity determining means for allowing execution of the program, and game execution for executing the game program stored in the first storage means based on the fact that execution of the game program is permitted by the validity determining means Communication processing between the program execution means including at least the means and an external control device for executing control operations in the game process under the control of the program execution means. Processing unit for a game machine having a communication means for.

(2)
In the gaming machine arithmetic processing device according to (1), the communication means is temporarily stored in transmission data storage means for temporarily storing transmission data from the program execution means to the external control device, and in the transmission data storage means. Data transmission means for sending transmission data to the external control device, received data storage means for temporarily storing received data from the external control device to the program execution means, and the external data temporarily stored in the received data storage means Data receiving means for receiving received data from the control device, transmission state storing means for storing that the transmission data storing means holds transmission data, and storing that the received data storing means holds received data Reception status storage means, and at least the data reception means receives data from the external control device When received, the reception state storage means is set and the received data is written to the reception data storage means, and the transmission data written in the transmission data storage means based on the setting of the transmission state storage means And a transmission / reception control means for sending out the data from the data transmission means.

(3)
In the gaming machine arithmetic processing device according to (1) or (2), the gaming machine arithmetic processing device is configured to validate the gaming program via a terminal point for connecting the communication means to the external control device. The legitimacy judging means can connect the game program in response to a game program discharge request from the confirmation apparatus connected via the terminal point. An arithmetic processing apparatus for a gaming machine, comprising program discharge means for sending to the confirmation device via communication means.

(4)
(3) The arithmetic processing unit for gaming machines according to (3), further comprising: a discharge number storage unit configured by a non-volatile memory, which counts and stores the number of operations of the program discharge unit, and the validity determination unit includes the discharge number An arithmetic processing unit for a gaming machine, comprising: a disabling means for disabling the program execution means when it is determined that the count stored value of the storage means has reached a preset value.

(5)
The arithmetic processing device for gaming machines according to (1) or (2), wherein the arithmetic processing device for gaming machines includes the game program and game via a terminal point for connecting the communication means to the external control device. It can be connected to a confirmation device for determining the validity of the machine arithmetic processing device, and the validity determination means includes an identification means for determining the validity of the confirmation device, and the validity determination means includes Connected through the terminal point, provided that the verification device connected through the terminal point is authenticated by the gaming machine arithmetic processing device and the identification means is authenticated by the identification means. Arithmetic processing for a gaming machine, characterized by comprising program discharge means for sending a game program to the confirmation device via the communication means in response to a game program discharge request from the confirmation device. Apparatus.

(6)
(5) In the arithmetic processing unit for a gaming machine described in (5), the game machine includes a discharge number storage unit configured by a non-volatile memory, and counts and stores the number of operations of the program discharge unit. Characterized by comprising disabling means for disabling the program execution means when the count storage value of the storage means reaches a preset value or when the authentication of the confirmation device by the identification means is denied. An arithmetic processing device for gaming machines.

The block diagram which shows the arithmetic processing apparatus for game machines of this invention in principle. The block diagram which shows the arithmetic processing apparatus for game machines of this invention in principle. The block diagram which shows the arithmetic processing apparatus for game machines of this invention in principle. The block diagram which shows the arithmetic processing apparatus for game machines of this invention in principle. The block diagram which shows the arithmetic processing apparatus for game machines of this invention in principle. The block diagram which shows the arithmetic processing apparatus for game machines of this invention in principle. The block diagram of the control system of the game machine of the Example which applied this invention to the accessory control apparatus of the pachinko game machine. The block diagram which shows the internal structure of the arithmetic processing unit for game machines of the Example shown in FIG. The block diagram which shows the internal structure of the communication control apparatus in the arithmetic processing unit for gaming machines shown in FIG. The block diagram which shows the connection state of the accessory control apparatus with which this invention is applied, and a confirmation apparatus. The block diagram of the game program confirmation apparatus. The flowchart of the front | former part of the security program of the game machine concerning the Example of this invention. The flowchart of the middle part of the security program of the gaming machine according to the embodiment of the present invention. The flowchart of the latter part of the security program of the gaming machine according to the embodiment of the present invention. The flowchart of the game program of the game machine concerning the Example of this invention. The flowchart which shows the part of the switch input process in the game program. The flowchart which shows the part of prize ball control processing in the program for games. The flowchart which shows the part of the normal process in the game program. The flowchart which shows the part of the symbol fluctuation | variation process in the game program. The flowchart of the game program confirmation apparatus.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Game program 2 1st memory | storage means 3 Validity determination program 4 2nd memory | storage means 5 Validity determination means 6 Game execution means 7 Program execution means 8 External controller 9 Communication means 10 Transmission data storage means 11 Data reception means 12 reception data storage means 13 data transmission means 14 transmission state storage means 15 reception state storage means 16 transmission / reception control means 17 terminal 18 check device 19 program discharge means 20 discharge number storage means 21 inactivation means 22 identification means 31 accessory control Device 32 Arithmetic processing device for gaming machine 33 Crystal oscillator 34 Driver 35 Filter 36 Output port 37 Input port 38 External bus 39 Sound generator 40 Amplifier 41 Display control device 42 Ejection control device 43 Variable winning device 44 Memory display 45 Decoration display 46 External information terminal 47 Management device 48 First Seed start switch 49 Count switch 50 Continuation switch 51 Speaker 52 CPU core 53 RAM
54 ROM
55 Memory control circuit 56 Non-volatile memory 57 Communication control device 58 Communication control device 59 External bus interface 60 Internal bus 61 Clock generator 62 Reset / interrupt control circuit 68 Transmission data buffer 69 Reception data buffer 70 Status register 71 Command register 72 Receiver 73 Transmitter 74 Baud rate generator 75 Transmission / reception controller 76 Mode register 77 Bus 78 Confirmation device 82 CPU
85 Start switch 88 Normal LED
89 Abnormal LED
92 Socket 93 Master ROM

Claims (1)

A first storage means for storing a game program; a second storage means for storing a validity determination program for determining the validity of the game program stored in the first storage means; A game program stored in the first storage means when the validity determination program stored in the second storage means is executed and the validity of the game program stored in the first storage means is recognized. Validity determining means for allowing execution of the program, and game execution for executing the game program stored in the first storage means based on the fact that execution of the game program is permitted by the validity determining means A program execution means including at least a means, and an external control device for executing a control operation in the game process under the control of the program execution means, connected via a terminal point, In the processing unit for a game machine having a communication means for performing signal processing,
The arithmetic processing device for gaming machines can be connected to a confirmation device for determining the legitimacy of the gaming program via the terminal points,
The legitimacy determining means includes program discharge means for sending a game program to the confirmation device via the communication means in response to a game program discharge request from the confirmation device connected via the terminal point. Equipped,
The arithmetic processing device for gaming machines is constituted by a non-volatile memory, and includes a discharge number storage unit that counts and stores the number of operations of the program discharge unit,
The gaming machine characterized in that the legitimacy judging means comprises a disabling means for disabling the program executing means when it is determined that the count stored value of the discharge number storing means has reached a preset value. Arithmetic processing unit.

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