JP3006613B2 - Game equipment control device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a control device for a game machine, comprising a central processing unit and a plurality of peripheral devices, for controlling the operation of the game machine.

[0002]

2. Description of the Related Art In recent years, there has been a remarkable spread of microcomputers, and microcomputers are widely used in game machines such as pachinko machines and game machines.

A microcomputer includes a central processing unit (hereinafter, referred to as a CPU), a ROM as a storage unit, and a ROM.
The basic configuration of an AM and an input / output interface as an input / output unit. For example, a pachinko machine equipped with a so-called digital pachinko machine that creates a prize such as a big hit by a combination of three-digit numbers, etc. Works like that.

The detection signal of the digital start winning switch is taken in from the input / output interface, and the CPU
If the detection signal is in the ON state, the digital center accessory is started via the input / output interface and stopped at a predetermined timing. Further, when the digital stops and the digital numbers and symbols become a big hit combination, the CPU opens a special winning opening via the input / output interface.

[0005] The digital design of the center character is
The data of the symbol previously stored in the ROM is extracted, and the variation of the symbol is determined based on a random number table also stored in the ROM in advance.

[0006]

By the way, in such a game machine such as a pachinko machine, the probability that a prize such as a payout appears is greatly fluctuated in a short term to improve the playability.
In the long term, it was necessary to stabilize the balance between the profits of the player and the playground.

However, in such a conventional pachinko machine, since the probability of payout is determined by a random number table, the probability of payout can be reduced simply by replacing the ROM with another random number table. It could be changed easily. Such injustices are performed by the manager of the amusement arcade or by the clerk of the amusement arcade without knowing the administrator of the amusement arcade, but it has been difficult to find out.

The control device for a game machine according to the present invention has been made in view of the above problems. For example, in a pachinko machine, it is possible to control the probability of a payout by preventing unauthorized replacement of CPU peripheral devices. The purpose is to prevent unauthorized modification.

[0009]

Means for Solving the Problems and Their Functions and Effects In order to solve such a problem, a control device for a game machine according to the present invention provides an operation of a game machine for playing a game based on a probability.
A central processing unit and the central processing unit.
Connected to the processing unit via the address bus and the data bus.
Is, a plurality of peripheral devices for performing an operation related to the game
The control device of the gaming device equipped, on at least one of the peripheral device, an identification information storage means for storing the peripheral device-specific identification information, said A from said central processing unit
The identification information is independent of the address signal via the dress bus.
Providing an external enable output identification information output means to broadcast
To determine whether the identification information is legitimate or not.
And as its gist that which enables.

In the control device for a game machine of the present invention configured as described above, the address signal from the central processing unit is not used.
Specific identification information is output to the relationship by the identification information output means
Is done. For this reason, the output identification information is
Can be identified.

[0011] Therefore, when the peripheral device is not authorized, since no valid identification information is output,
The control can identify non-authorized
It works. For this reason, it is possible to detect the use of an unauthorized ROM or the like, and , for example, in a pachinko machine, it is possible to detect an unauthorized operation of operating the probability of payout.

[0012]

Next, a preferred embodiment of the present invention will be described in detail with reference to the drawings. FIG. 1 shows the first embodiment of the present invention.
It is a block diagram which shows the principal part of the control system of the pachinko machine which mounts the control apparatus of the game machine which is an Example.

As shown in FIG. 1, the control device of the gaming machine of the first embodiment comprises a CPU (central processing unit) 1
It is mainly configured. The CPU 1 has a ROM (read only memory) 3 as a peripheral device and a RAM (random accumulator).
ess memory) 5 and the input / output interface 7 are integrated and controlled and perform all arithmetic or logical operations applied to the data. In the case of this embodiment, an 8-bit microprocessor incorporates a program described later as firmware.

The ROM 3 is a read-only memory, in which a control program and various data necessary for the CPU 1 to execute arithmetic processing are recorded in advance. Here, the various data is a random number table or the like for generating random numbers for determining a jackpot, including data of symbols to be displayed on a digital (display device) of the center role.

The RAM 5 is a readable and writable memory in which various data necessary for the CPU 1 to execute arithmetic processing are temporarily read and written.

The input / output interface 7 is connected to a prize switch 13 of the pachinko machine main body via a waveform shaping circuit 11.
Data is input from the digital start winning switch 14 and the like, and via the driver 15 to the hit lamp 17 of the pachinko machine main body, the display device 18 which is a digital part of the center role, the solenoid 19 for opening the big winning opening, and the like. Output data.

The ROM 3 has a delay unit 3a which delays by a predetermined time 10 msec, and a code 0001 stored in advance.
And a code generator 3b that outputs a code 0001 from the code generator 3b by operating the delay unit 3a when a first read signal is input after power-on or reset. Further, the input / output interface 7 includes a delay unit 7a that delays by a predetermined time of 20 msec,
A code generator 7b for outputting a code 0002 stored in advance is built in, and when power is turned on or a first read signal is input after a reset, the delay unit 7a is operated to output the code 0002 from the code generator 7b. Output.

CPU 1 and these peripheral devices, ie, ROM
Next, the signal path between the RAM 5 and the input / output interface 7 will be described.

An address bus B1 and a data bus B2 are provided as main signal lines between the CPU 1 and these peripheral devices.
Is connected. In addition, as a control bus,
A read signal line L1 is connected between the CPU 1 and these peripheral devices, and a write signal line L2 is connected between the CPU 1, the RAM 5, and the input / output interface 7.

Note that AND circuits 21 and 23 are provided in the middle of each read signal line L1 connected to the ROM 3 and the input / output interface 7. A control signal line L3 from the CPU 1 is connected to the other input terminal of the AND circuit 21 via a knot circuit 25, and a control signal line L4 from the CPU is connected to the other input terminal of the AND circuit 23. It is connected via a circuit 27.

Next, how data is exchanged between the CPU 1 and these peripheral devices will be described.

When writing data to the RAM 5, the CPU 1 first sets the address to be written to the address bus B1.
Output to The RAM 5 connects only the memory cell at that address to the data bus B2. Next, the CPU 1 outputs data from the data bus B2 and outputs a write signal from the write signal line L2. The RAM 5 writes the data on the data bus B2 to the memory cell at that address.

On the other hand, when reading data from the RAM 5, first, the address to be read is output from the CPU 1 to the address bus B1. The RAM 5 connects only the memory cell at that address to the data bus B2, and outputs data from the memory cell at that address to the data bus B2. Then C
PU1 outputs a read signal from read signal line L1, and reads data on the data bus.

When reading data from the ROM 3,
The same data exchange as when data is read from the RAM 5 is performed. Moreover, in this case, the CPU
By preventing the read signal output from 1 from reaching the ROM 3, reading of data from the ROM 3 can be disabled. When the signal output from the CPU 1 to the signal line L3 is at a low level (hereinafter simply referred to as [L]), the signal output from the knot circuit 25 is at a high level (hereinafter simply referred to as [H]), The read signal reaches the ROM 3 via the AND circuit 21.
This is because when the signal output to the signal line L3 becomes [H], the signal output from the knot circuit 25 becomes [L] and the read signal is cut off by the AND circuit 21.

When data is read from the input / output interface 7, similarly to the case where data is read from the ROM 3, the signal output to the signal line L4 is set to [H] so that the data cannot be read. .

Thus, the CPU 1 executes the following processes (1) to (4) while exchanging data with the peripheral device.

(1) Receiving the detection signal of the prize switch 13 and discharging the prize ball while turning on the hit lamp 17, (2) receiving the detection signal of the digital start prize switch 14 and (3) When the digital is stopped, it is determined whether or not the digital symbol matches the big hit combination. When it is determined that the digital symbols match, the solenoid 1 is turned off.
9 to open the special winning opening by driving 9 (4) ROM3
Fraud prevention processing that prohibits execution when peripheral devices such as are illegally replaced.

The processing of the above (2) is to read out the random number table stored in the ROM 3, read out the symbols based on the random number table from the symbol data also stored in the ROM 3, and display them sequentially on the display device 18. Done.

The above processes (1) to (3) are executed by a control program read from the ROM 3, and
The process (4) is executed by a control program built in the CPU 1.

Next, regarding the fraud prevention processing of the above (4),
This will be described in detail with reference to the flowchart of FIG.

This fraud prevention process is executed first after power is turned on or after reset. When the process is started, first, an initialization process for setting initial values to various variables such as a table is executed (step 100). Next, a read signal is output to the ROM 3 and the input / output interface 7 via the read signal line L1 (step 110).

As a result, in the ROM 3, the delay 3a
Operates, and after a lapse of 10 msec, the code 0001 is output from the code generator 3b. In the input / output interface 7, the delay device 7a operates, and after elapse of 20 msec,
Code 0002 is output from code generator 7b.

After execution of step 110, CPU 1 executes R
It is determined whether or not there is data output from the OM 3 (step 120).
Then, the code CROM, which is the data, is taken in from Step 3 (Step 130).

Subsequently, it is determined whether or not data is output from the input / output interface 7 (step 140).
If it is determined that there is data output, the code CIO, which is the data, is fetched from the input / output interface 7 (step 150).

Subsequently, it is determined whether or not the code CROM fetched in step 130 is equal to the code 0001 (step 160). Here, if both are determined to be equal, the process proceeds to the next step, while if it is determined that they are not equal, the output of the port to which the signal line L3 on the ROM side is connected is fixed to [H]. (Step 170).

Subsequently, it is determined whether or not the code CIO fetched in step 150 is equal to the code 0002 (step 180). Here, if both are determined to be equal, the process proceeds to the next step, while if it is determined that they are not equal, the output of the port to which the signal line L4 on the input / output interface side is connected is set to [H]. (Step 190). Thereafter, the process exits to "EXIT" and terminates the fraud prevention process.

The CPU by the fraud prevention processing having such a configuration.
Operation 1 will be described with reference to the timing chart of FIG.

After the power is turned on or after the reset, first, a read signal is output to the read signal line L1. 10 msec after the output of the read signal, the data bus B
2 and the code is not the predetermined 0001, the signal line L on the ROM side
The output of the port to which 3 is connected is fixed to [H]. As a result, the read signal is cut off by the AND circuit 21 and R
Reading data from the OM3 is no longer possible. Also, 20 msec after the output of the read signal, code data is input from the input / output interface 7 via the data bus B2, and the code is set to a predetermined 00.
If not 02, the signal line L on the input / output interface side
The output of the port to which 4 is connected is fixed to [H]. As a result, the read signal is cut off by the AND circuit 23, and reading of data from the input / output interface 7 becomes impossible thereafter.

Therefore, if the ROM 3 is exchanged illegally, the ROM 3 after the exchange cannot be provided with the delay unit 3a and the code generator 3b. , R
The signal [H] is output to the signal line L3 on the OM side,
Reading data from M3 will not be possible thereafter.
As a result, unauthorized replacement of the ROM 3 can be prevented, and unauthorized manipulation of the probability of payout can be prevented. Similarly, with regard to the input / output interface 7, unauthorized exchange can be prevented.

Next, a second embodiment of the present invention will be described. First
In the embodiment, the ROM 3 and the input / output interface 7
Is input via AND circuits 21 and 23. Instead, in the second embodiment, as shown in FIG. 4, the read signal is directly input to ROM 3 and input / output interface 7. Is input.

Further, as shown in FIG. 5, in the fraud prevention processing executed by the CPU 1, the step 170 of the first embodiment is replaced with the first cell T of a preset table.
Substitute the value 1 into BL (1) (step 200), and
Instead of step 190 of the first embodiment, a value of 1 is assigned to the second cell TBL (2) of the table (step 210).

Then, in another process executed by the CPU 1,
It is determined whether or not the value 1 has been assigned to each cell of the table. If the value 1 has been assigned to TBL (1), reading of data from the ROM 3 is performed in various processes executed by the CPU 1 thereafter. When the value 1 is assigned to TBL (2), reading of data from the input / output interface 7 is prohibited in various processes executed by the CPU 1 thereafter.

In the control device for the game machine of the second embodiment configured as described above, the illegal exchange of the ROM 3 and the input / output interface 7 is prevented, as in the first embodiment.
It is possible to prevent fraud such as manipulating the probability of a ball coming out. Moreover, in the case of the present embodiment, the prohibition of reading data from the ROM 3 and the input / output interface 7 is realized by software executed by the CPU 1, so that the configuration can be simplified.

In the first embodiment and the second embodiment, the code of 0001 is used as the identification information of the ROM 3 and the code of 0002 is used as the identification information of the input / output interface 7. The set value may be used, and fraud prevention can be more reliably prevented.

Further, a part or all of the control program stored in the peripheral device is encoded in advance, and encoded information corresponding to an execution part of the control program is always or always or predeterminedly or as required as identification information. Output to the CPU from the peripheral device at the timing.
May prohibit access to the peripheral device when it determines that the encoded information is not valid.
According to such a configuration, it is possible to prevent an unauthorized change of the control program of the peripheral device.

Further, in the first and second embodiments, the access prohibiting means M1c is configured to prohibit reading of data from the ROM and the input / output interface. May be configured to stop the operation itself and indirectly stop the operation of those peripheral devices.

Although several embodiments of the present invention have been described in detail, the present invention is not limited to these embodiments, and may be implemented in various modes without departing from the gist of the present invention. Of course, it can be implemented.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a main part of a control system of a pachinko machine equipped with a control device of a game machine according to a first embodiment.

FIG. 2 is a flowchart showing a fraud prevention process executed by a CPU.

FIG. 3 is a timing chart of an operation by the fraud prevention processing.

FIG. 4 is a block diagram showing a part of a control device of a game machine according to a second embodiment.

FIG. 5 is a flowchart illustrating a fraud prevention process executed by a CPU according to a second embodiment.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... CPU 3 ... ROM 3a ... Delay device 3b ... Code generator 5 ... RAM 7 ... Input / output interface 7a ... Delay device 7b ... Code generator 21, 23 ... AND circuit 25, 27 ... Not circuit B1 ... Address bus B2 ... Data bus L1… Read signal line

Claims (1)

(57) [Claims] 1. A game machine for playing a game based on a probability.
A control device for controlling the operation, a central processing unit, and an address bus and a data bus to the central processing unit.
Connected, in the control device of the game device and a plurality of peripheral devices for performing an operation related to the game, at least one of the peripheral device, an identification information storage means for storing the peripheral device-specific identification information, the Addresses from the central processing unit via the address bus
Signal that can output the identification information to the outside regardless of the address signal.
By providing separate information output means , the identification information
A control device for a game machine, wherein it is possible to identify whether or not the game device is legitimate .