JPH07283006A - Electric element substrate and production thereof - Google Patents
Electric element substrate and production thereofInfo
- Publication number
- JPH07283006A JPH07283006A JP6100719A JP10071994A JPH07283006A JP H07283006 A JPH07283006 A JP H07283006A JP 6100719 A JP6100719 A JP 6100719A JP 10071994 A JP10071994 A JP 10071994A JP H07283006 A JPH07283006 A JP H07283006A
- Authority
- JP
- Japan
- Prior art keywords
- electric element
- resistance pattern
- element substrate
- substrate
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Parts Printed On Printed Circuit Boards (AREA)
- Apparatuses And Processes For Manufacturing Resistors (AREA)
- Non-Adjustable Resistors (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は電気素子基板、特にサー
メット抵抗体及び／又はサーメット電極を基板上に設け
た電気素子基板、及びその製造方法に関するものであ
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electric element substrate, particularly an electric element substrate having a cermet resistor and / or a cermet electrode provided on the substrate, and a method for manufacturing the same.
【０００２】[0002]
【従来の技術】従来のサーメット抵抗体を用いた可変抵
抗器用の電気素子基板１５は図９乃至図１１に示すよう
に、アルミナ基板７上に銀・パラジュウムを主成分とす
る導体ペーストを印刷して電極部３を形成し、次に酸化
ルテニウムを主成分とする抵抗体ペーストを電極部３の
両端に一部が重なるように印刷して抵抗パターン部２を
形成し、焼成していた。2. Description of the Related Art As shown in FIGS. 9 to 11, an electric element substrate 15 for a variable resistor using a conventional cermet resistor has an alumina substrate 7 on which a conductor paste containing silver and palladium as a main component is printed. Then, the electrode portion 3 is formed by using a resistor paste containing ruthenium oxide as a main component so that both ends of the electrode portion 3 are partially overlapped with each other to form the resistance pattern portion 2, which is then fired.
【０００３】[0003]
【発明が解決しようとする課題】上記の従来例では図１
１に示すように抵抗体パターン部２の表面粗さが約２μ
ｍあるのに加え、基板７と抵抗パターン部２との段差が
約１０μｍ、基板７上の抵抗パターン部２と電極部３上
の抵抗パターン部２との段差が約５μｍある。抵抗パタ
ーン部２のサーメット抵抗体は一般に可変抵抗器のブラ
シ（図示せず）よりも固いため、ブラシがこれら段差の
摺動をくり返すと、ブラシが著しく摩耗するという問題
があった。またブラシが段差を摺動するとき、ブラシが
とんで抵抗パターン部２から一時的に離接し、ノイズを
発生したりブラシ先端と抵抗パターン部２との間で放電
を起して抵抗体自体を破損するという問題があった。ま
た図示していないが、アルミナ基板上に所望パターンの
サーメット電極を設け、該サーメット電極上にブラシを
摺接させてスイッチの切換えを行うようにした従来のス
イッチ用の電気素子基板においても、上記可変抵抗器用
の電気素子基板と同様に基板面と電極部との段差が約５
μｍあり、ブラシが段差の摺動をくり返すとブラシが著
しく摩耗し、またブラシが段差を摺動するとき、ブラシ
がとんで基板から一時的に離接し、ノイズを発生したり
ブラシと電極部との間で放電を起して電極部を破損する
という問題があった。In the above-mentioned conventional example, FIG.
As shown in 1, the surface roughness of the resistor pattern portion 2 is about 2μ.
In addition, the step between the substrate 7 and the resistance pattern section 2 is about 10 μm, and the step between the resistance pattern section 2 on the substrate 7 and the resistance pattern section 2 on the electrode section 3 is about 5 μm. Since the cermet resistor of the resistance pattern portion 2 is generally harder than the brush (not shown) of the variable resistor, there is a problem that the brush is significantly worn when the brush repeats sliding of these steps. Further, when the brush slides on the step, the brush jumps and temporarily separates from and comes in contact with the resistance pattern portion 2 to generate noise or generate discharge between the tip of the brush and the resistance pattern portion 2 so that the resistor itself may be removed. There was a problem of damage. Although not shown, a cermet electrode having a desired pattern is provided on an alumina substrate, and a brush is slidably contacted on the cermet electrode to switch the switch, so that the electrical element substrate for a switch also has the above-mentioned structure. Similar to the electric element board for the variable resistor, there is about 5 steps between the board surface and the electrode part.
μm, when the brush repeatedly slides on the step, the brush is significantly worn, and when the brush slides on the step, the brush jumps and temporarily comes in contact with and separates from the substrate, generating noise and the brush and the electrode part. There was a problem that an electric discharge was caused between the electrode and the electrode to damage the electrode part.
【０００４】本発明の目的は上記の問題を解決し、基
板、電極部及び抵抗パターン部間の段差を小さくしてブ
ラシ摺動時のブラシ摩耗及びブラシのとびを抑えた電気
素子基板を提供することにある。An object of the present invention is to solve the above problems and to provide an electric element substrate in which the step between the substrate, the electrode portion and the resistance pattern portion is reduced to suppress brush abrasion and brush jumping during brush sliding. Especially.
【０００５】[0005]
【課題を解決するための手段】上記の課題を解決するた
めに、本発明の電気素子基板は無機質基板に電極部及び
抵抗パターン部を埋設し、基板、電極部及び抵抗パター
ン部間の段差を２μｍ以下にしている。表面粗さは０．
５μｍ以下であることが好ましい。また、本発明の電気
素子基板は、無機質基板に電極部を埋設し、基板及び電
極部間の段差を２μｍ以下にしている。表面粗さは０．
５μｍ以下であることが好ましい。グリーンシートはア
ルミナ粉、Ｎａ・Ｐｂ・Ｚｎを主成分とするガラスを含
むことが好ましく、また電極材料は銀・パラジウムを含
むことが好ましく、さらにまた抵抗体材料は酸化ルテニ
ウムを含むことが好ましい。本発明のグリーンシートに
電極部及び抵抗パターン部を埋設した電気素子基板の製
造方法は、シート上に抵抗体材料及び電極材料を塗布し
て抵抗パターン部及び電極部を形成し乾燥させた後、抵
抗パターン部及び電極部上にグリーンシートを重ねて加
熱加圧し、次いでシートを剥離してグリーンシート、抵
抗パターン部及び電極部を焼成している。また、本発明
の製造方法として、シート上に抵抗体材料及び電極材料
を塗布して抵抗パターン部及び電極部を形成し乾燥させ
た後、抵抗パターン部及び電極部上に第１の絶縁インク
を塗布し、第２の絶縁インクを塗布した基板上に第１の
絶縁インク面と第２の絶縁インク面とが重なり合うよう
にシートを重ね合わせて加熱加圧し、次いでシートを剥
離して基板、抵抗パターン部及び電極部を焼成してもよ
い。本発明のグリーンシートに電極部のみを埋設した電
気素子基板の製造方法はシート上に電極材料を塗布して
乾燥させた後、電極上にグリーンシートを重ねて加熱加
圧し、次いでシートを剥離してグリーンシート及び電極
を焼成している。また、その他の製造方法としてシート
上に電極材料を塗布して電極部を形成し乾燥させた後、
第２の絶縁インクを塗布した基板上に第１の絶縁インク
面と第２の絶縁インク面とが重なり合うようにシートと
基板とを重ね合せて加熱加圧し、次いでシートを剥離し
て基板及び電極部を焼成してもよい。抵抗パターン部ま
たは電極部は焼成後、表面を研磨することが好ましい。
シートはポリプロピレンフィルム、ポリフェニレンオキ
サイドフィルムまたは表面をシリコンコーティングした
ＰＥＴフィルムであることが好ましく、第１の絶縁イン
クと第２の絶縁インクはグリーンシートを溶剤に溶かし
たものであることが好ましい。さらにまた基板はアルミ
ナ基板であることが好ましい。In order to solve the above-mentioned problems, the electric element substrate of the present invention is such that an electrode portion and a resistance pattern portion are embedded in an inorganic substrate to form a step between the substrate, the electrode portion and the resistance pattern portion. 2 μm or less. The surface roughness is 0.
It is preferably 5 μm or less. Further, in the electric element substrate of the present invention, the electrode portion is embedded in the inorganic substrate, and the step between the substrate and the electrode portion is 2 μm or less. The surface roughness is 0.
It is preferably 5 μm or less. The green sheet preferably contains alumina powder and glass containing Na.Pb.Zn as a main component, the electrode material preferably contains silver and palladium, and the resistor material preferably contains ruthenium oxide. A method for manufacturing an electric element substrate in which an electrode portion and a resistance pattern portion are embedded in a green sheet of the present invention, a resistor material and an electrode material are applied on a sheet to form a resistance pattern portion and an electrode portion, and after drying, A green sheet is superposed on the resistance pattern portion and the electrode portion, heated and pressed, and then the sheet is peeled off to fire the green sheet, the resistance pattern portion and the electrode portion. In addition, as a manufacturing method of the present invention, a resistor material and an electrode material are applied on a sheet to form a resistance pattern portion and an electrode portion and dried, and then a first insulating ink is applied on the resistance pattern portion and the electrode portion. A sheet is superposed on the substrate coated with the second insulating ink so that the first insulating ink surface and the second insulating ink surface overlap with each other and heated and pressed, and then the sheet is peeled off to remove the substrate and the resistance. You may bake a pattern part and an electrode part. The method for producing an electric element substrate in which only the electrode part is embedded in the green sheet of the present invention is as follows. The green sheet and electrodes are fired. Also, as another manufacturing method, after applying an electrode material on a sheet to form an electrode portion and drying,
The sheet and the substrate are superposed and heated and pressed so that the first insulating ink surface and the second insulating ink surface overlap with each other on the substrate coated with the second insulating ink, and then the sheet is peeled off to remove the substrate and the electrode. The parts may be fired. The surface of the resistance pattern portion or the electrode portion is preferably polished after firing.
The sheet is preferably a polypropylene film, a polyphenylene oxide film, or a PET film whose surface is coated with silicon, and the first insulating ink and the second insulating ink are preferably green sheets dissolved in a solvent. Furthermore, the substrate is preferably an alumina substrate.
【０００６】[0006]
【実施例】以下図１〜図５を参照して本発明の可変抵抗
器用の電気素子基板の第１実施例を説明する。なお各実
施例の同一構成要素には同一番号を付することとする。
図１（ａ）において剥離性のよいポリプロピレンフィル
ム１上に、スクリーン印刷法にて酸化ルテニウム等を主
成分とするサーメット抵抗インクを印刷して抵抗パター
ン部２を形成し、温度約１００℃で１０分間乾燥させ
る。次にこの抵抗パターン部２の端部に一部が重なるよ
うに銀、銀及びパラジウム、または銀及び白金を主成分
とする導体ペーストをスクリーン印刷法にて印刷して電
極部３を形成し、温度約１００℃で１０分間乾燥させ
る。次に、上記ポリプロピレンフィルム１上に形成され
た抵抗パターン部２及び電極部３を、アルミナ粉、Ｎａ
・Ｐｂ・Ｚｎを主成分とするガラス及びセルロース系の
有機バインダーからなる厚さ０．７ｍｍのグリーンシー
ト４上に図１（ｂ）に示すように重ね合せ、温度約５０
℃、圧力約５０ｋｇ／ｃｍ2 の条件下で加圧接着後、図
１（ｃ）に示すようにポリプロピレンフィルム１を剥離
して、抵抗パターン部２及び電極部３を埋設したグリー
ンシートを得る。ここで使用するフィルムは、電極ペー
スト及び抵抗ペーストを印刷した時にペーストのはじき
が少なく、かつ乾燥後の剥離性に優れたものが好まし
く、ポリプロピレンフィルムの他にポリフェニレンサル
ファイドフィルムやシリコーンコーティングしたＰＥＴ
フィルムも使用できる。次に図２の温度プロファイルで
脱バインダー後、図３の温度プロファイルで焼成すると
図１（ｄ）に示すように全体が収縮した電気素子基板５
が得られる。ここでグリーンシート４は抵抗パターン部
２と同じ条件で焼成できるものであれば特にその組成は
問わない。最後に、本発明によれば、基板、抵抗パター
ン部及び電極部間の段差を表面研磨が可能な程小さくす
ることができるので、表面の平滑性を上げるために、日
本エンギス株式会社製の商品名、ハイプレスケントマー
ク３を使用して抵抗パターン部２、電極部３を含むグリ
ーンシート４表面を研磨した。東京精密製表面粗さ形状
測定機サーフコム２００Ｃを用いて図４のＡ−Ａ線に沿
って表面を走査したところ、図５に示すごとく絶縁部
（基板部）、電極部及び抵抗パターン部間の段差は１μ
ｍ以下で、かつ表面粗さは最大０．５μｍ以下の良好な
平滑性が得られた。これは従来と比較して１／１０程度
の粗さであり、ブラシの摩耗及びブラシのとびを大きく
低減することができた。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of an electric element substrate for a variable resistor according to the present invention will be described below with reference to FIGS. The same components in each embodiment will be assigned the same reference numerals.
In FIG. 1A, a cermet resistance ink containing ruthenium oxide or the like as a main component is printed on a polypropylene film 1 having good peelability to form a resistance pattern portion 2, and the resistance pattern portion 2 is formed at a temperature of about 100 ° C. for 10 minutes. Let dry for minutes. Next, a conductive paste containing silver, silver and palladium, or silver and platinum as a main component is printed by a screen printing method so as to partially overlap the end portion of the resistance pattern portion 2 to form the electrode portion 3. Dry for 10 minutes at a temperature of about 100 ° C. Next, the resistance pattern portion 2 and the electrode portion 3 formed on the polypropylene film 1 were treated with alumina powder and Na.
As shown in FIG. 1B, the green sheet 4 made of Pb / Zn as a main component and made of a cellulose-based organic binder is superposed on the green sheet 4 at a temperature of about 50.
After pressure bonding at a temperature of 50 ° C. and a pressure of about 50 kg / cm 2 , the polypropylene film 1 is peeled off as shown in FIG. 1C to obtain a green sheet in which the resistance pattern portion 2 and the electrode portion 3 are embedded. The film used here is preferably one that has little repellency of the paste when printed with an electrode paste and a resistance paste and has excellent releasability after drying. In addition to polypropylene film, polyphenylene sulfide film or PET coated with silicone is preferable.
Film can also be used. Next, after removing the binder with the temperature profile of FIG. 2 and firing with the temperature profile of FIG. 3, the entire electric element substrate 5 contracted as shown in FIG. 1D.
Is obtained. Here, the composition of the green sheet 4 is not particularly limited as long as it can be fired under the same conditions as the resistance pattern portion 2. Finally, according to the present invention, the step between the substrate, the resistance pattern portion and the electrode portion can be made as small as possible for surface polishing. Therefore, in order to improve the smoothness of the surface, a product manufactured by Nippon Engis Co., Ltd. The surface of the green sheet 4 including the resistance pattern portion 2 and the electrode portion 3 was polished using the high press Kent mark 3. When the surface was scanned along the line AA in FIG. 4 using the surface roughness profile measuring instrument Surfcom 200C manufactured by Tokyo Seimitsu Co., Ltd., the insulating portion (substrate portion), the electrode portion and the resistance pattern portion were The step is 1μ
Good smoothness with a surface roughness of 0.5 m or less and a maximum surface roughness of 0.5 μm or less was obtained. This has a roughness of about 1/10 of that of the conventional one, and the abrasion of the brush and the jump of the brush can be greatly reduced.
【０００７】次に本発明の電気素子基板の第２実施例に
ついて図６を参照して説明する。まず図６（ａ）に示す
ように、ポリプロピレンフィルム１上に第１の実施例と
同様に抵抗パターン部２及び電極部３を形成する。その
上に図６（ｂ）に示すようにアルミナ粉、Ｎａ・Ｐｂ・
Ｚｎを主成分とするガラス及びセルロース系の有機バイ
ンダーからなるグリーンシートを溶剤に溶かしてペース
ト化した絶縁インク６をその絶縁インク６の乾燥後の厚
さが約３０μｍになるように塗布する。一方図６（ｃ）
に示すように、アルミナ基板７にも上記絶縁インク６を
その絶縁インクの乾燥後の厚さが約３０μｍになるよう
に塗布し、図６（ｂ）のグリーンシート１の絶縁インク
６面と図６（ｃ）のアルミナ基板７の絶縁インク６面と
が重なり合うように図６（ｄ）のようにポリプロピレン
フィルム１を重ね合せて、温度５０℃、圧力１００ｋｇ
／ｃｍ2 の条件で加圧接着した後、図６（ｅ）に示すよ
うにフィルム１を剥離する。そして第１の実施例と同じ
条件下で脱バインダー、焼成、表面研磨を行ない、図６
（ｆ）に示すように全体が収縮した電気素子基板５を作
成した。ペースト状の絶縁インク層同志を重ね合わせて
接着したので、剥離しにくく信頼性の高い接着が可能に
なった。Next, a second embodiment of the electric element substrate of the present invention will be described with reference to FIG. First, as shown in FIG. 6A, the resistance pattern portion 2 and the electrode portion 3 are formed on the polypropylene film 1 as in the first embodiment. Alumina powder, Na.Pb.
An insulating ink 6 is prepared by dissolving a green sheet made of Zn-based glass and a cellulose-based organic binder in a solvent to form a paste so that the insulating ink 6 has a dried thickness of about 30 μm. On the other hand, FIG. 6 (c)
As shown in FIG. 6, the insulating ink 6 is applied to the alumina substrate 7 so that the thickness of the insulating ink after drying is about 30 μm, and the insulating ink 6 surface of the green sheet 1 of FIG. As shown in FIG. 6 (d), the polypropylene film 1 is overlaid so that the insulating ink 6 surface of the alumina substrate 7 of 6 (c) overlaps, and the temperature is 50 ° C. and the pressure is 100 kg.
After pressure-bonding under the condition of / cm 2 , the film 1 is peeled off as shown in FIG. Then, debindering, firing, and surface polishing were performed under the same conditions as in the first embodiment.
As shown in (f), an electric element substrate 5 having a whole contracted was prepared. Since the paste-like insulating ink layers are stacked and bonded together, it is possible to achieve reliable bonding that is difficult to peel off.
【０００８】上記第１または第２実施例において抵抗イ
ンクを塗布する工程を省き電極部３のみをグリーンシー
ト４に形成し表面研磨すると、絶縁部（基板部）と電極
部との段差が１μｍ以下で表面粗さが最大０．５μｍ以
下の良好なスイッチ用の電気素子基板が得られる。具体
的に、該電気素子基板の第３実施例について図７を参照
して説明する。図７（ａ）においてポリプロピレンフィ
ルム１上に所望パターンの電極部３を形成する。次に図
７（ｂ）に示すようにフィルム１上に形成された電極部
３をグリーンシート４に重ね合せ加圧接着後、図７
（ｃ）に示すようにフィルム１を剥離する。脱バインダ
ー後焼成し研磨すると表面粗さが最大０．５μｍ以下の
図７（ｄ）に示すようなスイッチ用の電気素子基板８が
得られる。In the first or second embodiment, when the step of applying the resistance ink is omitted and only the electrode portion 3 is formed on the green sheet 4 and the surface is polished, the step between the insulating portion (substrate portion) and the electrode portion is 1 μm or less. Thus, a good electric element substrate for a switch having a maximum surface roughness of 0.5 μm or less can be obtained. Specifically, a third embodiment of the electric element substrate will be described with reference to FIG. In FIG. 7A, the electrode part 3 having a desired pattern is formed on the polypropylene film 1. Next, as shown in FIG. 7B, the electrode portion 3 formed on the film 1 is superposed on the green sheet 4 and pressure-bonded thereto.
The film 1 is peeled off as shown in (c). When the binder is removed and then fired and polished, an electric element substrate 8 for a switch having a maximum surface roughness of 0.5 μm or less as shown in FIG. 7D is obtained.
【０００９】次に本発明のスイッチ用の電気素子基板の
第４実施例について図８を参照して説明する。図８
（ａ）においてポリプロピレンフィルム１上に電極部３
を形成し、その上に図８（ｂ）に示すようにペースト状
の絶縁インク６を塗布する。一方図８（ｃ）に示すよう
に、アルミナ基板７にもペースト状の絶縁インク６を塗
布し、図８（ｂ）のグリーンシート１の絶縁インク６面
と図８（ｃ）のアルミナ基板７の絶縁インク６面とを重
ね合せて接着後、脱バインダー、焼成、表面研磨すると
表面粗さが最大０．５μｍ以下の図８（ｆ）に示すスイ
ッチ用の電気素子基板が得られる。Next, a fourth embodiment of the electric element substrate for a switch of the present invention will be described with reference to FIG. Figure 8
In (a), the electrode part 3 is formed on the polypropylene film 1.
Is formed, and paste-like insulating ink 6 is applied thereon as shown in FIG. On the other hand, as shown in FIG. 8 (c), the paste-like insulating ink 6 is applied to the alumina substrate 7, and the insulating ink 6 surface of the green sheet 1 of FIG. 8 (b) and the alumina substrate 7 of FIG. 8 (c). After 6 layers of insulating ink are adhered to each other, the binder is removed, firing and surface polishing are performed to obtain an electric element substrate for a switch having a surface roughness of 0.5 μm or less as shown in FIG.
【００１０】[0010]
【発明の効果】本発明は、以上説明したように構成され
ているので、以下に記載されるような効果を奏する。グ
リーンシートまたはアルミナ基板に電極部及び抵抗パタ
ーン部を埋設した電気素子基板として前記した製造方法
を採用することにより、基板部（絶縁部）、電極部及び
抵抗パターン部間の段差を１μｍ以下で、かつ基板の表
面粗さを０．５μｍ以下に抑えることができる。このた
め抵抗パターン部表面を摺動するブラシの摩耗を抑える
ことができ、またブラシが抵抗パターン部表面から離れ
るとびも防止できるので、摺動の際に発生するノイズや
ブラシと抵抗パターン部との間でおこる放電による抵抗
体自体の破損を防止することができる。また、グリーン
シートまたはアルミナ基板に電極部のみを埋設したスイ
ッチ用の電気素子基板においても、基板部（絶縁部）及
び電極部間の段差を１μｍ以下で、かつ基板の表面粗さ
を０．５μｍ以下に抑えることができる。このため電極
部を摺動するブラシの摩耗を抑えることができ、またブ
ラシが電極部から離れるとびも防止できるので、摺動の
際に発生するノイズやブラシと電極部との間でおこる放
電による電極部の破損を防止することができる。Since the present invention is constructed as described above, it has the following effects. By adopting the above-mentioned manufacturing method as the electric element substrate in which the electrode portion and the resistance pattern portion are embedded in the green sheet or the alumina substrate, the step between the substrate portion (insulating portion), the electrode portion and the resistance pattern portion is 1 μm or less, Moreover, the surface roughness of the substrate can be suppressed to 0.5 μm or less. Therefore, it is possible to suppress the abrasion of the brush sliding on the surface of the resistance pattern portion and prevent the brush from moving away from the surface of the resistance pattern portion. It is possible to prevent damage to the resistor itself due to electric discharge occurring between them. Also, in an electric element substrate for a switch in which only an electrode portion is embedded in a green sheet or an alumina substrate, the step between the substrate portion (insulating portion) and the electrode portion is 1 μm or less and the surface roughness of the substrate is 0.5 μm. It can be suppressed to the following. Therefore, it is possible to suppress abrasion of the brush that slides on the electrode part, and prevent the brush from moving away from the electrode part, so that noise generated during sliding and discharge generated between the brush and the electrode part may occur. It is possible to prevent damage to the electrode portion.
【図１】本発明の第１実施例に係る可変抵抗器用の電気
素子基板の製造工程を示す図である。FIG. 1 is a diagram showing a manufacturing process of an electric element substrate for a variable resistor according to a first embodiment of the present invention.
【図２】図１の脱バインダーの温度プロファイルを示す
図である。FIG. 2 is a diagram showing a temperature profile of the debinder of FIG.
【図３】図１の焼成の温度プロファイルを示す図であ
る。FIG. 3 is a diagram showing a temperature profile of firing in FIG.
【図４】本発明の第１実施例に係る電気素子基板の要部
縦断面図である。FIG. 4 is a longitudinal sectional view of an essential part of the electric element substrate according to the first embodiment of the present invention.
【図５】図４に示す電気素子基板の同図中Ａ−Ａ線に沿
った表面粗さを示すグラフである。5 is a graph showing the surface roughness of the electric element substrate shown in FIG. 4 along the line AA in FIG.
【図６】本発明の第２実施例に係る電気素子基板の製造
工程を示す図である。FIG. 6 is a view showing a manufacturing process of the electric element substrate according to the second embodiment of the present invention.
【図７】本発明の第３実施例に係るスイッチ用の電気素
子基板の製造工程を示す図である。FIG. 7 is a diagram showing a manufacturing process of an electric element substrate for a switch according to a third embodiment of the present invention.
【図８】本発明の第４実施例に係るスイッチ用の電気素
子基板の製造工程を示す図である。FIG. 8 is a diagram showing a manufacturing process of an electric element substrate for a switch according to a fourth embodiment of the present invention.
【図９】従来の可変抵抗器用の電気素子基板の平面図で
ある。FIG. 9 is a plan view of a conventional electric element substrate for a variable resistor.
【図１０】図９に示す電気素子基板の同図中Ｂ−Ｂ線に
沿った縦断面図である。10 is a vertical cross-sectional view of the electric element substrate shown in FIG. 9 taken along the line BB in FIG.
【図１１】図９に示す電気素子基板の同図中Ｂ−Ｂ線に
沿った表面粗さを示すグラフである。11 is a graph showing the surface roughness of the electric element substrate shown in FIG. 9 taken along the line BB in the figure.
１ ポリプロピレンフィルム ２ 抵抗パターン部 ３ 電極部 ４ グリーンシート ５ 電気素子基板 ６ 絶縁インク ７ アルミ基板 ８ スイッチ基板 1 polypropylene film 2 resistance pattern part 3 electrode part 4 green sheet 5 electric element substrate 6 insulating ink 7 aluminum substrate 8 switch substrate
Claims (15)
を埋設し、前記基板、前記電極部及び前記抵抗パターン
部間の段差が２μｍ以下であることを特徴とする電気素
子基板。1. An electric element substrate, wherein an electrode portion and a resistance pattern portion are embedded in an inorganic substrate, and a step between the substrate, the electrode portion and the resistance pattern portion is 2 μm or less.
１記載の電気素子基板。2. The electric element substrate according to claim 1, which has a surface roughness of 0.5 μm or less.
及び前記電極部間の段差が２μｍ以下であることを特徴
とする電気素子基板。3. An electric element substrate, wherein an electrode portion is embedded in an inorganic substrate, and a step between the substrate and the electrode portion is 2 μm or less.
２記載の電気素子基板。4. The electric element substrate according to claim 2, which has a surface roughness of 0.5 μm or less.
ｂ，Ｚｎを主成分とするガラスを含む請求項１〜４のい
ずれか１項に記載の電気素子基板。5. The inorganic substrate is alumina powder and Na, P
The electric element substrate according to any one of claims 1 to 4, which contains glass containing b and Zn as a main component.
は銀及び白金を含む請求項１〜４のいずれか１項に記載
の電気素子基板。6. The electric element substrate according to claim 1, wherein the electrode portion contains silver, silver and palladium, or silver and platinum.
請求項１又は請求項２記載の電気素子基板。7. The electric element substrate according to claim 1, wherein the resistance pattern portion contains ruthenium oxide.
布して抵抗パターン部及び電極部を形成し乾燥させた
後、前記抵抗パターン部及び前記電極部上にグリーンシ
ートを重ねて加熱加圧し、次いで前記シートを剥離して
前記グリーンシート、前記抵抗パターン部及び前記電極
部を焼成することを特徴とする電気素子基板の製造方
法。8. A resistor material and an electrode material are applied on a sheet to form a resistance pattern portion and an electrode portion and dried, and then a green sheet is superposed on the resistance pattern portion and the electrode portion and heated and pressed. Then, the sheet is peeled off, and the green sheet, the resistance pattern portion, and the electrode portion are fired, and a method for manufacturing an electric element substrate.
布して抵抗パターン部及び電極部を形成し乾燥させた
後、前記抵抗パターン部及び前記電極部上に第１の絶縁
インクを塗布し、次いで第２の絶縁インクを塗布した基
板上に前記第１の絶縁インク面と第２の絶縁インク面と
が重なり合うように前記シートを重ね合せて加熱加圧
し、前記シートを剥離して前記基板、前記抵抗パターン
部及び前記電極部を焼成することを特徴とする電気素子
基板の製造方法。9. A resistor material and an electrode material are applied onto a sheet to form a resistance pattern portion and an electrode portion, and the sheet is dried, and then a first insulating ink is applied onto the resistance pattern portion and the electrode portion. Then, the sheets are stacked and heated and pressed so that the first insulating ink surface and the second insulating ink surface overlap with each other on the substrate coated with the second insulating ink, and the sheet is peeled off to remove the substrate. A method of manufacturing an electric element substrate, comprising: firing the resistance pattern portion and the electrode portion.
を形成し乾燥させた後、前記電極部にグリーンシートを
重ねて加熱加圧し、次いで前記シートを剥離して前記グ
リーンシート及び前記電極部を焼成することを特徴とす
る電気素子基板の製造方法。10. A sheet is coated with an electrode material to form an electrode portion and dried, and then a green sheet is superposed on the electrode portion and heated and pressed, and then the sheet is peeled off to separate the green sheet and the electrode. A method for manufacturing an electric element substrate, which comprises firing the part.
を形成し乾燥させた後、前記電極部上に第１の絶縁イン
クを塗布し、次いで第２の絶縁インクを塗布した基板上
に前記第１の絶縁インク面と第２の絶縁インク面とが重
なり合うように前記シートを重ね合せて加熱加圧し、前
記シートを剥離して前記基板及び前記電極部を焼成する
ことを特徴とする電気素子基板の製造方法。11. An electrode material is applied onto a sheet to form an electrode portion and dried, and then a first insulating ink is applied onto the electrode portion, and then a second insulating ink is applied onto a substrate. Electricity characterized by stacking the sheets so that the first insulating ink surface and the second insulating ink surface overlap with each other, heating and pressing the sheets, peeling the sheets, and firing the substrate and the electrode portion. Method of manufacturing element substrate.
する請求項８〜１１のいずれか１項に記載の電気素子基
板の製造方法。12. The method for manufacturing an electric element substrate according to claim 8, wherein the surface is polished after firing.
リフェニレンオキサイドフィルムまたは表面をシリコン
コーティングしたＰＥＴフィルムであることを特徴とす
る請求項８〜１１のいずれか１項に記載の電気素子基板
の製造方法。13. The method for manufacturing an electric element substrate according to claim 8, wherein the sheet is a polypropylene film, a polyphenylene oxide film, or a PET film having a surface coated with silicon.
クがグリーンシートを溶剤に溶かしたものである請求項
９又は請求項１１記載の電気素子基板。14. The electric element substrate according to claim 9, wherein the first insulating ink and the second insulating ink are prepared by dissolving a green sheet in a solvent.
は請求項１１記載の電気素子基板。15. The electric element substrate according to claim 9, wherein the substrate is an alumina substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6100719A JPH07283006A (en) | 1994-04-13 | 1994-04-13 | Electric element substrate and production thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6100719A JPH07283006A (en) | 1994-04-13 | 1994-04-13 | Electric element substrate and production thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH07283006A true JPH07283006A (en) | 1995-10-27 |
Family
ID=14281451
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6100719A Pending JPH07283006A (en) | 1994-04-13 | 1994-04-13 | Electric element substrate and production thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH07283006A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1998058390A1 (en) * | 1997-06-16 | 1998-12-23 | Matsushita Electric Industrial Co., Ltd. | Resistance wiring board and method for manufacturing the same |
| WO2000062582A1 (en) * | 1999-04-07 | 2000-10-19 | Tdk Corporation | Composite substrate, thin film el element using it, and method of producing the same |
-
1994
- 1994-04-13 JP JP6100719A patent/JPH07283006A/en active Pending
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1998058390A1 (en) * | 1997-06-16 | 1998-12-23 | Matsushita Electric Industrial Co., Ltd. | Resistance wiring board and method for manufacturing the same |
| US6166620A (en) * | 1997-06-16 | 2000-12-26 | Matsushita Electric Industrial Co., Ltd. | Resistance wiring board and method for manufacturing the same |
| JP3532926B2 (en) * | 1997-06-16 | 2004-05-31 | 松下電器産業株式会社 | Resistance wiring board and method of manufacturing the same |
| WO2000062582A1 (en) * | 1999-04-07 | 2000-10-19 | Tdk Corporation | Composite substrate, thin film el element using it, and method of producing the same |
| US6428914B2 (en) | 1999-04-07 | 2002-08-06 | Tdk Corporation | Composite substrate, thin-film electroluminescent device using the substrate, and production process for the device |
| US6723192B2 (en) | 1999-04-07 | 2004-04-20 | Tdk Corporation | Process for producing a thin film EL device |
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