JPH0282598A - Manufacture of ceramic multilayer board - Google Patents

Manufacture of ceramic multilayer board

Info

Publication number
JPH0282598A
JPH0282598A JP23260388A JP23260388A JPH0282598A JP H0282598 A JPH0282598 A JP H0282598A JP 23260388 A JP23260388 A JP 23260388A JP 23260388 A JP23260388 A JP 23260388A JP H0282598 A JPH0282598 A JP H0282598A
Authority
JP
Japan
Prior art keywords
mixture
aluminum nitride
zirconium oxide
layers
ceramic multilayer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23260388A
Other languages
Japanese (ja)
Inventor
Tomokazu Yamaguchi
朋一 山口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP23260388A priority Critical patent/JPH0282598A/en
Publication of JPH0282598A publication Critical patent/JPH0282598A/en
Pending legal-status Critical Current

Links

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE:To improve mass-productivity, realize complete coupling with a sintered Si3N4 board and improve reliability by a method wherein layers of mixture of AlN, zirconium oxide and organic material and layers of mixture of AlN and organic material are alternately printed a plurality of times on the sintered Si3N4 board and baked. CONSTITUTION:Layers of insulator material and layers of material converted into conductor by the reaction at the time of baking are alternately printed a plurality of times on a sintered silicon nitride ceramic board 7 and baked. The insulator material printed on the surface of the ceramic board is composed of mixture of aluminum nitride and organic material. The material converted into conductor by the reaction at the time of baking is composed of a mixture of aluminum nitride, zirconium oxide and organic material. When the mixing ratio of aluminum nitride and zirconium oxide in the mixture of aluminum nitride, zirconium oxide and organic material is expressed by (AlN)x(ZrO2)1-x, zirconium nitride enough to provide a conductivity is made of the mixture having the composition (x)=0.2-0.9.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、電子回路の配線基板として利用されるセラミ
ック多層基板の製造方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method of manufacturing a ceramic multilayer substrate used as a wiring board for electronic circuits.

(従来の技術) 近年、窒化けい素(以下、Si、N、と記す)は高絶縁
性、高強度、低誘電率であるが、熱伝導率が低いため、
Si、 N4の上に高熱伝導性と高絶縁性を持った窒化
アルミニウム(以下、 AQNと記す)を結合させたセ
ラミック基板が注目を浴びている。
(Prior art) In recent years, silicon nitride (hereinafter referred to as Si, N) has high insulation properties, high strength, and low dielectric constant, but because of its low thermal conductivity,
Ceramic substrates that combine Si and N4 with aluminum nitride (hereinafter referred to as AQN), which has high thermal conductivity and high insulation properties, are attracting attention.

従来のこの種の多層基板の製造方法について、第4図に
より説明する。
A conventional method for manufacturing this type of multilayer board will be explained with reference to FIG.

同図は従来のセラミック多層基板の断面図で、まず、S
i、N、を焼結したセラミック基板1の表面に、後に導
電路となる所定のパターンを描く空隙2aを設けた第1
層2をAGNで形成する1次に、めっき処理によって上
記の空隙2aに金、銀、銅などの金属で導電路3を形成
する。
This figure is a cross-sectional view of a conventional ceramic multilayer board.
A first ceramic substrate 1 is provided with gaps 2a forming a predetermined pattern that will later become conductive paths on the surface of a ceramic substrate 1 sintered with N.
First, the layer 2 is formed of AGN, and then a conductive path 3 is formed using a metal such as gold, silver, or copper in the void 2a by plating.

次に、上記の導電路3と導通する導通路4となる連結孔
を設けた第2層5をAQNで形成した後、焼成し、めっ
き処理によって」−記の導通路4と導電路6を形成する
Next, after forming a second layer 5 with a connecting hole that becomes a conductive path 4 that is connected to the above-mentioned conductive path 3 using AQN, it is fired and then plated to form a conductive path 4 and a conductive path 6 as described above. Form.

(発明が解決しようとする課題) しかしながら、上記の構成では、AQNの第1層2およ
び第2層5を焼結する工程の歩留りが悪いという問題が
あった。また、導電路3,6を形成するために独立した
めっき処理工程が必要であるため、量産性がないという
問題もあった。さらには、焼成した後、 AQNを焼結
した第1層2および第2層5にめっきによって導電路を
形成するため、AQNの焼結体と導電路3,6とが十分
に結合しない場合があり、信頼性が低いという問題もあ
った。
(Problems to be Solved by the Invention) However, the above configuration has a problem in that the yield of the step of sintering the first layer 2 and the second layer 5 of AQN is poor. Furthermore, since an independent plating process is required to form the conductive paths 3 and 6, there is also the problem that mass production is not possible. Furthermore, since conductive paths are formed by plating on the first layer 2 and second layer 5 made of sintered AQN after firing, the sintered body of AQN and the conductive paths 3 and 6 may not be sufficiently bonded. There was also the problem of low reliability.

本発明は上記の問題を解決するもので、量産性よく高信
頼性のセラミック多層基板の製造方法を提供するもので
ある。
The present invention solves the above problems and provides a method for manufacturing a ceramic multilayer substrate that is mass-producible and highly reliable.

(課題を解決するための手段) 上記の課題を解決するため、本発明は+ Si、N。(Means for solving problems) In order to solve the above problems, the present invention provides +Si,N.

の焼結体の上に、A(INと酸化ジルコニウム(以下、
ZrO□と記す)と有機物質の混合物の層と、AQNと
有機物の混合物の層を交互に複数印刷した後、焼成する
ものである。
A (IN and zirconium oxide (hereinafter referred to as
After alternately printing a plurality of layers of a mixture of ZrO□ and an organic substance and layers of a mixture of AQN and an organic substance, they are fired.

(作 用) 上記の構成により、AQNとZrO,が焼成時に反応し
、高電導性および高熱伝導性を有する窒化ジルコニウム
が生成する。従って、焼成前に印刷したAIINとZr
O□と有機物質の混合物の層は、焼成と同時に導電路と
なるため、量産性が高い上に、基板との結合が完全で高
い信頼性を有するセラミック多層基板が得られる。
(Function) With the above configuration, AQN and ZrO react during firing to produce zirconium nitride having high electrical conductivity and high thermal conductivity. Therefore, AIIN and Zr printed before firing
Since the layer of the mixture of O□ and the organic substance becomes a conductive path at the same time as it is fired, it is possible to obtain a ceramic multilayer substrate that is not only highly mass-producible but also perfectly bonded to the substrate and has high reliability.

(実施例) 本発明の一実施例について、第1図ないし第3図により
説明する。まず、AQN粉末に1.焼結助剤として酸化
イツトリウム(Vzoa)を2重量%、結合剤としてポ
リビニルブチラールを5重量%、溶媒としてイソプロピ
ルアルコールを加えたペースト状の混合物(以下、ペー
ストAと記す)と。
(Example) An example of the present invention will be described with reference to FIGS. 1 to 3. First, add 1. A paste-like mixture (hereinafter referred to as paste A) containing 2% by weight of yttrium oxide (Vzoa) as a sintering aid, 5% by weight of polyvinyl butyral as a binder, and isopropyl alcohol as a solvent.

(7,r(]2)。、 33 (AQN)o、 e−な
る組成に配合したAQNとZrO2の混合粉に、結合剤
としてポリビニルブチラールを5重量%、溶媒としてイ
ソプロピルアルコールを加えたペースト状の混合物(以
下、ペーストBと記す)を用意する。次に、第1図のよ
うに、縦×横×厚さがそれぞれ30 X 30 X 0
.5mmのAQNのセラミック基板7を焼結して形成し
、その表面にペーストAを用いて全面にスクリーン印刷
して第1ペーストA層8を形成し、乾燥させる。次に、
その表面にペーストBを用いて第2図(a)のようなパ
ターンでスクリーン印刷して第1ペーストBパターン9
を形成し、乾燥させる。次に、その表面に再びペースト
A用いて第2図(b)に示すように連結孔10aを設け
たパターンでスクリーン印刷し、第2ペーストA層10
を形成し、乾燥させる。さらに、その表面にペーストB
を用いて第2図(C)に示すようなパターンで印刷し、
第2ペーストBパターン11を形成し、乾燥させる。
(7, r(]2)., 33 (AQN)o, e-A paste-like mixture of AQN and ZrO2 blended into a composition with 5% by weight of polyvinyl butyral as a binder and isopropyl alcohol as a solvent was added. Prepare a mixture (hereinafter referred to as paste B).Next, as shown in Figure 1, the length x width x thickness is 30 x 30 x 0.
.. A 5 mm AQN ceramic substrate 7 is formed by sintering, and the first paste A layer 8 is formed by screen printing on the entire surface using paste A, and then dried. next,
Using Paste B on the surface, screen print a pattern as shown in Figure 2(a) to form the first Paste B pattern 9.
form and dry. Next, paste A is used again on the surface to screen print a pattern with connecting holes 10a as shown in FIG. 2(b), and a second paste A layer 10
form and dry. Furthermore, paste B on the surface
Print the pattern as shown in Figure 2 (C) using
A second paste B pattern 11 is formed and dried.

このようにして形成した各層の乾燥後の厚さは。What is the thickness of each layer formed in this way after drying?

約50μmであった。It was about 50 μm.

次に、この積層体を脱脂した後、I+2!素雰囲気中で
1800℃、2時間の焼成を行った。
Next, after degreasing this laminate, I+2! Firing was performed at 1800° C. for 2 hours in an elementary atmosphere.

このようにして得られたセラミック多層基板は、第1ペ
ーストAパターンおよび第2ペーストBパターン9およ
びIfがそれぞれ金属に等しい導通性を示し、第3図に
示すように導電路12aと]−2bおよび13aと13
bが形成される。
In the thus obtained ceramic multilayer board, the first paste A pattern and the second paste B patterns 9 and If each exhibit conductivity equal to that of metal, and as shown in FIG. and 13a and 13
b is formed.

これらの導電路12a 、 12b 、 13aおよび
L3bの導通の有無を確認したところ、導電路+2aお
よび12bは連結孔10aから露呈するAとA′および
13とB′の間で、導電路13aおよび13bはその両
端CとC′およびDとD′の間で、金属に等しい導電性
を示した。また、連結孔10aで連結が想定される導電
路12aおよび13aの導通性も良好であった。
When checking the presence or absence of conduction of these conductive paths 12a, 12b, 13a and L3b, it was found that conductive paths +2a and 12b are between A and A' and 13 and B' exposed from the connecting hole 10a, and conductive paths 13a and 13b are connected to each other. exhibited conductivity equivalent to that of a metal between its ends C and C' and between D and D'. Further, the conductivity of the conductive paths 12a and 13a, which are supposed to be connected through the connecting hole 10a, was also good.

また、第2ペーストA層10で隔てられた導電路12a
および12bと13bは導通せず、絶縁層として有効に
働いた。この導電路12a 、 +2b 、 13aお
よび13bを構成する物質をX線回折で分析したところ
、窒化ジルコニウムおよびアルミニウムの酸窒化物(A
(ION)の複合体であることがわがった。この導電路
を構成する物質は焼成と同時に生成しており、第1ペー
ストA層8および第2ペーストA層10との結合性も充
分で、完全に一体化していた。
Further, the conductive path 12a separated by the second paste A layer 10
Also, 12b and 13b were not electrically connected and functioned effectively as an insulating layer. When the materials constituting the conductive paths 12a, +2b, 13a and 13b were analyzed by X-ray diffraction, they were found to be zirconium nitride and aluminum oxynitride (A
It was found to be a complex of (ION). The material constituting the conductive path was produced at the same time as the firing, and had sufficient bonding properties with the first paste A layer 8 and the second paste A layer 10, and were completely integrated.

また、この導電路12a 、 12b 、 13aおよ
び13bを構成する物質はセラミックスであるため、耐
久性が高く、耐酸化性においても空気中で500℃、2
時間の熱処理を行っても変化は認められなかった。
Furthermore, since the material constituting the conductive paths 12a, 12b, 13a and 13b is made of ceramic, it has high durability and oxidation resistance when heated in air at 500°C and 200°C.
No change was observed even after heat treatment for several hours.

なお1本実施例では、2種類のペーストAおよびBを得
るための結合剤としてポリビニルブチラールを用いたが
、他の樹脂を用いてもよく、また、溶媒にイソプロピル
アルコールを用いたが、他の溶媒を用いてもよい。
In this example, polyvinyl butyral was used as a binder to obtain two types of pastes A and B, but other resins may also be used.Although isopropyl alcohol was used as a solvent, other resins may be used. A solvent may also be used.

また、AQNの焼結助剤として酸化イツトリウムを添加
したが、他の有効な焼結助剤を加えても、また加えなく
ても本発明が有効であることには変わりない。
Further, although yttrium oxide was added as a sintering aid for AQN, the present invention remains effective even if other effective sintering aids are added or not.

一方、導電路] 2 a H12b t ] 3 aお
よび1:)bを構成する物質が生成するAQNとZrO
2の起こす反応は、モル比でAQN : ZrO2−3
: 1で起こる。従って、AGN : ZrO□=3:
1の組成で配合した混合物を導電路に用いるのが最も有
効であるが。
On the other hand, AQN and ZrO produced by the substances constituting the conductive path ] 2 a H12b t ] 3 a and 1:) b
The reaction caused by 2 has a molar ratio of AQN: ZrO2-3
: Occurs in 1. Therefore, AGN: ZrO□=3:
It is most effective to use a mixture of composition 1 for the conductive path.

(AQN)−(ZrOz ) 1−で表わした時にx 
=0.2〜0.9の組成の混合物で導電性を有するのに
十分な窒化ジルコニウムが生成する。例えば、x=0.
9では窒化ジルコニウムの構成比は約20重量%である
。しかし、x〉0.9では窒化ジルコニウムの生成量が
十分でなく、十分な導電性を得にくい。
(AQN)-(ZrOz) x when expressed as 1-
A mixture having a composition of =0.2 to 0.9 produces enough zirconium nitride to have electrical conductivity. For example, x=0.
In No. 9, the composition ratio of zirconium nitride is about 20% by weight. However, when x>0.9, the amount of zirconium nitride produced is insufficient and it is difficult to obtain sufficient conductivity.

(発明の効果) 以上説明したように1本発明によれば、St、N4の焼
結したセラミック基板の表面に、 AQNと有機物質の
混合物の層と、AQNとZrO,と有機物質の混合物の
層を交互に複数印刷した後、焼成することにより、絶縁
層の焼成と導電路の形成が同時に行われるため、印刷層
中に空隙を設ける必要がなくなり、量産性が著しく向上
する。また、形成される導電路はセラミックスであり、
導@略と絶縁層であるAIINの焼結が同時に行われる
ため1両者の結合力は堅固なものとなる。従って、セラ
ミックスの導電路を有する耐久性、耐候性が大きく、高
信頼性のセラミック多層基板が得られる。
(Effects of the Invention) As explained above, according to the present invention, a layer of a mixture of AQN and an organic substance and a layer of a mixture of AQN, ZrO, and an organic substance are formed on the surface of a sintered ceramic substrate of St and N4. By alternately printing a plurality of layers and then firing them, the insulating layers are fired and the conductive paths are formed at the same time, so there is no need to provide voids in the printed layers, and mass productivity is significantly improved. In addition, the conductive path formed is made of ceramics,
Since the conductive layer and the insulating layer of AIIN are sintered at the same time, the bonding force between the two is strong. Therefore, a highly durable, weather resistant, and highly reliable ceramic multilayer substrate having ceramic conductive paths can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明によるセラミック多層基板の断面図、第
2図は本発明によるセラミック多層基板における各層の
印刷パターンを示す平面図、第3図は本発明の一実施例
によるセラミック多層基板の導電路を示す平面図、第4
図は従来の製造方法によるセラミック多層基板の断面図
である。 1.7・・・セラミック基板、  2・・・第1層。 2a−空隙、 3,6.+2a、12b、13a。 L3b・・・導電路、 4・・・導通路、 5・・・第
2層、 8・・・第1ペーストA層、 9・・・第1ペ
ーストBパターン、 10・・・第2ペーストA層、 
10a・・・連結孔、 11・・・第2ペーストBパタ
ーン。 第 図 第2因 (a) (b) 特許出願人 松下電器産業株式会社 (C)
FIG. 1 is a cross-sectional view of a ceramic multilayer substrate according to the present invention, FIG. 2 is a plan view showing the printed pattern of each layer in the ceramic multilayer substrate according to the present invention, and FIG. 3 is a conductive ceramic multilayer substrate according to an embodiment of the present invention. Plan view showing the road, No. 4
The figure is a cross-sectional view of a ceramic multilayer substrate manufactured by a conventional manufacturing method. 1.7... Ceramic substrate, 2... First layer. 2a-void, 3,6. +2a, 12b, 13a. L3b... Conductive path, 4... Conductive path, 5... Second layer, 8... First paste A layer, 9... First paste B pattern, 10... Second paste A layer,
10a... Connecting hole, 11... Second paste B pattern. Figure 2 Cause (a) (b) Patent applicant Matsushita Electric Industrial Co., Ltd. (C)

Claims (4)

【特許請求の範囲】[Claims] (1)窒素けい素を焼結したセラミック基板の上に、絶
縁体である物質の層と、焼成時に反応して導電体となる
物質の層を交互に複数印刷した後、焼成することを特徴
とするセラミック多層基板の製造方法。
(1) The feature is that multiple layers of an insulating material and layers of a material that reacts during firing to become a conductor are alternately printed on a ceramic substrate made of sintered silicon nitrogen, and then fired. A method for manufacturing a ceramic multilayer substrate.
(2)上記のセラミック基板の表面に印刷する絶縁体と
なる物質が、窒化アルミニウムと有機物質の混合物であ
ることを特徴とする請求項(1)記載のセラミック多層
基板の製造方法。
(2) The method for manufacturing a ceramic multilayer substrate according to claim 1, wherein the material serving as an insulator printed on the surface of the ceramic substrate is a mixture of aluminum nitride and an organic material.
(3)焼成時に反応して導電体となる物質が、窒化アル
ミニウムと酸化ジルコニウムと有機物質の混合物である
ことを特徴とする請求項(1)記載のセラミック多層基
板の製造方法。
(3) The method for manufacturing a ceramic multilayer substrate according to claim (1), wherein the substance that reacts to become a conductor during firing is a mixture of aluminum nitride, zirconium oxide, and an organic substance.
(4)窒化アルミニウムと酸化ジルコニウムと有機物質
の混合物中の窒化アルミニウムと酸化ジルコニウムの混
合比を(AlN)_x(ZrO_2)_1_−_xで表
わした時、x=0.2〜0.9であることを特徴とする
請求項(2)記載のセラミック多層基板の製造方法。
(4) When the mixing ratio of aluminum nitride and zirconium oxide in the mixture of aluminum nitride, zirconium oxide, and organic substance is expressed as (AlN)_x(ZrO_2)_1_-_x, x = 0.2 to 0.9. The method of manufacturing a ceramic multilayer substrate according to claim 2, characterized in that:
JP23260388A 1988-09-19 1988-09-19 Manufacture of ceramic multilayer board Pending JPH0282598A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23260388A JPH0282598A (en) 1988-09-19 1988-09-19 Manufacture of ceramic multilayer board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23260388A JPH0282598A (en) 1988-09-19 1988-09-19 Manufacture of ceramic multilayer board

Publications (1)

Publication Number Publication Date
JPH0282598A true JPH0282598A (en) 1990-03-23

Family

ID=16941942

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23260388A Pending JPH0282598A (en) 1988-09-19 1988-09-19 Manufacture of ceramic multilayer board

Country Status (1)

Country Link
JP (1) JPH0282598A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0549270A (en) * 1990-07-26 1993-02-26 Ngk Insulators Ltd Piezoelectric/electrostrictive actuator
JP2007110140A (en) * 2006-11-06 2007-04-26 Toshiba Corp Silicon nitride wiring board and method of manufacturing the same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0549270A (en) * 1990-07-26 1993-02-26 Ngk Insulators Ltd Piezoelectric/electrostrictive actuator
JP2007110140A (en) * 2006-11-06 2007-04-26 Toshiba Corp Silicon nitride wiring board and method of manufacturing the same
JP4516057B2 (en) * 2006-11-06 2010-08-04 株式会社東芝 Silicon nitride wiring board and method for manufacturing the same

Similar Documents

Publication Publication Date Title
US4786888A (en) Thermistor and method of producing the same
US4397800A (en) Ceramic body having a metallized layer
US8125307B2 (en) Aggregate substrate, production method of aggregate substrate, and varistor
US7932807B2 (en) Varistor
JPH0445953B2 (en)
JPH0282598A (en) Manufacture of ceramic multilayer board
JP2989975B2 (en) Method for manufacturing aluminum nitride substrate
JPH0576795B2 (en)
JPH0353591A (en) Ceramic multilayer wiring board
JP3258231B2 (en) Ceramic circuit board and method of manufacturing the same
JPH01230294A (en) Manufacture of ceramic multilayer board
JPH01230295A (en) Manufacture of ceramic multilayer board
JPS63124596A (en) Circuit board
JPH05267854A (en) Ceramic multilayer circuit board and manufacture thereof
JP2931910B2 (en) Circuit board
JPH01230296A (en) Manufacture of ceramic multilayer board
JPS60167398A (en) Multilayer circuit board and method of producing same
JPH0636601Y2 (en) Circuit board
JPH0282641A (en) Ceramic multilayer substrate
JPS6029240B2 (en) Ceramic circuit board manufacturing method
JP2892220B2 (en) Manufacturing method of ceramic wiring board
JPH04291985A (en) Laminated circuit parts
JPH1013006A (en) Electronic component
JP2001185857A (en) Multilayer wiring board
JPH04233787A (en) Multilayer printed circuit board