JPH07249742A - Semiconductor device - Google Patents

Abstract

PURPOSE:To lower the applying voltage dependency of capacitance within a specific range of applying voltage. CONSTITUTION:An MIS diode D1 comprises a lower electrode 14a, an insulating film 15a, and an upper electrode 16a of polysilicon whereas an MIS diode D2 comprises a lower electrode 14b, an insulating film 15b, and an upper electrode 16b. These two MIS diodes D1, D2 have identical structure and isolated electrically by means of N diffusion layers 12a, 12b and field oxide 13. The MIS diodes D1, D2 have different areas with the ratio of area being set at 10:1.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device which reduces the dependency of a capacitance value on an applied voltage within a certain applied voltage range.

[0002]

2. Description of the Related Art In recent years, semiconductor devices having MIS diodes have been widely used to form analog circuits. There is a demand for a MIS diode having a high ratio accuracy in an analog circuit, and it is desired to reduce the applied voltage dependency of the capacitance value of the MIS diode.

An example of the above semiconductor device will be described below with reference to the drawings. FIG. 3 shows a cross-sectional structure of a conventional semiconductor device. In FIG. 3, 1 is a semiconductor substrate made of P-type silicon, 2 is an N ⁻ diffusion layer formed in the semiconductor substrate 1, 3 is a field oxide film formed on the semiconductor substrate 1, and 4 is an N ⁻ diffusion layer 2. A lower electrode made of an N ⁺ diffusion layer formed therein, 5 is an insulating film made of an oxide film formed on the lower electrode 4, 6 is an upper electrode made of polysilicon formed on the insulating film 5, and 7 is Wiring connected to the upper electrode 6 and wiring 8 connected to the lower electrode 4. A MIS diode is formed by a lower electrode 4 made of an N ⁺ diffusion layer, an insulating film 5 and an upper electrode 6 made of polysilicon.
The MIS diode is electrically isolated from other elements by the N ⁻ diffusion layer 2 and the field oxide film 3.

The operation of the semiconductor device configured as described above will be described below. When a DC bias voltage is applied to both electrodes of the MIS diode, that is, the lower electrode 4 and the upper electrode 6, charges are accumulated. For example, when the DC voltage Vg is applied through the wiring 7 and the DC voltage Vs is simultaneously applied through the wiring 8, the relationship between the voltage Vg-Vs applied to the MIS diode and the capacitance value C is as shown in FIG.

[0005]

However, in the above-mentioned conventional configuration, as can be seen from FIG. 4, the applied voltage Vg-Vs
The capacitance value C decreases as the value of C decreases. That is, there is a problem that the capacitance value C changes depending on the applied voltage Vg-Vs. In particular, the actual operating voltage of the semiconductor device is 2 to 4V
± V with 3V as the center when the applied voltage range is approx.
When the applied voltage changes, the capacitance value changes 0.43%.

In view of the above problems, the present invention provides a semiconductor device in which the dependency of the capacitance value on the applied voltage is reduced within a certain applied voltage range.

[0007]

In order to solve the above problems, a semiconductor device according to the present invention has a pair of MIs having different capacitance values.
The S diode and the wiring for connecting the pair of MIS diodes in anti-parallel are provided.

[0008]

According to the present invention, since the MIS diodes having a large capacitance value in a certain applied voltage range are connected in parallel so as to cancel each other out by the reduction in the capacitance value of the MIS diodes having a small capacitance value, the capacitance is increased. It is possible to reduce the applied voltage dependency of the value.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1A shows a sectional structure of a semiconductor device according to an embodiment of the present invention.

In FIG. 1A, 11 is a semiconductor substrate made of P-type silicon, and 12a and 12b are semiconductor substrates 11.
N ⁻ diffusion layer formed therein, 13 is a field oxide film formed on the semiconductor substrate 11, and 14 a is N ⁻ diffusion layer 12
a lower electrode consisting of an N ⁺ diffusion layer formed in a, 14b
Is a lower electrode made of an N ⁺ diffusion layer formed in the N ⁻ diffusion layer 12b, 15a is an insulating film made of an oxide film formed on the lower electrode 14a, and 15b is an oxidation film formed on the N ⁺ diffusion layer 14b. An insulating film made of a film, 16a is an upper electrode made of polysilicon formed on the insulating film 15a, 16b is an upper electrode made of polysilicon formed on the insulating film 15b, and 17a is an upper electrode 16a and an N ⁻ diffusion layer. A wire connecting 12b and a wire 17b connecting the electrode 16b and the N ⁻ diffusion layer 12a. Lower electrode 14a made of N ⁺ diffusion layer
And an upper electrode 16a made of insulating film 15a and polysilicon
The MIS diode D1 is composed of the lower electrode 14b, the lower electrode 14b made of an N ⁺ diffusion layer, the insulating film 15b and the upper electrode 16b.
And MIS diode D2. The MIS diode D1 is a MIS diode having the same configuration as the MIS diode shown in the conventional technique. The MIS diode D1 and the MIS diode D2 are N ⁻ diffusion layers 12
a, 12b and field oxide film 13 cause mutual MI
It is electrically separated from the S diode and other elements. The MIS diode D1 and the MIS diode D2 have different areas, and the area ratio is 10: 1. The upper electrode 16a of the MIS diode D1 is formed by the wiring 17a.
And the lower electrode 14b of the MIS diode D2 have the same potential. The wiring 17b causes the upper electrode 16b of the MIS diode D2 and the lower electrode 14a of the MIS diode D1 to have the same potential.

FIG. 1B is an equivalent circuit of the semiconductor device shown in FIG. In FIG. 1B, the wiring 17 is formed so that the upper electrode of the MIS diode D1 and the lower electrode of the MIS diode D2 have the same potential, and the lower electrode of the MIS diode D1 and the upper electrode of the MIS diode D2 have the same potential.
a and 17b are arranged. Since the area ratio of the MIS diodes D1 and D2 is 10: 1, the capacitance value of the MIS diode is also 10: 1. The operation of the semiconductor device configured as described above will be described below with reference to FIGS. 1A and 1B and FIGS. 2A to 2C.

The impurity concentration in the vicinity of the surface of the N ⁺ diffusion layer forming the lower electrodes 14a and 14b is about 1 × 10 ¹⁹ cm ^-3 , and the thickness of the oxide film forming the insulating films 15a and 15b is 10 nm. The resistance of the polysilicon forming the electrodes 16a and 16b is 3 to 5Ω. In that case, the dependency of the capacitance value C1 of the MIS diode D1 on Vg-Vs is shown in FIG.
become that way. Similarly, the capacitance value C of the MIS diode D2
The Vg-Vs dependency of 2 is as shown in FIG. Since the MIS diode D1 and the MIS diode D2 having this characteristic are connected in parallel by the wirings 17a and 17b, the dependency of the capacitance value of FIG.
FIG. 2 in which the dependency of the capacitance value on the applied voltage in FIG.
Vg-Vs dependence of the capacitance value C as shown in (c) is obtained. For example, when the applied voltage Vg-Vs changes ± 1 V centering on 3 V, the capacitance value changes by 0.15%. This clearly reduces the fluctuation of the capacitance value as compared with the conventional example.

As described above, according to this embodiment, a pair of MIS diodes having different capacitance values and the pair of MISs.
By providing the wiring that connects the diodes in antiparallel, it is possible to reduce the applied voltage dependency of the capacitance value of the MIS diode within a certain applied voltage range.

Regarding the effect, a comparison with the conventional example is shown in Table 1.
Shown in.

[0016]

[Table 1]

[0017]

According to the present invention, a pair of MISs having different capacitance values are provided.
By providing the diode and the wiring that connects the pair of MIS diodes in antiparallel, it is possible to reduce the voltage dependency of the capacitance value in a certain applied voltage range.

[Brief description of drawings]

FIG. 1A is a sectional view of a semiconductor device according to an embodiment of the present invention, and FIG. 1B is an equivalent circuit diagram thereof.

2A to 2C are diagrams showing the applied voltage dependency of the capacitance value of the embodiment shown in FIG.

FIG. 3 is a sectional view of a conventional semiconductor device.

FIG. 4 is a diagram showing applied voltage dependency of a capacitance value of the semiconductor device shown in FIG.

[Explanation of symbols]

1 Semiconductor Substrate 2 N ^- Diffusion Layer 3 Field Oxide Film 4 Lower Electrode 5 Insulating Film 6 Upper Electrode 7 Wiring 8 Wiring 11 Semiconductor Substrate 12a N ^- Diffusion Layer 12b N ^- Diffusion Layer 13 Field Oxide Film 14a Lower Electrode 14b Lower Electrode 15a Insulation Film 15b Insulating film 16a Upper electrode 16b Upper electrode 17a Wiring 17b Wiring D1, D2 MIS diode

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Office reference number FI technical display location H01L 29/861

Claims (1)

[Claims] 1. A semiconductor device comprising: a pair of MIS diodes having different capacitance values; and a wiring for connecting the pair of MIS diodes in anti-parallel.