JPH0723072A - Detection system - Google Patents

Abstract

PURPOSE:To provide a detection system which is optimal to the communication in a transmission line in which a receiving level is rapidly changed by providing the circuit of a synchronization detection system and the circuit of a delay detection system, and switching both the systems by observing the fluctuation of an input phase and an output phase. CONSTITUTION:A carrier reproduction control circuit 50 is constituted of a loop filter and a control circuit and monitors the input and output signal of the loop filter, and operates system switching control. When the system is switched to the synchronization detection system, the output of the loop filter is connected to a voltage control oscillator 4, orthogonal synchronization detection outputs obtained by low pass filters 5 and 6 are inputted to a clock reproducing circuit 51, a reproduction clock signal is obtained, and the data signal of a logical level is reproduced by a data discriminator 52, and decoded by a differential decoder. Also, when switched to the delay detection system, the loop filter is separated from the voltage control oscillator 4, the voltage control oscillator 4 is controlled by a constant voltage applied by the control circuit, and the oscillator 4 functions equally to the case of a semi-synchronization detection system.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a detection method,
The present invention relates to a detection method that combines both synchronous detection and differential detection used in digital mobile radio.

[0002]

2. Description of the Related Art In the radio system, a carrier circuit modulates a carrier wave with a modulated data signal and sends it out, and a demodulator of a receiver reproduces an original modulated data signal from a modulated carrier wave signal. The demodulation method is roughly divided into a synchronous detection method in which the carrier signal component is reproduced in the receiver and the phase component information of the modulated carrier is used, and the modulated data signal is reproduced only from the frequency or amplitude information without using the phase information of the carrier. There is an asynchronous detection method.

FIG. 1 shows a conventional example of a synchronous detection system. The figure shows a method of performing carrier recovery of two-phase phase shift keying (BPSK) using a so-called Costas loop. In FIG. 1, 1 and 3 are frequency mixers, 2 is a 90 ° phase shifter, 4 is a voltage controlled oscillator, 5 and 6 are low pass filters, 7 is a loop filter, and 8 is a multiplier.

The received input signal is multiplied by the regenerated carrier signal of the voltage controlled oscillator 4 by the frequency mixers 1 and 3 and the quadrature carrier signal whose phase is shifted by 90 °, and is passed through the low pass filters 5 and 6 to obtain the harmonic. The wave component is removed and the low-pass filter 6 outputs the demodulated data signal. When the outputs of the low pass filters 5 and 6 are multiplied by the multiplier 8,
A carrier wave phase difference signal (a phase difference between the received carrier wave signal and the reproduced carrier wave signal) from which the modulated data component is removed is obtained, and this low frequency component is taken out by the loop filter 7 and used as a control signal for the voltage controlled oscillator 4.

With the above structure, carrier reproduction and demodulation of a modulated wave can be performed simultaneously. The synchronous detection method requires a carrier recovery, which complicates the circuit a little, but has an advantage that the demodulatable signal level is low.

FIG. 2 shows a conventional example of a differential detection circuit which is a typical asynchronous detection system. In the figure, 21 is a delay element having a delay time equal to the data clock rate, 22 is a multiplier, and 23 is a low-pass filter.

The received signal is input to the multiplier 22 and is multiplied by the received signal delayed by one data rate by the delay element 21. Further, the low-pass filter 23 removes the second harmonic of the carrier wave, and the baseband signal is obtained. The ingredients are removed. The baseband signal is equal to the exclusive OR of the data and the signal delayed by one data rate. Therefore, if the signal is differentially encoded in advance on the modulator side, demodulation and differential decoding can be performed simultaneously in the circuit of FIG.

An example of the differential encoder and decoder is shown in FIG. 3a is a differential encoder, and FIG. 3b is a differential decoder.
In the figure, 31 and 34 are exclusive OR gates, and 32 and 33.
Is a delay element. When the data input x _n is applied to the differential encoder, the output is delayed by one data y _n-1 and the gate 31 performs an exclusive OR operation to obtain the output y _n . When y _n is input to the differential decoder shown in FIG. 3b, the delay element 33 delays one data by y _n−1 and the gate 34 performs an exclusive OR operation,
x _n ′. Since x _n ′ becomes equal to x _n as shown in Equation 1, when the differential encoder and the differential decoder are combined, the same signal as the input data of the differential encoder is obtained at the output of the differential decoder. I understand.

[0009]

[Equation 1]

By the differential detection method shown in FIG. 2, carrier component removal and differential decoding are performed simultaneously. As shown in FIG. 2, the characteristic of the differential detection system is that the configuration is simple and carrier recovery is not required. However, the signal level required for demodulation is large, and the synchronous detection system is required to obtain the same error rate. It requires twice the signal amplitude as compared to.

Further, in recent years, along with the progress of digital signal processing, the signal processing of wireless devices has been digitized.
The quasi-synchronous detection method as shown in is used. In the figure, 41 and 43 are frequency mixers, 42 is a 90 ° phase shifter,
44 is an oscillator, 45 and 46 are low-pass filters, 47,
Reference numeral 48 is an AD converter, and 49 is a clock recovery circuit.

In digital signal processing, if the signal frequency is high, the sampling frequency becomes high, which is disadvantageous in terms of processing speed. Therefore, the signal is frequency-converted into the base band before processing.
Therefore, as shown in FIG. 4, the received signal is multiplied by the frequency mixers 41 and 43 by the local carrier signal of the oscillator 44 and the quadrature carrier signal obtained by passing it through the 90 ° phase shifter 42 to obtain a low frequency band. After the harmonic signal components are removed by the pass filters 45 and 46, they are digitized by the AD converters 47 and 48. The clock recovery circuit 49 is a circuit for extracting a clock component of data from the in-phase and quadrature signal components. After the AD converter, demodulation can be performed by using the synchronous detection circuit shown in FIG. 1 or the delay detection circuit shown in FIG. In the circuits of FIGS. 1 and 2, it is necessary to use high-speed elements that can operate in the carrier frequency band as circuit elements, but in the case of the quasi-coherent detection method, it is sufficient to operate at the base band frequency, so digital signal processing is also possible. Becomes

As a known example of the synchronous detection method described above, there is JP-A-1-296745. Further, as an example of the differential detection method, there is JP-A-2-76348, and as a known example regarding the quasi-synchronous detection method, there is JP-A-1-106188.

[0014]

In the synchronous detection method described in the section of the prior art, since the carrier wave must be reproduced on the demodulator side, the circuit configuration becomes complicated and the ratio of carrier signal power to noise power is increased. If (C / N) becomes smaller, the carrier recovery circuit will not operate and the demodulation operation will become impossible. On the other hand, in the differential detection method, since carrier wave reproduction is unnecessary, the reliability (code error rate) is maintained even if the C / N becomes low.
, But some detection output can be obtained. However, in the differential detection, the circuit needs to operate at high speed, and even when the C / N is high, the reception level is required to be doubled in order to secure the code error rate equivalent to that of the synchronous detection method.

An object of the present invention is to provide a detection method which can complement the drawbacks of the synchronous detection method and the differential detection method and extend the advantages.

[0016]

In order to achieve the above object, the present invention provides a circuit of a synchronous detection system and a differential detection system, and in a carrier synchronization circuit, observes the fluctuations of the input phase and the output phase for detection. A system switching signal is generated to switch between the above two detection systems.

The principle of the present invention will be described with reference to FIG. In FIG. 5, reference numeral 50 is a carrier wave reproduction control circuit, 51 is a clock reproduction circuit, 52 is a data discriminator, 54 is a delay flip-flop, 53 is an exclusive OR gate, and the component 1
6 and 8 have the same functions as the corresponding element numbers of the synchronous detection method of FIG. The components 1 to 6 and 8 compose the Costas loop described with reference to FIG. 1, and form a carrier recovery circuit in the synchronous detection system, but the carrier recovery control circuit 50 is replaced with the loop filter 7. . The carrier wave reproduction control circuit is composed of a loop filter and a control circuit, and monitors the input / output signal of the loop filter and controls the system switching.

When switching to the synchronous detection system, the output of the loop filter is connected to the voltage controlled oscillator 4 to perform the carrier recovery operation. The quadrature synchronous detection outputs obtained by the low-pass filters 5 and 6 are input to the clock reproduction circuit 51 to obtain the reproduced clock signal clk, which operates the data discriminator 52 and the delay flip-flop 54. The data discriminator 52 discriminates the in-phase detection output and reproduces a logic level data signal. The identified data is decoded and output by the differential decoder composed of the exclusive OR gate 53 and the delay flip-flop 54.

When the carrier recovery control circuit 50 is switched to the delay detection system, the loop filter and the voltage controlled oscillator 4 are separated from each other, and the voltage controlled oscillator 4 is controlled by the constant voltage provided by the control circuit. Therefore, the detection circuit part of FIG.
It functions similarly to the quasi-synchronous detection method of. The received signal in the carrier band is mixed with the local carrier signal and frequency-converted to the base band. Considering the differential detection method of FIG. 2 in the baseband, the delay element 21 is a flip-flop 54 with a 1-clock delay, and the multiplier 22 is a baseband signal from the data discriminator 52.
It can be understood that it can be configured by the exclusive OR gate 53 if it is considered after passing through the above. That is, it can be seen that the configuration shown in FIG. 5 can realize a detection method having both a synchronous detection method and a differential detection method.

Since the detection system is automatically switched in the configuration of FIG. 5, the carrier recovery control circuit 50 plays an important role. This switching control can be performed by observing the fluctuation of the input signal or the output signal of the loop filter of the phase locked loop (PLL) that constitutes the carrier recovery circuit.

FIG. 6 shows a control flow of the carrier wave reproduction control circuit 50 of FIG. The PLL has two operation modes, that is, a synchronous pull-in operation and a synchronous hold operation. The synchronous pull-in operation is performed at the start of the operation or when the received carrier wave level is low, and the synchronous hold operation is performed when the received carrier wave level is high. Therefore, the synchronous detection mode is switched to the differential detection system, and the synchronous holding mode is switched to the synchronous detection system. The operation mode can be switched by monitoring the received carrier wave level. In the PLL, the pull-in is completed in the sync pull-in mode, and the sync loss is detected in the sync hold mode to switch the mode. That is, the pull-in completion can be detected by observing the output phase fluctuation and not unidirectionally, but the fluctuation width being less than or equal to a certain value. Further, the loss of synchronization can be detected by observing the input phase fluctuation and making the phase fluctuation larger than the fluctuation width in one direction.

[0022]

According to the detection method of the present invention, the detection method is automatically switched according to the received signal level, so that when the reception level becomes low, the delay detection method is used, and when the reception level is high, the synchronous detection method having good performance is used. Can be done. Therefore, it is possible to provide an optimum detection method for communication on a transmission line in which the reception level changes rapidly such as fading of mobile radio. Also, by using the quasi-synchronous detection, the operating frequency can be reduced, the circuit can be simplified and the power consumption can be reduced.

In the system of the present invention, in the case of differential detection, the phase locked loop of the carrier wave synchronizing circuit is opened and the voltage controlled oscillator becomes uncontrolled, but the control voltage of the voltage controlled oscillator at the time of holding the synchronization should be held. For example, the local carrier frequency becomes the same as the frequency when the synchronization is maintained, and the function equivalent to AFC (automatic frequency control) at the time of differential detection can be achieved.

Since the differential detection method is used, it is necessary to differentially encode the data on the transmitting side, but it can be realized by a very simple circuit, and there is almost no problem. Furthermore, it is possible not to perform differential encoding on the transmitting side and not use differential decoding on the receiving side even when switching to the differential detection method. In this case, a differential encoder and a decoder are unnecessary, and the circuit can be simplified.

[0025]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 7 is a block diagram of the present invention applied to a demodulator of the four-phase phase modulation system. In the figure, 70 and 71 are phase rotation circuits, 72 is a data discriminator, 73 is a ROM, 74 ₁ ,
74 ₂ and 74 ₃ are delay elements, 75 is an adder, 76 is a changeover switch, 77 is a loop filter, 78 is a phase comparator, 7
Reference numeral 9 is a control circuit. The component element numbers 41 to 49 have the same functions as the corresponding elements in the configuration diagram of the quasi-coherent detection system of FIG.

The received signal is converted into a baseband in-phase and quadrature signal by a quasi-coherent detection circuit composed of constituent elements 41 to 48. Further, these signals are input to the clock recovery circuit 49 and supplied to the digital circuit in the subsequent stage. The carrier wave frequency residue of the in-phase quadrature signal, which has been frequency-converted to the base band by the quasi-synchronous detection circuit and digitized, is corrected by the phase rotation circuit 70. That is, the carrier frequency shift and the carrier phase shift corresponding to the difference frequency between the carrier frequency of the received signal and the frequency of the local oscillator 44 are synchronized by the carrier recovery circuit after the circuit element 70.

The phase-rotated signal is sent to the phase rotation circuit 71,
It is decoded by a four-phase phase modulation differential decoder composed of delay elements 74 ₁ and 74 ₂ . The differentially decoded signal is a data discriminator 7
The demodulated data d _Q and d _I are obtained by being identified by 2.
The input signal and the output discrimination value of the discriminator 72 are inputted to the phase comparator 78, and the phase error Δφ between the discrimination phase and the reception signal point phase is inputted.
_i is detected. The phase error Δφ _i is subjected to noise component removal by the loop filter 77, becomes the phase control signal Δφ, is applied to the voltage controlled oscillator composed of the adder 75 and the delay element 74 ₃ via the changeover switch 76, and the ROM 73 outputs the carrier frequency residual signal. A cos component and a sin component are generated and input to the phase rotation circuit 70.

The phase error Δφ _i and the phase control signal Δφ are input to the control circuit 79, and the operating condition of the carrier synchronization circuit is observed and the detection method switching control is performed. That is, in the synchronous holding state, the changeover switch 76 is connected to the loop filter 77 side to perform the carrier wave synchronizing operation. At the same time the phase error Δφ
The change in _i is observed, and if it changes in one direction, it is determined that the synchronization loss has occurred, and the operation mode is switched to synchronization pull-in.
In the synchronous pull-in state, the changeover switch 76 is changed over to the ground side. As a result, the voltage controlled oscillator causes the delay element 74 ₃
The fixed value is controlled by the data value stored in (i.e., the carrier frequency residue signal immediately before the switching to the synchronous pull-in), and the device runs on its own. As a result, a function equivalent to that of the AFC (automatic frequency control) of the differential detection system can be realized. In the synchronous pull-in state, the change of the phase control signal Δφ is observed, and when the absolute value of the change converges within a certain fixed range, it is determined that the synchronous pull-in is completed, and the changeover switch 76 is switched to the loop filter 77 side. In this way, the detection method can be switched automatically by the carrier control circuit, and the optimum detection method can be selected according to the fluctuation of the received carrier level.

The phase rotation circuit 70 in the embodiment of FIG.
FIG. 8 shows a specific configuration example of 71. In the figure, 81 to 84 are multipliers, and 85 and 86 are adders. FIG. 8 shows a complex signal multiplier, in which the input signal x _I + jx _Q has a complex coefficient a _I
Multiply + ja _Q and calculate the output signal y _I + jy _Q. Let the complex coefficient a _I + ja _Q be the complex sine wave signal exp (jω _n ) = cos (j
When ω _n ) + jsin (jω _n ), it operates as a phase rotation circuit, rotates the phase of the input signal by ω _n, and outputs it, so that it functions as the phase rotator 71 of the carrier recovery circuit. The differential decoding of the four-phase modulation signal is performed by phase rotation. In this case, the complex coefficient a _I + ja _Q is the received data one clock before.

Although the present invention has been described with reference to the embodiment applied to the detection method of the four-phase phase modulation method, the present invention can also be applied to other modulation methods. Further, in the embodiments, the configuration using the quasi-coherent detection method has been described, but it is also applicable to the method not using the quasi-coherent detection as described in the section of the solving means. further,
A differential decoder is also used for synchronous detection, but this can be omitted if differential encoding is not performed on the modulation side. The detection method switching control method can be modified in various ways.

[0031]

According to the present invention, it is possible to realize a detection method that automatically selects the optimum detection method according to the fluctuation of the received signal level. When the reception level is high, the synchronous detection method with a small code error rate is received. When the level is small, detection can be performed using a differential detection method that does not require carrier synchronization, so that it is possible to provide an optimum detection method for a mobile radio communication method in which the reception level fluctuates drastically due to fading or the like.

[Brief description of drawings]

FIG. 1 is a block diagram of a conventional configuration example of a synchronous detection system.

FIG. 2 is a block diagram of a differential detection system which is an example of an asynchronous detection system.

FIG. 3 is a block diagram of a differential encoder and a decoder used for differential detection.

FIG. 4 is an explanatory diagram of a conventional configuration example of a quasi-coherent detection system.

FIG. 5 is an explanatory diagram of the principle of the detection method according to the present invention.

FIG. 6 is a detection method switching control flowchart of the present invention.

FIG. 7 is a block diagram of an embodiment of the present invention.

FIG. 8 is an explanatory diagram of a phase rotation circuit used in the embodiment of the present invention.

[Explanation of symbols]

41, 43 ... Frequency mixer, 42 ... 90 ° phase shifter, 44
... Oscillator, 45, 46 ... Low-pass filter, 47, 48
AD converter, 70, 71 ... Phase rotation circuit, 72 ... Data discriminator, 73 ... ROM, 74 ₂ , 74 ₃ ... Delay element, 7
6 ... Changeover switch, 77 ... Loop filter, 78 ... Phase comparator, 79 ... Control circuit.

Claims (5)

[Claims] 1. A synchronous detection circuit, a differential detection circuit, and a detection system switching control circuit, wherein a received signal is input to the synchronous detection circuit and the differential detection circuit, and the received signal level is monitored by the detection system switching control circuit. However, when the received signal level is higher than a predetermined set value, the synchronous detection circuit output is selected, and when the received signal level is lower than the predetermined set value, the output of the delay detection circuit is selected. , Detection method characterized by the detection output. 2. The detection system switching control circuit according to claim 1, wherein the detection method switching control circuit is configured by using a carrier wave synchronizing circuit, and a changeover switch is provided between a loop filter of the carrier wave synchronizing circuit and a voltage controlled oscillator. If the change of the loop filter input signal is either positive or negative and the change value becomes larger than a preset value, the synchronization is lost. Then, the changeover switch is opened to allow the voltage-controlled oscillator to self-run, and at the same time the differential detection circuit output is used as a detection output, and the absolute value of the change in the loop filter output signal becomes smaller than a predetermined set value. In this case, it is determined that the pull-in is completed, the changeover switch is closed, the loop filter output is guided to the voltage controlled oscillator, and at the same time the synchronous detection circuit output is detected. So as to select as an output, a detection method of performing the detection method switching control. 3. The loop filter output signal immediately before switching control to the differential detection method is stored and held, and the stored loop filter output signal is stored in the voltage when the differential detection method is selected. A detection method that uses the control signal when the controlled oscillator is free running. 4. The detection method according to claim 1, wherein the received signal is converted into a baseband signal using a quasi-coherent detection method, and the baseband signal is input to the synchronous detection circuit and the detection circuit. . 5. The detection according to claim 4, wherein the differential encoding circuit on the transmitter side and the differential decoding circuit on the receiver side are omitted, and differential encoding is not performed regardless of the difference in the detection method. method.