JPH0697970A - Carrier wave recovery circuit - Google Patents

Abstract

PURPOSE:To shorten pull-in time to the state of PLL phase synchronization in a carrier wave recovery circuit using a base band PLL. CONSTITUTION:This circuit is composed of a phase detector 1, the circuit 2 for frequency-multiplying the output phase and removing modulated wave components, a loop filter 4 for respectively multiplying the subsequent output phase of carrier wave components by the coefficients beta and alpha of band pass control from an outside, passing it through a low-pass filter and performing noise removal and the storage of phase difference and an integration circuit 5 equivalent to a digital VCO for conversion to the data of orthogonal components I and Q. A differentiation circuit 3 for differentiating the output phase of the carrier wave components after removing the modulated wave components from 2n phase PSK modulated waves inputted by a modulated wave components removing circuit 2 and extracting frequency difference components (selecting A by a switch SW1) is provided and the loop filter 4 performs an AFC function for minimizing the extracted frequency difference components (selecting A by the switch SW2).

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a carrier recovery circuit using a baseband PLL used for receiving and demodulating a 2 ⁿ phase PSK modulated wave in a receiver for digital satellite communication or mobile communication. .

[0002]

An example of Related Art 2 ^n-phase PSK conventional carrier reproducing circuit for demodulation of the modulated wave, as shown in diagram of Fig. 4, a PLL circuit of a so-called baseband, 2 ^n-phase PSK reception input
Phase detector (1) that outputs a baseband signal and a phase error proportional to the phase angle θ of the quadrature components I and Q from the modulated wave (1)
If the input wave is a 4-phase PSK wave, the output is multiplied by 4 or the so-called mod π / 4 operation is performed to remove the modulated wave component and output the carrier wave component and its phase error ε. The modulated wave component elimination circuit (2) and the output phase are multiplied by the external passband control coefficients β and α, respectively, and then the output is delayed by one symbol time T and then added. A loop filter (4A) that removes noise and accumulates the phase error by adding it to the output that has passed through the bandpass filter (complete integration type) (the incomplete integration type), and the accumulated value of the phase error of the output. , If necessary, add an external offset data to prevent reduction of the pull-in range to the PLL loop, and then convert it to quadrature component I, Q data by an integrating circuit (5) corresponding to a digital VCO. The integration in the state where the phase error ε is minimized by changing the coefficients β and α. Data I is a digital reproduction carrier output of the road (5), the Q, output I of the phase detector (1), is added to Q, the addition output
Although not shown, I and Q were identified by a discriminator and coded to be output data of the demodulator.

[0003]

A conventional carrier recovery circuit for demodulating a 2 ^n- phase PSK modulated wave has a baseband PLL configuration as described above, and a state of initial pull-in to the PLL is provided. Since it tried to synchronize the phases from the state to the state of establishing the synchronization, it took a long time to establish the synchronization of the PLL. An object of the present invention is to realize a carrier recovery circuit using a baseband PLL, which speeds up the time for pulling into the synchronization state.

[0004]

The basic constitution (claim 1) of the present invention for achieving this object is as shown in the principle diagram of FIG.
A phase detector (1) that outputs a baseband signal and a phase error proportional to the phase angle θ of the quadrature component I, Q from the input 2 ^n- phase PSK modulated wave and the modulated wave component from the output phase The output phase of the carrier component is differentiated by adding the output of the carrier component after removing the modulated wave component by the removal circuit (2) and the output of the output delayed by one symbol time T The differentiating circuit (3) which outputs the frequency error component (selects the A side which is not the ground B by the switch SW ₁ ) and the extracted frequency error component is further multiplied by the coefficient β of the passband control from the outside to the multiplication output. adding the coefficient α and multiplying outputs one symbol time an input of 1 symbol before T by the output of the integrating circuit for adding the after delaying D of the multiplication output of the coefficient beta (not ground a switch SW ₂ B Different from conventional connection (incomplete integration type) Ri, (switch SW ₂
Select the ground A with) and extract the extracted frequency error component
The output of the integrating circuit that adds the output multiplied by the coefficient .alpha. Of the passband control from the outside by the coefficient .alpha. To the input of one symbol before is delayed by the one symbol time T, and is then output as it is ( (Complete integration type), the loop filter (4) having an AFC function that minimizes the extracted frequency error component.

[0005]

According to the present invention (Claim 1), in the initial state of pulling the receiving input into the PLL, the differentiating circuit (3) selects the A side which is not ground B by the switch SW ₁ of the adder therein. Then, the phase detector (1) in the modulation wave component removal circuit (2) in the previous stage
By adding the output obtained by delaying the output by one symbol time T 1 to the output of the carrier component after removing the modulated wave component of the output phase of 1, the output phase of the carrier component is differentiated to obtain the frequency error component. Extract. And loop filter (4)
First, the switch SW ₂ of the adder therein selects the ground A, and adds the extracted frequency error component through the delay circuit D by changing the multiplication factors β and α of the pass band control from the outside. It has an AFC function that minimizes the frequency error component by adding it to the output of the integrating circuit. Then, in the next state where the PLL input establishes phase synchronization, the differentiating circuit
In (3), the switch SW ₁ of the adder in it selects ground B, and in the loop filter (4), the switch of the adder in it is selected.
Select the B side where SW ₂ is not ground A. Then, the output of the carrier wave from the modulated wave component removal circuit (2) passes through the differentiation circuit (3) and the loop filter because the switch SW ₁ of the adder of the differentiation circuit (3) selects ground B. In (4), since the switch SW ₂ selects the B side which is not the ground A, the low pass filter of the integrator circuit is multiplied after each multiplication with the external pass band control coefficients β and α as usual. By adding it to the output, noise removal and phase error accumulation are performed as an incomplete integration type. Then, the accumulated value of the phase error of the output is added with external offset data, if necessary, to prevent the reduction of the pull-in range to the PLL loop, and then the quadrature is obtained by the integration circuit (5) corresponding to the digital VCO. It is converted into data of components I and Q and added to the outputs I and Q of the phase detector (1), and the added outputs I and Q are output data of the demodulator. Therefore, in the initial state of pulling the reception input to the PLL, the differentiation circuit
(3) switch SW ₁ of the switch SW ₂ of the loop filter (4)
Both select the A side, so that it has an AFC function that minimizes the frequency error component of the carrier wave output, and the time for pulling into the PLL is shortened.

[0006]

FIG. 2 shows an embodiment corresponding to claim 2 of the present invention.
FIG. 3 shows the configuration of the carrier wave recovery circuit, and FIG. 3 shows the operation of the embodiment.
FIG. 6 is a mode switching diagram for explaining
(3) and loop filter (4)
The switching in the force state is shown. In this case, the received input wave is 4
Phase PSK modulated wave Described as QPSK modulated wave. First, receive
The QPSK modulated wave at the input is multiplied with the output of the analog VCO (7).
The output wave through a radio frequency bandpass filter BPF.
Then, the quadrature component I,
Baseband signal and phase error proportional to the phase angle θ of Q
And output. Then, the output phase of the modulated wave component is removed
In the circuit (2), multiply by 4 or calculate modπ / 4
Then, the modulated component is removed and only the carrier wave is removed.
The output phase of the carrier wave of is input to the differentiation circuit (3). differential
The circuit (3) is the carrier wave component of the output of the modulated wave component elimination circuit (2).
And the delay that delays the output by one symbol time T
Switch for switching between output A of extension circuit D or ground B of zero potential
Switch SW₁And the switch SW ₁The output switched with
It consists of an adder + for adding the input carrier wave component and
Switch SW₁When the output A side of the delay circuit D is selected and added
Is the frequency error generated by differentiating the output phase of the input carrier wave.
Only the minute will be extracted, and ground B with zero potential is selected.
When adding and adding, the output phase of the input carrier wave is unchanged
Pass it through and output to the next loop filter (4)
Becomes The loop filter (4) is the input from the previous stage.
Multiply the data by a coefficient β that determines the pass band and update the output.
The circuit that multiplies by a coefficient α and its output and the input one symbol before
Is delayed by the delay circuit D for 1 symbol time T and
And an output of the integrator circuit and the coefficient
Switch for selecting output B multiplied by β or ground A with zero potential
Ji SW₂And the switch SW₂Is added to the output selected by
It consists of a calculator + and. And a loop filter (4)
Switch SW₂Select the ground A and output B of the
Circuit (3) switch SW₁Simultaneously with the selection of output A and ground B of
The selection of circuit (3) and circuit (4) on the A side is performed as shown in FIG.
From the initial preamble of the received input QPSK modulated wave
It is called AFC mode because it is performed until the latter half. That
On the B side, the choice is unique after that and after the preamble.
CR mode for carrier recovery performed in the data UW, data state.
Called. That is, the loop filter (4) is
Switch SW₂Is the A side (complete integration type
Switch), and in CR mode, switch SW₂Is the B side
Select (Incomplete integral filter). Loop filter
Output D of (4) is analog signal A by D / A converter (6).
Is converted to and controls the analog VCO (7). Example of FIG.
Offset between the loop filter (4) and the D / A converter (6) of
The input circuit of the carrier recovery circuit has a so-called π / 4
In the case of the shift QPSK modulated wave, the phase point has 8 points.
Then, in the modulated wave component removal circuit (2), multiply by 8 or modπ / 8
Is required. In this case, the frequency of the PLL
The range of pulling in is that the input wave of the carrier recovery circuit has four phase points.
It becomes as narrow as 1/2 compared to the case of QPSK modulated wave with.
U Therefore, in the offset circuit, loop filter (4)
Add the data to the output D of_s1/8 of
Of f_sBy shifting to / 8, the π / 4 shift of the 8 phase points
QPSK modulated wave is converted to QPSK modulated wave of 4 phase points,
Prevents the pull-in range from being reduced.

[0007]

As described above, according to the present invention, 2
The carrier recovery circuit for demodulating the ^n- phase PSK modulated wave is
Since the LL has an AFC function for eliminating a frequency error in addition to a phase-locked carrier recovery function, it is possible to obtain an effect of enabling high-speed pulling into the phase-locked state.

[Brief description of drawings]

FIG. 1 is a principle diagram showing a basic configuration of a carrier recovery circuit according to claim 1 of the present invention.

FIG. 2 is a block diagram of a carrier recovery circuit of an embodiment corresponding to claim 2 of the present invention.

FIG. 3 is a mode switching diagram for explaining the operation of the embodiment of the present invention.

FIG. 4 is a diagram showing an example of the configuration of a conventional carrier recovery circuit.

[Explanation of symbols]

(1) is a phase detector, (2) is a modulated wave component removal circuit, (3) is a differentiation circuit, (4) is a loop filter, and (5) is a digital VC.
An integrating circuit corresponding to O, (6) a D / A converter, and (7) an analog VCO.

Claims (3)

[Claims] 1. A phase detector (1) for outputting a baseband signal and a phase error proportional to the phase angle θ of the quadrature component I, Q from an input 2 ⁿ phase PSK modulated wave and its output phase (2) which removes the modulated wave component by frequency multiplication etc. and the output phase of the carrier component after removing the modulated wave component after each multiplication with the external passband control coefficients β and α. A loop filter (4) that removes noise and accumulates phase error by passing it through a perfect integration type low-pass filter, and adds its output with external offset data if necessary to determine the range of pull-in to the PLL loop. It consists of an integrator circuit (5) corresponding to a digital VCO that converts into quadrature component I and Q data after preventing reduction, and outputs the data I and Q, which are the output of the integrator circuit (5) and digital reproduction carrier wave. Output data by adding to the output of the phase detector (1) and identifying the added output In the carrier reproducing circuit of the demodulator for the modulated wave component removing circuit
Differentiator circuit that extracts the frequency error component by differentiating the output phase of the carrier component after removing the modulated wave component from the input 2 ^n- phase PSK modulated wave by (2) (select A with switch SW ₁ )
(3) A carrier recovery circuit comprising the above (3), wherein the loop filter (4) has an AFC function for minimizing the extracted frequency error component (selecting A by the switch SW ₂ ). 2. A D / A converter (6) for converting the digital signal D of the output of the loop filter (4) into an analog signal A and an analog VCO (7) for reproducing the analog carrier by adding the output A thereof. 2. The carrier wave regenerating circuit according to claim 1, further comprising: (1), wherein the carrier wave regenerated by the analog VCO (7) is input to the phase detector (1) for phase detection. 3. The loop filter (4) outputs the output phase of only the carrier wave component from which the modulated wave component is removed from the preceding modulated wave component elimination circuit (2) from the external pass band control coefficient. An incomplete integral type (B) in which each multiplication with β, α is added to the output after passing through the low-pass filter, and a complete integration in which only the low-pass filter is passed without addition after each multiplication with the coefficients β, α 2. The carrier wave regenerating circuit according to claim 1, wherein the carrier wave regenerating circuit can be switched to two types of type (A).