JPH0722723A - Feedthrough electrode of substrate - Google Patents

Feedthrough electrode of substrate

Info

Publication number
JPH0722723A
JPH0722723A JP19082393A JP19082393A JPH0722723A JP H0722723 A JPH0722723 A JP H0722723A JP 19082393 A JP19082393 A JP 19082393A JP 19082393 A JP19082393 A JP 19082393A JP H0722723 A JPH0722723 A JP H0722723A
Authority
JP
Japan
Prior art keywords
substrate
hole
conductor layer
binder
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP19082393A
Other languages
Japanese (ja)
Other versions
JP2756223B2 (en
Inventor
Tei Taguchi
禎 田口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nidec Instruments Corp
Original Assignee
Sankyo Seiki Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sankyo Seiki Manufacturing Co Ltd filed Critical Sankyo Seiki Manufacturing Co Ltd
Priority to JP5190823A priority Critical patent/JP2756223B2/en
Publication of JPH0722723A publication Critical patent/JPH0722723A/en
Application granted granted Critical
Publication of JP2756223B2 publication Critical patent/JP2756223B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4061Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in inorganic insulating substrates

Landscapes

  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

PURPOSE:To prevent clearance from being formed between a through hole and an electrode, improve adhesion property between the through hole and the electrode, and then prevent the electrode from falling from the through hole in a substrate where the through hole through the substrate in the direction of front and back surfaces is formed and then a feedthrough electrode for continuing and connecting the front and rear surfaces within the through hole. CONSTITUTION:A conductor layer 3 where a binder is added within a through hole 2 and a conductor layer 4 where no binder is included are filled and formed. The conductor layer 3 where the binder is added is provided on the peripheral surface of the through hole 2 and the conductor layer 4 which does not include the binder may be filled into the conductor layer 3. The substrate may be a sensitized glass.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、例えば磁気抵抗素子等
の磁気センサの基板、その他各種電子機器に適用可能な
基板の貫通電極の構造に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of a through electrode of a substrate of a magnetic sensor such as a magnetoresistive element, and other substrates applicable to various electronic devices.

【0002】[0002]

【従来の技術】例えば、磁気式エンコーダ等の磁気セン
サとして用いる磁気抵抗素子では、磁気検知部を外部回
路に接続するための電極を、基板の表面側すなわち磁性
膜形成側に形成すると、磁気抵抗素子を磁気記録体に対
向配置するに際し、上記電極部の盛り上がりを避けて配
置する必要があることから、磁性膜と磁気記録体との間
隔が大きくなりすぎたり、上記電極部分を磁気記録体と
の対向面からずらして配置する必要があるなどの不具合
がある。そこで、基板に表裏に貫通する貫通孔を形成
し、この貫通孔内に表裏面間を導通接続する電極を設け
て両面基板とし、基板の裏面側において上記電極を外部
回路に接続するようにした基板の貫通電極が提案されて
いる。
2. Description of the Related Art For example, in a magnetoresistive element used as a magnetic sensor such as a magnetic encoder, when an electrode for connecting a magnetic detection section to an external circuit is formed on the surface side of a substrate, that is, on the magnetic film formation side, the magnetic resistance is reduced. When arranging the element facing the magnetic recording body, it is necessary to arrange it so as to avoid the swelling of the electrode portion, so that the gap between the magnetic film and the magnetic recording body becomes too large, or However, there is a problem that it needs to be arranged so as to be displaced from the facing surface of. Therefore, a through-hole is formed on the substrate so that it penetrates through the through-hole, and an electrode for electrically connecting between the front and back is provided in the through-hole to form a double-sided substrate, and the electrode is connected to an external circuit on the back side of the substrate. Substrate through electrodes have been proposed.

【0003】上記のような両面基板として、高耐熱性、
高強度、高熱伝導の点で、セラミック等の無機材を基板
とし、これに貫通孔を設けて、Ag,Cu等の導体を貫
通孔の内部に形成したものが知られている。上記セラミ
ックは焼成前のグリーンシートの状態でパンチ等により
貫通孔を形成する。一方、基板として感光性ガラスを用
いたものもある。感光性ガラスは、貫通孔を形成したい
ところにだけに紫外線を照射し、熱処理を施し、エッチ
ング処理をすることによって容易に貫通孔付きの基板が
得られるという利点がある。また、さらに熱処理等を施
すと結晶化ガラス質になり、耐熱性及び強度が向上する
という特性がある。このような感光性ガラス基板の貫通
孔に導体を形成することによって両面基板として使用す
ることができる。
As the above-mentioned double-sided substrate, high heat resistance,
From the viewpoint of high strength and high thermal conductivity, it is known that an inorganic material such as ceramic is used as a substrate, a through hole is provided in the substrate, and a conductor such as Ag or Cu is formed inside the through hole. Through holes are formed in the ceramic by punching or the like in the state of the green sheet before firing. On the other hand, there is also a substrate using a photosensitive glass. The photosensitive glass has an advantage that a substrate having a through hole can be easily obtained by irradiating ultraviolet rays only to a place where a through hole is to be formed, heat treatment, and etching treatment. Further, when it is further subjected to heat treatment or the like, it becomes a crystallized glass and has the property of improving heat resistance and strength. By forming a conductor in the through hole of such a photosensitive glass substrate, it can be used as a double-sided substrate.

【0004】しかし、上記のような両面基板において、
上記貫通孔に電極を形成した状態で孔が残っていると、
素子の組立工程中において空気吸引チャックを用いて基
板を搬送しようとするときに上記孔を通じて空気が抜
け、吸引チャックを使用することができないとか、素子
に耐湿性をもたせるために形成した保護膜を基板の表面
ばかりでなく上記孔の内部にまで形成する必要があって
工程が煩雑になるとか、基板の表面にレジストを形成す
る場合、液体が貫通孔を通じて裏面側に至り裏面が汚れ
る、というような不具合がある。
However, in the above double-sided board,
If the hole remains with the electrode formed in the through hole,
During the process of assembling the device, when the substrate is conveyed by using the air suction chuck, air escapes through the holes and the suction chuck cannot be used, or a protective film formed to make the device moisture resistant is used. It is necessary to form not only on the surface of the substrate but also inside the holes, which complicates the process, or when forming a resist on the surface of the substrate, the liquid reaches the back surface side through the through holes and the back surface becomes dirty. There is a problem.

【0005】そこで、基板に形成した貫通孔に導電材を
充填して貫通孔を塞ぎ、上記のような孔が残っているこ
とによる不具合をなくすことができる技術も知られてい
る。本出願人の出願にかかる特開平4−118979号
公報記載の発明はその例である。また、まだ公知ではな
いが、本出願人の出願にかかる実願平4−12417号
の明細書及び図面に記載されているように、基板に表裏
方向に貫通して形成した貫通孔の内面に導電性皮膜を形
成し、さらに貫通孔内に絶縁体を充填してなる基板の貫
通電極も提案されている。
Therefore, there is also known a technique capable of filling a through hole formed in a substrate with a conductive material to close the through hole, thereby eliminating the problem caused by the remaining hole. The invention described in Japanese Patent Application Laid-Open No. 4-118979 filed by the present applicant is an example thereof. Although not known, as described in the specification and drawings of Japanese Patent Application No. 4-12417 filed by the present applicant, the inner surface of the through hole formed through the substrate in the front-back direction is formed. There has also been proposed a through electrode for a substrate in which a conductive film is formed and the through hole is filled with an insulator.

【0006】基板をセラミックで作る場合、バインダー
を含んだグリーンシート状態で貫通孔を形成し、この貫
通孔に導体ペーストを埋め込んで同時に焼けば、セラミ
ック化と導体の焼成が同時にでき、かつ、グリーンシー
トの収縮率が20%近くあるため、上記貫通孔が導体ペ
ーストの収縮率に追従して隙間ができにくく、導体が貫
通孔内に確実に保持される。
When the substrate is made of ceramic, if through holes are formed in the state of a green sheet containing a binder, and a conductor paste is embedded in the through holes and baked at the same time, it is possible to ceramicize and fire the conductor at the same time, and the green Since the contraction rate of the sheet is close to 20%, it is difficult for the through hole to follow the contraction rate of the conductor paste to form a gap, and the conductor is reliably held in the through hole.

【0007】[0007]

【発明が解決しようとする課題】ところが、前に述べた
ような感光性ガラス基板のように、既に基板として形成
されていて大きな収縮挙動を示さない基板の貫通孔に導
体を充填することはかなり難しい。何故なら、基板の貫
通孔と導体との密着性を高めるためには導体がある程度
以上のバインダーを含んでいる必要があるが、バインダ
ーを含んでいると収縮率が大きく、貫通孔の周面と導体
との間に隙間が生じるからであり、逆に、貫通孔の周面
と導体との間に隙間が生じないように導体にバインダー
を添加しないか又は添加してもその割合が極少なくする
と、貫通孔の周面と導体との密着性が低下し、導体が貫
通孔から脱落する恐れがあるからである。
However, it is quite difficult to fill a through hole of a substrate which is already formed as a substrate and does not exhibit a large shrinkage behavior with a conductor, such as the photosensitive glass substrate described above, with a conductor. difficult. The reason is that the conductor needs to contain a certain amount of binder or more in order to improve the adhesion between the through hole of the substrate and the conductor, but if the binder is included, the shrinkage rate is large and This is because a gap is created between the conductor and, conversely, if a binder is not added to the conductor so that a gap is not created between the peripheral surface of the through hole and the conductor, or if the proportion is extremely small even if added. This is because the adhesion between the peripheral surface of the through hole and the conductor is reduced, and the conductor may fall off from the through hole.

【0008】本発明は、このような問題点を解消するた
めになされたもので、基板に表裏方向に貫通する貫通孔
を形成し、この貫通孔内に上記表裏面間を導通接続する
貫通電極を設けてなる基板において、上記貫通孔と電極
との間に隙間ができず、かつ、貫通孔と電極との密着性
が良好で、電極が貫通孔から脱落する恐れのない貫通電
極を提供することを目的とする。
The present invention has been made in order to solve such a problem, and forms a through hole penetrating in the front and back direction in a substrate, and a through electrode for electrically connecting between the front and back surfaces in the through hole. Provided is a through electrode in which a gap is not formed between the through hole and the electrode, the adhesion between the through hole and the electrode is good, and the electrode is not likely to drop from the through hole in the substrate provided with The purpose is to

【0009】[0009]

【課題を解決するための手段】上記目的を達成するため
に本発明は、基板に表裏方向に貫通して形成した貫通孔
内に、バインダーを添加した導体層とバインダーを含ま
ない導体層とを充填形成した。バインダーを添加した導
体層は貫通孔の周面に設け、この導体層の内部にバイン
ダーを含まない導体層を充填してもよい。基板は、感光
性ガラスとしてもよい。
In order to achieve the above object, the present invention provides a conductor layer containing a binder and a conductor layer containing no binder in a through hole formed by penetrating the substrate in the front-back direction. Filled and formed. The conductor layer to which the binder is added may be provided on the peripheral surface of the through hole, and the inside of the conductor layer may be filled with the conductor layer containing no binder. The substrate may be photosensitive glass.

【0010】[0010]

【作用】バインダーを添加した導体層は、基板の貫通孔
周面及びバインダーを含まない導体層と良好に密着す
る。バインダーを含まない導体層は収縮が少なく、基板
の貫通孔周面あるいはバインダーを添加した導体層との
間に隙間ができることはない。
The conductor layer to which the binder is added adheres well to the peripheral surface of the through hole of the substrate and the conductor layer containing no binder. The conductor layer containing no binder shrinks little and no gap is formed between the peripheral surface of the through hole of the substrate and the conductor layer containing the binder.

【0011】[0011]

【実施例】以下、図面を参照しながら本発明にかかる基
板の貫通電極の実施例について説明する。図1、図2に
おいて、基板1は例えば感光性ガラス基板からなり、マ
スク板を被せて紫外線を照射し、熱処理を施し、エッチ
ング処理をすることによって基板1を表裏方向に貫通す
る貫通孔2が形成されている。この貫通孔2内には基板
1の表裏面間を導通接続する貫通電極が形成されてい
る。この貫通電極は、バインダーを添加した導体層3と
バインダーを含まない導体層4からなる。バインダーを
添加した導体層3は貫通孔2の周面に設けられ、この導
体層3の内部にバインダーを含まない導体層4が充填形
成されている。
Embodiments of the through electrode of the substrate according to the present invention will be described below with reference to the drawings. In FIGS. 1 and 2, the substrate 1 is made of, for example, a photosensitive glass substrate, and a through hole 2 penetrating the substrate 1 in the front-back direction is formed by covering the mask plate with ultraviolet rays, heat treatment, and etching. Has been formed. Through electrodes 2 are formed in the through holes 2 to electrically connect the front and back surfaces of the substrate 1. This through electrode is composed of a conductor layer 3 containing a binder and a conductor layer 4 containing no binder. The conductor layer 3 to which the binder is added is provided on the peripheral surface of the through hole 2, and the conductor layer 3 containing no binder is filled inside the conductor layer 3.

【0012】上記各導体層3,4の形成方法としては、
一定の大きさの貫通孔2を導体ペーストで埋め、これを
焼き上げる方法がある。この方法によれば容易に導体層
を形成することができる。しかし、通常の導体ペースト
では溶剤量が多く、乾燥時に収縮して貫通孔周壁との間
に既に隙間を生じ、これを焼くとバインダー材により導
体粉末が凝縮すると共に導体粉末が焼結するためさらに
収縮し、貫通孔周面と導体層との間の隙間がさらに拡大
する不具合がある。
As a method of forming the above-mentioned conductor layers 3 and 4,
There is a method of filling a through hole 2 of a certain size with a conductor paste and baking it. According to this method, the conductor layer can be easily formed. However, in a normal conductor paste, the amount of solvent is large, and when it is dried, it contracts to form a gap between the through hole and the peripheral wall of the through hole. When this is baked, the conductor powder is condensed by the binder material and the conductor powder is further sintered. There is a problem that it shrinks and the gap between the peripheral surface of the through hole and the conductor layer further expands.

【0013】そこで、まず基板1の貫通孔2の周面にバ
インダーを添加した導体で導体層3を形成し、必要に応
じてこれを焼成し、そのあと上記導体層3の内部にバイ
ンダーを含まない導体を充填し、必要に応じて焼成して
導体層4を形成する。導体層3を形成するための導体ペ
ーストはバインダーを添加した一般的な導体ペーストで
よい。
Therefore, first, the conductor layer 3 is formed on the peripheral surface of the through hole 2 of the substrate 1 with a conductor to which a binder is added, and the conductor layer 3 is fired if necessary, and then the conductor layer 3 contains a binder. The conductor layer 4 is formed by filling an unfilled conductor and firing it if necessary. The conductor paste for forming the conductor layer 3 may be a general conductor paste to which a binder is added.

【0014】一方、導体層4を形成する導体ペーストは
固形分を90%以上とし、乾燥時の収縮をできるだけ抑
え、また、かさ密度が小さくならないように、導体粉末
の平均粒径は例えば50μm以上というようにあまり小
さくしない。さらに、ガラスや酸化物などの通常添加す
るバインダーは表面張力で収縮を助長するので添加しな
い。導体層4を形成する導体ペーストの導体は、導体層
3を形成する導体ペーストの導体と同じ材質系のものと
するのが望ましい。
On the other hand, the conductor paste for forming the conductor layer 4 has a solid content of 90% or more, the shrinkage during drying is suppressed as much as possible, and the average particle size of the conductor powder is, for example, 50 μm or more so that the bulk density is not reduced. Do not make it so small. In addition, binders such as glass and oxides that are usually added do not add because they accelerate the shrinkage due to the surface tension. The conductor of the conductor paste forming the conductor layer 4 is preferably of the same material system as that of the conductor of the conductor paste forming the conductor layer 3.

【0015】以上説明した実施例によれば、貫通孔の周
面に形成された導体層3はバインダーを添加した導体か
らなるため、収縮率は大きいが、基板1との密着性は良
好である。一方、導体層3の内部に充填形成された導体
層4はバインダーを含まない導体からなるため、基板1
との密着性は劣るが、ほとんど収縮しない。従って、導
体層3の収縮を導体層4が抑制し、基板1の貫通孔2と
の間に隙間が生じることがなく、かつ、貫通孔2の側面
との密着性の良好な貫通電極を得ることができる。加え
て、各導体層3,4を形成する導体ペーストの導体を同
じ材質系にしておけば、導体層3,4相互の密着性も良
好になる利点がある。
According to the embodiment described above, since the conductor layer 3 formed on the peripheral surface of the through hole is made of a conductor to which a binder is added, the contraction rate is large, but the adhesion with the substrate 1 is good. . On the other hand, since the conductor layer 4 filled in the conductor layer 3 is made of a conductor containing no binder, the substrate 1
Adhesion with is poor, but it hardly shrinks. Therefore, the conductor layer 4 suppresses the contraction of the conductor layer 3, a gap is not formed between the conductor layer 3 and the through hole 2 of the substrate 1, and a through electrode having good adhesion to the side surface of the through hole 2 is obtained. be able to. In addition, if the conductors of the conductor paste forming the conductor layers 3 and 4 are made of the same material system, the adhesion between the conductor layers 3 and 4 is improved.

【0016】上記実施例にかかる基板の貫通電極の形成
方法は各種考えられるが、一例としてスクリーン印刷法
を用いることができる。まず、図3に示すように、基板
1の上にスクリーン印刷用マスク板5を載せる。このと
きマスク板5の所定のメッシュ部分が貫通孔2と一致す
るように位置決めする。次に基板1の裏面側から空気を
吸引しながら、マスク板5上でスキージー6を移動さ
せ、マスク板5上のバインダーを添加した導電ペースト
7をスキージー6で掻き取る。このときマスク板5のメ
ッシュ部分を通じて導電ペースト7が基板1の裏面側に
吸引され、貫通孔2の周面に導電ペースト7が付着して
導体層3が形成される。
Various methods can be considered for forming the through electrode of the substrate according to the above-mentioned embodiment, and the screen printing method can be used as an example. First, as shown in FIG. 3, the screen printing mask plate 5 is placed on the substrate 1. At this time, the mask plate 5 is positioned so that a predetermined mesh portion thereof coincides with the through hole 2. Next, while sucking air from the back surface side of the substrate 1, the squeegee 6 is moved on the mask plate 5, and the conductive paste 7 to which the binder is added on the mask plate 5 is scraped off by the squeegee 6. At this time, the conductive paste 7 is sucked to the back surface side of the substrate 1 through the mesh portion of the mask plate 5, and the conductive paste 7 is attached to the peripheral surface of the through hole 2 to form the conductor layer 3.

【0017】このようにして形成された導体層3の内部
にバインダーを含まない導電ペーストを詰め込んで導体
層4を形成する場合も空気吸引力を利用することができ
る。すなわち、図4に示すように、基板1の片面側に貫
通孔2を塞ぐようにして濾紙8を配置し、この濾紙8を
通じて空気を吸引しながら、バインダーを含まない導電
ペーストを上記導体層3の形成方法と同様にスキージー
で掻き取る。こうすることによって導体層3の内部に導
体層4が形成されるが、さらに導体層4の密度を上げる
ために上から押さえ込めばよい。
Even when the conductive layer 3 thus formed is filled with a conductive paste containing no binder to form the conductive layer 4, the air suction force can be utilized. That is, as shown in FIG. 4, a filter paper 8 is arranged on one side of the substrate 1 so as to close the through hole 2, and air is sucked through the filter paper 8 while the conductive paste containing no binder is applied to the conductor layer 3 Scratch with a squeegee as in the formation method of. By doing so, the conductor layer 4 is formed inside the conductor layer 3, but it may be pressed down from above in order to further increase the density of the conductor layer 4.

【0018】次に、本発明の別の実施例について説明す
る。図5に示す実施例は、基板1の貫通孔2内に、基板
1の厚さ方向中間部にバインダーを含まない導体層11
を充填形成し、この導体層11を挾んで基板1の表裏側
にバインダーを添加した導体層10,12を充填形成し
たものである。この実施例も、導体層10,12の収縮
を導体層11が補完し、基板1の貫通孔2との間に隙間
が生じることがなく、かつ、貫通孔2の側面との密着性
の良好な貫通電極を得ることができる。加えて、各導体
層10,11,12を形成する導体ペーストの導体を同
じ材質系にしておけば、導体層10,11,12相互の
密着性も良好になる利点がある。
Next, another embodiment of the present invention will be described. In the embodiment shown in FIG. 5, the conductor layer 11 containing no binder in the through hole 2 of the substrate 1 at the middle portion in the thickness direction of the substrate 1.
Is formed, and the conductor layer 11 is sandwiched between the conductor layers 10 and 12 with the binder added to the front and back sides of the substrate 1. Also in this embodiment, the contraction of the conductor layers 10 and 12 is complemented by the conductor layer 11, a gap is not formed between the conductor layer 10 and the through hole 2 of the substrate 1, and the adhesion to the side surface of the through hole 2 is good. Through electrodes can be obtained. In addition, if the conductors of the conductor paste forming the conductor layers 10, 11, 12 are made of the same material system, there is an advantage that the mutual adhesion of the conductor layers 10, 11, 12 is improved.

【0019】図5に示す貫通電極の形成方法の例として
次の方法がある。まず、バインダーを添加した導電ペー
ストを前述のスクリーン印刷法などにより基板1の片面
側に印刷形成して貫通孔2の一端側を塞ぐ。次に、貫通
孔2の開口側からバインダーを含まない導電ペーストを
押し込んで充填する。次に、貫通孔2の残りの部分にバ
インダーを添加した導電ペーストを前述のスクリーン印
刷法などにより印刷形成して貫通孔2を完全に塞ぐ。
As an example of the method of forming the through electrode shown in FIG. 5, there is the following method. First, a conductive paste containing a binder is printed and formed on one side of the substrate 1 by the screen printing method described above to close one end of the through hole 2. Next, a conductive paste containing no binder is pushed in from the opening side of the through hole 2 to fill it. Next, a conductive paste containing a binder is printed and formed on the remaining portion of the through hole 2 by the screen printing method described above to completely close the through hole 2.

【0020】あるいは、図5に示す貫通電極の形成方法
の別の例として図6に示すような方法もある。これはま
ず、基板1の貫通孔2の内径と同じ径の突部14を有す
る治具13を、基板1の片面側から上記突部14を貫通
孔2に嵌めた状態でセットし、貫通孔2の開口端側から
バインダーを含まない導電ペーストを充填して導体層1
1を形成する。このとき貫通孔2の開口端側に導体層1
1が形成されない部分15を残しておく。次に治具13
を取り除き、基板1の表裏からスクリーン印刷その他の
手法で導体層11の両面にバインダーを添加した導電ペ
ーストを埋め込み、導体層10,12を形成する。
Alternatively, as another example of the method of forming the through electrode shown in FIG. 5, there is a method shown in FIG. First, a jig 13 having a protrusion 14 having the same diameter as the inner diameter of the through hole 2 of the substrate 1 is set in a state in which the protrusion 14 is fitted into the through hole 2 from one side of the substrate 1, and the through hole 2 is formed. 2 is filled with a conductive paste containing no binder from the opening end side of the conductor layer 1
1 is formed. At this time, the conductor layer 1 is formed on the opening end side of the through hole 2.
The portion 15 where 1 is not formed is left. Next, the jig 13
Then, the conductor layers 10 and 12 are formed by embedding a conductive paste containing a binder on both surfaces of the conductor layer 11 from the front and back of the substrate 1 by screen printing or another method.

【0021】なお、以上説明した実施例のようにバイン
ダーを添加した導体層とバインダーを含まない導体層を
基板1の厚さ方向に重ねて形成する場合、バインダーを
含まない導体層の片面側にのみバインダーを添加した導
体層を形成してもよい。図7はこのような実施例を示す
もので、バインダーを添加した導体層10とバインダー
を含まない導体層11だけを重ねて形成したものであ
る。導体層11の表面及び導体層10の表面は基板1の
表面及び裏面と同一面上にある。図7において基板1の
下側を表面とすれば、基板1の表面側には導体層11の
表面に至る例えば磁性膜17などが形成され、この磁性
膜を含む基板1の表面全体が保護膜18で保護されてい
る。基板1の裏面側の導体層11の表面には外部の回路
に接続するためのリードフレーム等が半田付けその他適
宜の手段で接続される。なお、導体層11の表面は必ず
しも平坦面である必要はなく、図7に鎖線で示すような
凹面16になっていても差し支えない。
When the conductor layer containing a binder and the conductor layer containing no binder are formed in the thickness direction of the substrate 1 as in the above-described embodiment, one side of the conductor layer containing no binder is formed. You may form the conductor layer which added the binder only. FIG. 7 shows such an embodiment, and is formed by stacking only the conductor layer 10 containing a binder and the conductor layer 11 containing no binder. The surface of the conductor layer 11 and the surface of the conductor layer 10 are flush with the front and back surfaces of the substrate 1. In FIG. 7, assuming that the lower side of the substrate 1 is the surface, a magnetic film 17 reaching the surface of the conductor layer 11 is formed on the surface side of the substrate 1, and the entire surface of the substrate 1 including this magnetic film is a protective film. Protected by 18. A lead frame or the like for connecting to an external circuit is connected to the surface of the conductor layer 11 on the back surface side of the substrate 1 by soldering or other appropriate means. The surface of the conductor layer 11 does not necessarily have to be a flat surface, and may have a concave surface 16 as shown by a chain line in FIG. 7.

【0022】本発明に用いる基板の材質は特定のものに
限定されるものではないが、感光性ガラス基板は前述の
ように貫通孔の形成加工が容易であり、面粗度が良好で
あり、形成した貫通孔の収縮挙動もなく、しかも導体と
の密着強度も充分にあることから、感光性ガラス基板の
使用が推奨される。もっとも他の材質を用いても差し支
えない。例えばアルミナ基板などは、焼結温度が110
0℃もあるため、一般的なAg、Cuなどの導体を用い
て同時に焼成することはできないが、アルミナ基板を焼
結したあとで導体を焼成する場合は、AgあるいはCu
導体などの低融点で電気伝導度の高い導体を使用するこ
とができる。
The material of the substrate used in the present invention is not limited to a particular material, but the photosensitive glass substrate is easy to form a through hole as described above and has a good surface roughness. The use of a photosensitive glass substrate is recommended because the formed through-holes have no shrinkage behavior and have sufficient adhesion strength with the conductor. However, other materials may be used. For example, an alumina substrate has a sintering temperature of 110.
Since it is 0 ° C., it is not possible to simultaneously burn using a general conductor such as Ag or Cu. However, when firing the conductor after sintering the alumina substrate, Ag or Cu is used.
A conductor having a low melting point and high electric conductivity such as a conductor can be used.

【0023】本発明にかかる基板の貫通電極は、磁気抵
抗素子などの磁気センサに限らず、各種電子機器の基板
に適用することができる。
The through electrode of the substrate according to the present invention can be applied not only to magnetic sensors such as magnetoresistive elements but also to substrates of various electronic devices.

【0024】[0024]

【発明の効果】本発明によれば、基板を表裏方向に貫通
して形成た貫通孔内にバインダーを添加した導体層とバ
インダーを含まない導体層とを充填形成したため、バイ
ンダーを添加した導体層の収縮をバインダーを含まない
導体層が抑制し、基板の貫通孔と導体層との間に隙間が
生じることがなく、かつ、貫通孔の側面との密着性の良
好な貫通電極を得ることができる。
According to the present invention, since the conductor layer containing the binder and the conductor layer containing no binder are filled in the through holes formed through the substrate in the front-back direction, the conductor layer containing the binder is formed. The conductor layer containing no binder suppresses the shrinkage of the substrate, a gap is not formed between the through hole of the substrate and the conductor layer, and a through electrode having good adhesion to the side surface of the through hole can be obtained. it can.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明にかかる基板の貫通電極の一実施例を示
す断面図である。
FIG. 1 is a cross-sectional view showing an example of a through electrode of a substrate according to the present invention.

【図2】同上平面図である。FIG. 2 is a plan view of the same.

【図3】上記実施例にかかる貫通電極の製造工程の例を
示す断面図である。
FIG. 3 is a cross-sectional view showing an example of a process of manufacturing a through electrode according to the above embodiment.

【図4】同じく別の製造工程の例を示す断面図である。FIG. 4 is a cross-sectional view showing another example of the manufacturing process.

【図5】本発明にかかる基板の貫通電極の別の実施例を
示す断面図である。
FIG. 5 is a sectional view showing another embodiment of the through electrode of the substrate according to the present invention.

【図6】同上実施例にかかる貫通電極の製造工程の例を
示す断面図である。
FIG. 6 is a cross-sectional view showing an example of a manufacturing process of the through electrode according to the example.

【図7】本発明にかかる基板の貫通電極のさらに別の実
施例を示す断面図である。
FIG. 7 is a sectional view showing still another embodiment of the through electrode of the substrate according to the present invention.

【符号の説明】[Explanation of symbols]

1 基板 2 貫通孔 3 バインダーを添加した導体層 4 バインダーを含まない導体層 10 バインダーを添加した導体層 11 バインダーを含まない導体層 12 バインダーを添加した導体層 1 Substrate 2 Through Hole 3 Binder-Added Conductor Layer 4 Binder-Free Conductor Layer 10 Binder-Added Conductor Layer 11 Binder-Free Conductor Layer 12 Binder-Added Conductor Layer

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 基板に表裏方向に貫通する貫通孔を形成
し、この貫通孔内に上記表裏面間を導通接続する貫通電
極を設けてなる基板であって、上記貫通孔内にバインダ
ーを添加した導体層とバインダーを含まない導体層とを
充填形成したことを特徴とする基板の貫通電極。
1. A substrate comprising a substrate having through-holes penetrating in the front-back direction, and through-hole electrodes provided in the through-hole for electrically connecting between the front and back surfaces, wherein a binder is added to the through-holes. A through electrode for a substrate, characterized in that the formed conductor layer and a conductor layer containing no binder are formed by filling.
【請求項2】 貫通孔の周面にバインダーを添加した導
体層を設け、この導体層の内部にバインダーを含まない
導体層を充填した請求項1記載の基板の貫通電極。
2. The through electrode for a substrate according to claim 1, wherein a conductor layer containing a binder is provided on the peripheral surface of the through hole, and a conductor layer containing no binder is filled inside the conductor layer.
【請求項3】 基板は、感光性ガラスである請求項1又
は2記載基板の貫通電極。
3. The through electrode of the substrate according to claim 1, wherein the substrate is photosensitive glass.
JP5190823A 1993-07-02 1993-07-02 Substrate through electrode Expired - Fee Related JP2756223B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5190823A JP2756223B2 (en) 1993-07-02 1993-07-02 Substrate through electrode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5190823A JP2756223B2 (en) 1993-07-02 1993-07-02 Substrate through electrode

Publications (2)

Publication Number Publication Date
JPH0722723A true JPH0722723A (en) 1995-01-24
JP2756223B2 JP2756223B2 (en) 1998-05-25

Family

ID=16264359

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5190823A Expired - Fee Related JP2756223B2 (en) 1993-07-02 1993-07-02 Substrate through electrode

Country Status (1)

Country Link
JP (1) JP2756223B2 (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1436605A4 (en) * 2001-09-07 2006-10-04 Medtronic Minimed Inc Sensor substrate and method of fabricating same
US7323142B2 (en) 2001-09-07 2008-01-29 Medtronic Minimed, Inc. Sensor substrate and method of fabricating same
JP2008109144A (en) * 2007-11-05 2008-05-08 Toshiba Corp Manufacturing method and inspection method for circuit board
JP2010532562A (en) * 2007-07-05 2010-10-07 オー・アー・セー・マイクロテック・アクチボラゲット Low resistance through-wafer vias
WO2014182120A1 (en) * 2013-05-09 2014-11-13 주식회사 옵토레인 Method for forming through-electrode of interposer substrate, and semiconductor package including interposer substrate
JP2016009783A (en) * 2014-06-25 2016-01-18 アルバック成膜株式会社 Method of manufacturing through electrode substrate

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5512777A (en) * 1978-07-14 1980-01-29 Fujitsu Ltd Method of manufacturing ceramic substrate
JPH01321688A (en) * 1988-06-23 1989-12-27 Ibiden Co Ltd Manufacture of ceramic wiring board with through-hole
JPH03212991A (en) * 1990-01-17 1991-09-18 Fujitsu Ltd Method for filling fine metallic powder into via hole
JPH0464254A (en) * 1990-07-04 1992-02-28 Ngk Insulators Ltd Ceramic wiring board and manufacture thereof
JPH04188689A (en) * 1990-11-19 1992-07-07 Toshiba Corp Printed wiring board

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5512777A (en) * 1978-07-14 1980-01-29 Fujitsu Ltd Method of manufacturing ceramic substrate
JPH01321688A (en) * 1988-06-23 1989-12-27 Ibiden Co Ltd Manufacture of ceramic wiring board with through-hole
JPH03212991A (en) * 1990-01-17 1991-09-18 Fujitsu Ltd Method for filling fine metallic powder into via hole
JPH0464254A (en) * 1990-07-04 1992-02-28 Ngk Insulators Ltd Ceramic wiring board and manufacture thereof
JPH04188689A (en) * 1990-11-19 1992-07-07 Toshiba Corp Printed wiring board

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1436605A4 (en) * 2001-09-07 2006-10-04 Medtronic Minimed Inc Sensor substrate and method of fabricating same
US7323142B2 (en) 2001-09-07 2008-01-29 Medtronic Minimed, Inc. Sensor substrate and method of fabricating same
US7514038B2 (en) 2001-09-07 2009-04-07 Medtronic Minimed, Inc. Sensor substrate and method of fabricating same
US8821793B2 (en) 2001-09-07 2014-09-02 Medtronic Minimed, Inc. Sensor substrate and method of fabricating same
JP2010532562A (en) * 2007-07-05 2010-10-07 オー・アー・セー・マイクロテック・アクチボラゲット Low resistance through-wafer vias
US8871641B2 (en) 2007-07-05 2014-10-28 ÅAC Microtec AB Low resistance through-wafer via
JP2008109144A (en) * 2007-11-05 2008-05-08 Toshiba Corp Manufacturing method and inspection method for circuit board
WO2014182120A1 (en) * 2013-05-09 2014-11-13 주식회사 옵토레인 Method for forming through-electrode of interposer substrate, and semiconductor package including interposer substrate
KR101468680B1 (en) * 2013-05-09 2014-12-04 (주)옵토레인 Method for manufacturing through via of interposer and semiconductor package comprising interposer
JP2016009783A (en) * 2014-06-25 2016-01-18 アルバック成膜株式会社 Method of manufacturing through electrode substrate

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