JPH0715904B2 - Semiconductor device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a semiconductor device in which a plurality of elements such as MOS FETs are formed on a semiconductor substrate, and particularly to an impurity-containing silicate glass film and a nitride film on the substrate. The present invention relates to a semiconductor device having a silicon film.

[Background technology and its problems]

For example, in a semiconductor device such as an IC (integrated circuit) or an LSI (large-scale integrated circuit) having an N-channel MOS type FET (field effect transistor) or a bipolar transistor, AsSG (arsenic silicate glass) is formed on a semiconductor substrate.
Alternatively, a structure is known in which a reflow film made of SbSG (antimony silicate glass) or the like is formed, and a plasma SiN (silicon nitride) film is further formed on this reflow film directly or through an SiO ₂ layer.

That is, FIG. 8 shows a part of an IC or LSI having N-channel MOS type FET elements 30, 30 as an example of such a semiconductor device. In FIG. 8, for example, a P-type diffusion region 32 is formed so as to face the surface of the N-type silicon semiconductor substrate 31, and the FE is provided so as to face the surface of the P-type region 32.
The N ⁺ type regions serving as the source and drain regions of the T elements 30, 30 are formed by a diffusion method or the like. Here, an insulating protective film 33 of SiO ₂ is formed on the surface of the P-type region 32 by a selective oxidation method or the like, and a gate electrode 34 and a wiring electrode 35 made of Poly-Si (polycrystalline silicon) are formed on the protective film 33. Etc., then AsSG
A reflow film 36 of (arsenic silicate glass) or SbSG (antimony silicate glass) is formed. For example, the reflow film 36 of AsSG can be subjected to reflow treatment at a relatively lower temperature than PSG (phosphorus silicate glass), and has little adverse effect due to corrosion and migration of Al when the Al (aluminum) electrode 35 and the like are formed. It has features such as high reliability. Next, AsSG reflow film
After forming an Al electrode 37 and the like on the surface 36 as required, a SiN (silicon nitride) film 38 for surface stabilization (passivation)
Are deposited by plasma CVD method. This plasma SiN
The film 38 has excellent moisture resistance, chemical stability, and physical stability, and also has the advantage that deposition can be performed at a relatively low temperature.

By the way, plasma Si is formed on the AsSG reflow film 36.
In the structure in which the N film 38 is formed by stacking, so-called forming / annealing treatment is performed in a temperature range of, for example, 350 to 450 ° C.
After about 120 to 120 minutes, the density Qss of the electric charges existing at the interface between the Si of the substrate and the SiO ₂ insulating protective film 33 increases remarkably, and especially the interface of the element isolation region 39 between the FET elements 30 and 30. Charge density Qs
The increase in s makes it impossible to effectively isolate the elements. That is, the normal Qss value is 1 to 5 x 10
^While it is about ¹⁰ cm ⁻² , the value of Qss in the above configuration reaches 1 to 5 × 10 ¹² cm ⁻² , and the element isolation region 39 becomes almost conductive.

This is because the plasma SiN film 38 contains 5 to 20 atm of [H] (hydrogen).
%, And the above reflow film
Due to the fact that a Cl (chlorine) -based gas such as AsCl ₃ or SbCl ₃ is used as a source gas when forming AsSG or SbSG, etc., which is to be CVD-formed by CVD, the plasma SiN film 38 [H] moves to reach the Si (substrate) -SiO ₂ (protective film) interface without being caught by the reflow film 36 and is accumulated as electric charge, causing a so-called field inversion phenomenon to cause element isolation. It believed because pseudo N-channel will be formed on the Si-SiO ₂ interface region.

[Object of the Invention]

The present invention has been made in view of the circumstances described above, can be reflowed at a lower temperature, moreover Si-SiO ₂ interface field density Qss of the isolation region which becomes a problem when the plasma SiN film is laminated It is an object of the present invention to provide a semiconductor device capable of suppressing the increase in the number of wirings, having a high reliability of wiring, enabling high integration, and not adversely affecting isolation between elements.

[Outline of Invention]

That is, the feature of the semiconductor device according to the present invention is that a silicate glass containing arsenic or antimony that can be reflowed by a heat treatment at a low temperature is used as a reflow film, on which a moisture resistance or a chemical / chemical resistance is used as a passivation film or an interlayer insulating film. In a semiconductor device formed with plasma SiN excellent in physical stability, between the silicon oxide film on the semiconductor substrate surface and the plasma SiN film, consisting of silicate glass containing 5 to 12 wt% phosphorus, after film formation, That is, the hydrogen diffusion preventing layer formed without performing the reflow by the heat treatment is provided.

In the semiconductor device of the present invention, it is the silicate glass containing arsenic or antimony that functions as the reflow film,
Since it can be reflowed by heat treatment at a low temperature, it is not adversely affected by Al corrosion or migration. Further, the spread of the diffusion layer in the source region and the drain region can be suppressed, and high integration can be realized. However, this reflow film cannot capture [H] moving from the plasma SiN film containing a large amount of hydrogen.

On the other hand, the hydrogen diffusion preventing layer made of silicate glass containing 5 to 12% by weight of phosphorus does not have a function as a reflow film, but by providing this hydrogen diffusion preventing layer, the interface between the semiconductor substrate and the silicon oxide film is provided. It is possible to significantly reduce the electric field density Qss of the electric charges existing in (1 or more digits compared to the conventional one). This is because this hydrogen diffusion prevention layer
This is to prevent [H] (hydrogen) contained in the plasma SiN film from moving and reaching the semiconductor substrate during the annealing process or the like.

In addition, the hydrogen diffusion prevention layer is a reflow film and plasma Si.
It may be provided between the N films or between the reflow film and the silicon oxide film on the surface of the semiconductor substrate.

In the semiconductor device of the present invention, as described above, a reflow film made of silicate glass containing arsenic or antimony,
A hydrogen diffusion preventing layer made of silicate glass containing 5 to 12% by weight of phosphorus is also used, and as a result, both low temperature reflow and good element isolation are achieved.

〔Example〕

Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a schematic cross-sectional view showing a first embodiment of the present invention, in which an N type source region 2S and a drain region 2D are exposed to the surface of a P type region of a Si semiconductor substrate 1 by, for example, a diffusion method or the like. Multiple sets are formed for each. Above the active region sandwiched by the source region 2S and the drain region 2D, a gate insulating film 3G made of thin SiO ₂ or the like is interposed.
A gate electrode 4 made of Poly-Si (polycrystalline silicon) is formed. Here, for the gate insulating film 3G,
By applying a selective oxidation method to the substrate surface,
It may be formed together with the field insulating film 3F having a large film thickness in other portions (for example, about 3000 to 8000 Å). The wiring electrode 5 made of, for example, Poly-Si may be formed on the field insulating film 3F, if necessary. AsSG (arsenic silicate glass) is deposited on the insulating protective film 3 including the gate insulating film 3G and the field insulating film 3F to a thickness of about 3000 to 8000 Å by, for example, a CVD method, and then, for example, 900 ° C, 10 ° C. A reflow process (or a glass flow process) is performed by heating for about one minute to form the AsSG reflow film 6. This reflow treatment is to prevent the disconnection and the like by making the inclination of the step portion such as the etching edge portion gentle by utilizing the flow phenomenon of the glass at the time of heating.

Note that, for example, after the AsSG deposition before the reflow treatment, a window opening process for contact with the source and drain regions 2S and 2D is performed, and the source and drain electrodes 7 are formed.
By forming S and 7D, N-channel MOS type FET
The element of (field effect transistor) is formed.

The above configuration is the same as the conventional one, and is not limited to the manufacturing method described above, and the film thickness and the like may be set in the same manner as the conventional one.

Next, the AsSG film 6 is also used as, for example, an interlayer insulating film.
After forming the wiring electrode 8a made of Al (aluminum) or the like on the AsSG film 6 as necessary, PSG (phosphorus silicate glass) is deposited by, for example, the CVD method to form P
A hydrogen diffusion preventing layer 9 made of an SG film is formed. At this time, the thickness of the PSG film 9 is 3000 to 8000Å, and P
The concentration of (phosphorus) is set to 5% by weight or more. As will be described later, the P concentration is preferably in the range of 7 to 12% by weight, more preferably 9 to 12% by weight.

The hydrogen diffusion prevention layer film 9 prevents the movement and diffusion of hydrogen, and is not subjected to reflow by heat treatment unlike the AsSG film 6 described above.

Next, if necessary, a wiring electrode 8b made of Al or the like is formed on the hydrogen diffusion preventing layer 9, and then SiN is formed by a plasma CVD method.
The (silicon nitride) film 10 is formed by, for example, 8000 to 12000Å (0.8 to 1,
It is formed to a thickness of about 2 μm.

Structure described above, i.e., in order from the uppermost layer, a semiconductor device having a plasma _{SiN-PSG-AsSG-SiO 2} -Si substrate, the structure of, when changing the P (phosphorus) concentration of the hydrogen diffusion preventing layer 9 As a result of measuring the SiO ₂ —Si interface charge density Qss of, a graph as shown in FIG. 2 was obtained. In FIG. 2, the vertical axis represents the interface charge Qss per unit area (1 cm ² ) on a logarithmic scale, and the horizontal axis represents the P concentration in weight%.
As is clear from the graph of FIG. 2, the silicate glass film containing no P (P concentration of 0% by weight) has a Qss of 2 × 10 ¹² cm ^-2 or more. ,
When a PSG film having a P concentration of 5% by weight or more is used, Qss decreases by about one digit or more (1/10 or less), and good results are obtained. Practically, it is preferable that the P concentration is 7 wt% or more so that the value of Qss is about 10 ¹¹ cm ^-2 or less.
Considering the corrosion of Al when it is used as the interlayer insulating film of the wiring electrode, the P concentration is preferably 12% by weight or less. More preferably, the P concentration is in the range of 9% by weight or more and 12% by weight or less.

Here, instead of the AsSG reflow film 6, a Pb-free reflow film such as an SbSG (antimony silicate glass) reflow film may be used. Also, AsSG film and SbSG
A multilayer structure such as a film may be used. Impurities of such an interlayer silicate glass film are generally selected to have a concentration that allows reflow. In short, a P (phosphorus) concentration of 5% by weight is provided between the plasma SiN film and the reflow film or between the reflow film and the SiO ₂ film in addition to the silicate glass film as the reflow film, for example, the AsSG film. % Or more, preferably 9 to 12% by weight, is to provide a PSG film (phosphorus silicate glass film) not intended for reflow.

For example, instead of the AsSG reflow film 6 having the configuration shown in FIG.
Structure using SbSG (antimony silicate glass) reflow film, that is, plasma SiN-PSG-AbSG-Si
In the semiconductor device according to a second embodiment of the present invention using O ₂ -Si substrate, a layered structure of a graph representing the Si-SiO ₂ interface charge density Qss when varying the P concentration of the hydrogen diffusion preventing layer 9 Is shown in FIG.

Next, FIG. 4 is a schematic sectional view showing an essential part of a third embodiment of the present invention, in which a high concentration (P concentration) is formed on the SiO ₂ film 12 which is an insulating protective film formed on the Si substrate 11. 5% by weight or more) PSG
The film is directly formed as the hydrogen diffusion preventing layer 13. An AsSG film 14 and a plasma SiN film 15 are formed on the hydrogen diffusion prevention layer 13.
The By forming in this order, from the upper layer in the order, and the plasma _{SiN-AsSG-PSG-SiO 2} -Si substrate, a laminated structure of.

In the third embodiment, heat treatment at about 900 ° C. to 950 ° C. is applied not only to the AsSG film 14 but also to the hydrogen diffusion preventing layer 13. At this time, the AsSG film 14 has a higher fluidity and is reflowed, but the hydrogen diffusion prevention layer 13 is not reflowed at this temperature because it has a low fluidity, so that the breakdown voltage of the step portion is not lowered.
Further, a structure in which the hydrogen diffusion preventing layer 13 is formed on the Poly-Si wiring electrode 16 and the Al wiring electrode 17 is formed on the AsSG film 14,
That is, by adopting a structure in which the hydrogen diffusion preventing layer 13 and the Al electrode 17 are not in contact with each other, adverse effects such as Al corrosion due to P (phosphorus) can be prevented and the P concentration can be increased. Since the other structure of the third embodiment is similar to that of the first embodiment described above,
The description is omitted, not shown.

In such a third embodiment, Si-SiO ₂ interface charge density Qss when varying the P concentration of the hydrogen barrier layer 13 is 5
It becomes like the figure. In FIG. 5, Qss when the P concentration is 7% by weight is about 1 to 2 × 10 ¹¹ cm ^-2 , but as described above, the adverse effects such as Al corrosion can be prevented, so that the P concentration is further increased. It can be increased to significantly reduce Qss.

Next, FIG. 6 shows a fourth embodiment of the present invention, and
The structure in which the SiO ₂ film 18 is disposed between the AsSG film 14 and the plasma SiN film 15 in the example of FIG. Also in the fourth embodiment, like the third embodiment, the Al wiring electrode 17 and the hydrogen diffusion preventing layer 3 can be configured so as not to come into direct contact with each other, and the P concentration of the hydrogen diffusion preventing layer 13 is increased. Let me Qss
Can be significantly reduced.

A low-concentration PSG film may be used as the SiO ₂ film 18 of the fourth embodiment, and by setting the P concentration of the low-concentration PSG film to less than 5% by weight, adverse effects such as corrosion of the Al electrode 17 are prevented. You can prevent it.

Further, the high-concentration PSG film 13 and the AsSG film 14 of the fourth embodiment are
And are integrated, and as in the fifth embodiment shown in FIG.
The SiO ₂ film 19 by introducing P and As may also be formed. It goes without saying that the Qss can be reduced by setting the P concentration of the P and As-introduced SiO ₂ film 19 in the fifth embodiment to 5% by weight or more. Further, according to the fifth embodiment, manufacturing is easier than in the fourth embodiment, and the adverse effects such as corrosion of the Al electrode are less than those in the first and second embodiments. Have.

The present invention is not limited to the above-mentioned examples, and for example, a high-concentration PSG film or a low-concentration silicate glass film (AsSG film, SbSG film, PSG film) can be formed in multiple layers. Good. Further, not only the MOS type FET element but also a semiconductor device using a bipolar transistor can be applied.

Further, the silicon nitride film containing [H] (hydrogen) may be formed not only by plasma CVD but also by photo CVD, sputtering or the like.

〔The invention's effect〕

According to the semiconductor device of the present invention, by providing a high-concentration PSG film as the interlayer film having a P concentration of 5% by weight or more, it is possible to suppress an increase in the interfacial charge density Qss, and to prevent the deterioration of the insulation characteristics of the element isolation region. The adverse effect can be effectively prevented.

In addition, silicates such as AsSG and SbSG that do not contain P (phosphorus)
Since the glass film is used as the reflow film and the PSG (phosphorus silicate glass) film does not have to have the reflow function, not only the reflow process can be performed at a relatively low temperature, but also the reflow film such as AsSG. Can suppress adverse effects due to corrosion and migration of Al when an Al (aluminum) electrode or the like is formed, and enhance the reliability of wiring.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view showing the main part of the first embodiment of the present invention, and FIG. 2 is a graph showing the relationship between the P concentration of the hydrogen diffusion preventing layer of the first embodiment and the interface charge density Qss. FIG. 3 is a graph showing the relationship between the P concentration of the hydrogen diffusion preventing layer of the second embodiment of the present invention and the interface charge density Qss, and FIG. 4 shows the essential parts of the third embodiment of the present invention. FIG. 5 is a schematic cross-sectional view, FIG. 5 is a graph showing the relationship between the P concentration of the hydrogen diffusion preventing layer and the interface charge density Qss of the third embodiment, and FIG. 6 is the main part of the fourth embodiment of the present invention. FIG. 7 is a schematic sectional view showing an essential part of a fifth embodiment of the present invention, and FIG. 8 is a schematic sectional view showing a conventional example. 1,11 …… Si substrate 3,12 …… SiO ₂ insulation protection film 6,14 …… AsSG film 9,13 …… Hydrogen diffusion prevention layer 10,15 …… Plasma SiN film

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Kazuyoshi Kobayashi 6-735 Kita-Shinagawa, Shinagawa-ku, Tokyo Sony Corporation (72) Hisaharu Kiyota 6-35 Kita-Shinagawa, Shinagawa-ku, Tokyo No. Sony Corporation (56) Reference JP-A-57-139930 (JP, A) JP-A-57-85246 (JP, A) JP-A-53-117972 (JP, A) JP-A-54-65479 (JP, A) JP-A-55-134938 (JP, A)

Claims (2)

[Claims] 1. A reflow film made of silicate glass containing arsenic or antimony and reflowed by heat treatment at low temperature on a semiconductor substrate having a silicon oxide film formed on the surface thereof, and a silicate containing 5 to 12% by weight of phosphorus. A hydrogen diffusion prevention layer made of glass and formed without reflowing by heat treatment is sequentially formed, and a silicon nitride film containing a large amount of hydrogen formed by plasma CVD is further formed on the hydrogen diffusion prevention layer. A semiconductor device formed as a film. 2. A hydrogen diffusion preventive formed on a semiconductor substrate having a silicon oxide film formed on the surface thereof, which is made of a silicate glass containing 5 to 12% by weight of phosphorus and which has not been subjected to reflow by heat treatment after the film formation. Layer and a reflow film made of silicate glass containing arsenic or antimony and reflowed by heat treatment at a low temperature are sequentially formed, and a silicon nitride film containing a large amount of hydrogen formed by plasma CVD is further formed thereon. A semiconductor device formed as a film.