JPH07131145A - Soldering method for electronic component - Google Patents

Soldering method for electronic component

Info

Publication number
JPH07131145A
JPH07131145A JP5278260A JP27826093A JPH07131145A JP H07131145 A JPH07131145 A JP H07131145A JP 5278260 A JP5278260 A JP 5278260A JP 27826093 A JP27826093 A JP 27826093A JP H07131145 A JPH07131145 A JP H07131145A
Authority
JP
Japan
Prior art keywords
solder
solder bumps
temperature
substrate
electronic component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5278260A
Other languages
Japanese (ja)
Inventor
Seiji Sakami
省二 酒見
Tadahiko Sakai
忠彦 境
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP5278260A priority Critical patent/JPH07131145A/en
Publication of JPH07131145A publication Critical patent/JPH07131145A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83192Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/303Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components

Abstract

PURPOSE:To suppress the damage in solder bumps by a method wherein a substrate loaded with an electronic component is heated at the temperature exceeding the setting point of a thermo-setting resin and then cooled down at the temperature not exceeding the melting point of solder for the reinforcement of solder bumps. CONSTITUTION:The periphery of a circuit pattern 2 is coated with a mixture 10 of a thermosetting resin and a solder activator. Next, an electronic component 3 is shifted on a substrate 1 so as to position solder bumps 4 on the circuit pattern 2. Next, the substrate 1 is put in a reflowing device to be heated. When the solder reaches the melted down temperature, the solder bumps 4 are melted down in liquid state to be junctioned with the circuit pattern 2 leaving the mixture 10 in the pasty state intact. Next, when the temperature reaches the setting point of thermosetting resin, the mixture 10 is set leaving the solder bumps 4 in the liquid state intact to be firmly reinforced. Finally, after reaching the maximum temperature, the substrate 1 is cooled down leaving the solder bumps 4 in solid state to be cooled down at the ordinary temperature later.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、半田バンプを備えた電
子部品の半田付け方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for soldering an electronic component having a solder bump.

【0002】[0002]

【従来の技術】近年フリップキャップやボールグリッド
アレイなど、電子部品の電極として複数の半田バンプが
形成され、これらの半田バンプを基板の回路パターンに
接合する電子部品が増えてきている。図2は、このよう
な電子部品を基板に接合した部分を示す拡大図である。
図2中、1はガラスエポキシなどからなる基板、2は基
板1に形成された銅はくなどの回路パターン、3は電子
部品、4は電子部品3の電極として電子部品3の裏面に
設けられた半田バンプである。
2. Description of the Related Art In recent years, a plurality of solder bumps have been formed as electrodes of electronic parts such as flip caps and ball grid arrays, and the number of electronic parts for joining these solder bumps to a circuit pattern of a substrate has been increasing. FIG. 2 is an enlarged view showing a portion where such an electronic component is joined to a substrate.
In FIG. 2, 1 is a substrate made of glass epoxy or the like, 2 is a circuit pattern such as copper foil formed on the substrate 1, 3 is an electronic component, 4 is an electrode of the electronic component 3, and is provided on the back surface of the electronic component 3. It is a solder bump.

【0003】ところで一般に、基板1と電子部品3は、
熱膨張係数が大きく相違する。したがって、半田バンプ
4が回路パターン2に接合された状態において熱が加わ
ると、電子部品3と基板1はそれぞれ大きく異なる伸縮
率で伸縮する。また電子部品3は半田バンプ4のみで基
板1に接合され、半田バンプ4は基板1及び電子部品3
の双方に連結されているので、半田バンプ4に大きな応
力が作用し、図2に示すように半田バンプ4にクラック
5が入り、電子部品3の動作の信頼性が低下することが
ある。したがって、半田バンプ4のみに応力が集中しな
いようにするため、半田バンプ4の周囲に樹脂などから
なる補強剤を充填し、半田バンプ4を封止することが望
ましい。
Generally, the substrate 1 and the electronic component 3 are
The coefficient of thermal expansion differs greatly. Therefore, when heat is applied while the solder bumps 4 are bonded to the circuit pattern 2, the electronic component 3 and the substrate 1 expand and contract at greatly different expansion and contraction rates. Further, the electronic component 3 is bonded to the substrate 1 only with the solder bumps 4, and the solder bumps 4 are attached to the substrate 1 and the electronic components 3
Since a large stress acts on the solder bumps 4, the solder bumps 4 are cracked 5 as shown in FIG. 2, and the reliability of the operation of the electronic component 3 may be deteriorated. Therefore, in order to prevent stress from concentrating only on the solder bumps 4, it is desirable to fill the periphery of the solder bumps 4 with a reinforcing agent such as a resin and seal the solder bumps 4.

【0004】[0004]

【発明が解決しようとする課題】図3は、半田バンプ4
の周囲を樹脂6により封止し半田バンプ4を補強するた
めの従来の半田付け方法を示す工程説明図である。まず
図3(a)に示すように、回路パターン2の周囲にフラ
ックス7を塗布する。次に同図(b)に示すように、電
子部品3の表面を吸着ノズル8などで吸着し、半田バン
プ4が回路パターン2上に載るように、電子部品3を基
板1に移載する。そして、基板1を例えばリフロー装置
内へ送り、半田の溶融温度以上に加熱し、半田バンプ4
を溶融させ、次いで冷却することにより、半田バンプ4
と回路パターン2を接合する。なお図3(c)の9はリ
フロー装置に設けられたヒータである。次に、図3
(d)に示すように、洗浄剤を用いてフラックス7を洗
浄し除去する。しかしながらフラックス7は、小さくか
つ多数の半田バンプ4に取囲まれているため、完全に除
去することが難しく、一部残留することが多い。次に図
3(e)に示すように、補強剤としての樹脂6を半田バ
ンプ4の周囲に流し込み、固化させるものであるが、半
田バンプ4は互いに接近して多数存在するため、樹脂6
が半田バンプ4に阻まれて中央付近の半田バンプ4まで
到達しないことが多い。このように従来の電子部品の半
田付け方法では、半田バンプを十分に補強できないとい
う問題点があった。
FIG. 3 shows a solder bump 4
FIG. 7 is a process explanatory view showing a conventional soldering method for reinforcing the solder bumps 4 by sealing the periphery of the with a resin 6. First, as shown in FIG. 3A, the flux 7 is applied around the circuit pattern 2. Next, as shown in FIG. 1B, the surface of the electronic component 3 is sucked by the suction nozzle 8 or the like, and the electronic component 3 is transferred onto the substrate 1 so that the solder bumps 4 are placed on the circuit pattern 2. Then, the substrate 1 is fed into, for example, a reflow apparatus and heated to a temperature equal to or higher than the melting temperature of the solder, and the solder bump 4
By melting and then cooling the solder bumps 4
And the circuit pattern 2 are joined. In addition, 9 of FIG.3 (c) is the heater provided in the reflow apparatus. Next, FIG.
As shown in (d), the flux 7 is cleaned and removed using a cleaning agent. However, since the flux 7 is small and surrounded by a large number of solder bumps 4, it is difficult to completely remove it, and it often remains partially. Next, as shown in FIG. 3E, a resin 6 as a reinforcing agent is poured around the solder bumps 4 to be solidified. However, since the solder bumps 4 are close to each other, a large number of the resin 6
Is often blocked by the solder bumps 4 and does not reach the solder bumps 4 near the center. As described above, the conventional soldering method for electronic components has a problem that the solder bumps cannot be sufficiently reinforced.

【0005】そこで本発明は、半田バンプを十分に補強
して、半田バンプの損傷を抑制できる電子部品の半田付
け方法を提供することを目的とする。
Therefore, an object of the present invention is to provide a soldering method for an electronic component, which is capable of sufficiently reinforcing the solder bumps and suppressing damage to the solder bumps.

【0006】[0006]

【課題を解決するための手段】本発明は、半田の溶融温
度よりも高い硬化温度を有する熱硬化性樹脂と半田活性
剤との混合物を、基板に形成された回路パターンに塗布
する工程と、回路パターン上に半田バンプが位置するよ
うに、基板に電子部品を搭載する工程と、電子部品が搭
載された基板を熱硬化性樹脂の硬化温度以上に加熱し、
次いで半田の溶融温度以下まで冷却する工程とを有す
る。
The present invention comprises a step of applying a mixture of a thermosetting resin having a curing temperature higher than the melting temperature of solder and a solder activator to a circuit pattern formed on a substrate, A step of mounting electronic components on the substrate so that the solder bumps are located on the circuit pattern, and heating the substrate on which the electronic components are mounted to a temperature higher than the curing temperature of the thermosetting resin,
Then, there is a step of cooling to below the melting temperature of the solder.

【0007】[0007]

【作用】上記構成により、未だ回路パターンに半田バン
プが載っていない状態で、回路パターンに熱硬化性樹脂
と半田活性剤が塗布される。即ち、熱硬化性樹脂を塗る
際に、半田バンプが邪魔をすることはなく、均一に塗布
できる。次に、電子部品が搭載され、加熱される。ここ
で、熱硬化性樹脂の硬化温度は半田の溶融温度(通常1
83℃)よりも高いので、この溶融温度以上硬化温度未
満の状態において、熱硬化性樹脂が硬化する前に、半田
バンプは半田活性剤で活性化され溶融し、液状となって
半田バンプと回路パターンが接合される。さらに、温度
が硬化温度以上まで上昇すると、液状の半田バンプの周
囲の熱硬化性樹脂が硬化して固体状となり、半田バンプ
は硬化した熱硬化性樹脂により補強される。次に半田の
溶融温度以下まで冷却して半田バンプを固化させる。
With the above structure, the thermosetting resin and the solder activator are applied to the circuit pattern in the state where the solder bump is not yet placed on the circuit pattern. That is, when the thermosetting resin is applied, the solder bumps do not interfere with the application and can be applied uniformly. Next, electronic components are mounted and heated. Here, the curing temperature of the thermosetting resin is the melting temperature of the solder (usually 1
83 ° C.), the solder bumps are activated and melted by the solder activator before the thermosetting resin is hardened in the state of the melting temperature or higher and lower than the hardening temperature to become liquid, and thus the solder bumps and the circuit. The patterns are joined. Further, when the temperature rises to the curing temperature or higher, the thermosetting resin around the liquid solder bump is cured and becomes solid, and the solder bump is reinforced by the cured thermosetting resin. Next, the solder bumps are solidified by cooling to below the melting temperature of the solder.

【0008】[0008]

【実施例】次に図面を参照しながら、本発明の一実施例
を説明する。図1は、本発明の一実施例の電子部品の半
田付け方法を示す工程説明図であり、従来手段を示す図
3の構成要素と同様の構成要素については、同一符号を
付すことにより説明を省略する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of the present invention will now be described with reference to the drawings. FIG. 1 is a process explanatory diagram showing a method for soldering an electronic component according to an embodiment of the present invention. The same components as those shown in FIG. Omit it.

【0009】図1中、10は熱硬化性樹脂と半田活性剤
(0.1〜20重量%、好ましくは5重量%以下)の混
合物であり、常温でペースト状をなす。熱硬化性樹脂
は、半田の溶融温度(183℃)よりも高い硬化温度を
有するものを用いる。例えば、ビスフェノールA型エポ
キシ樹脂であって、イソフタル酸ヒドラジド(硬化温度
210℃)を含有するものや、同エポキシ樹脂であっ
て、2.4−ジアミノ−6−〔2−ウンデシルイミダゾ
リル−(1)〕−エチル−S−トリアジン(硬化温度1
85℃)などが好適である。
In FIG. 1, 10 is a mixture of a thermosetting resin and a solder activator (0.1 to 20% by weight, preferably 5% by weight or less), which is in a paste form at room temperature. As the thermosetting resin, one having a curing temperature higher than the melting temperature (183 ° C.) of solder is used. For example, a bisphenol A type epoxy resin containing isophthalic acid hydrazide (curing temperature of 210 ° C.) and the same epoxy resin containing 2.4-diamino-6- [2-undecylimidazolyl- (1 )]-Ethyl-S-triazine (curing temperature 1
85 ° C.) is suitable.

【0010】また、半田活性剤としては、乳酸、クエン
酸、オレイン酸、ステアリン酸、グルタミン酸、安息香
酸、シュウ酸、アビエチン酸の一種又は二種以上の有機
酸が好適である。そして、上記熱硬化性樹脂と半田活性
剤とを混合した混合物10を作成しておく。
As the solder activator, one or more organic acids selected from lactic acid, citric acid, oleic acid, stearic acid, glutamic acid, benzoic acid, oxalic acid and abietic acid are preferable. Then, a mixture 10 is prepared by mixing the thermosetting resin and the solder activator.

【0011】そして図1(a)に示すように、上記混合
物10を回路パターン2の周囲に塗布する。このとき回
路パターン2は外部に露呈しているので、簡単にかつま
んべんなく上記混合物10を塗布できる。次に図1
(b)に示すように、回路パターン2上に半田バンプ4
が位置するように、基板1に電子部品3を移載する。
Then, as shown in FIG. 1A, the mixture 10 is applied around the circuit pattern 2. At this time, since the circuit pattern 2 is exposed to the outside, the mixture 10 can be applied easily and evenly. Next in FIG.
As shown in (b), solder bumps 4 are formed on the circuit pattern 2.
The electronic component 3 is transferred onto the substrate 1 so that

【0012】次に図1(c)に示すように、基板1をリ
フロー装置に入れ、加熱する。リフロー装置における最
高温度は約230〜240℃程度である。したがって、
(常温)<(半田の溶融温度)<(硬化温度)<(最高
温度)なる関係がある。したがって、温度が溶融温度に
達すると、半田バンプ4は溶融し液状となり、半田バン
プ4は回路パターン2に接合されるが、混合物10はペ
ースト状のままである。次に硬化温度に達すると、半田
バンプ4は液状であり回路パターン2に接合した状態
で、半田バンプ4の周囲に存在する混合物10が硬化し
半田バンプ4は強固に補強される。そして、最高温度ま
で温度が上昇した後基板1が冷却され、半田バンプ4が
固体状となり、その後常温まで冷やされる。これによ
り、リフロー装置内を基板1を通過させるのみの処理に
より、半田バンプ4と回路パターン2の接合と、補強剤
としての混合物10の硬化とが完了する(図1
(d))。
Next, as shown in FIG. 1C, the substrate 1 is put into a reflow apparatus and heated. The maximum temperature in the reflow device is about 230 to 240 ° C. Therefore,
There is a relation of (normal temperature) <(melting temperature of solder) <(curing temperature) <(maximum temperature). Therefore, when the temperature reaches the melting temperature, the solder bumps 4 melt and become liquid, and the solder bumps 4 are bonded to the circuit pattern 2, but the mixture 10 remains in a paste form. Next, when the curing temperature is reached, the mixture 10 existing around the solder bump 4 is cured and the solder bump 4 is strongly reinforced while the solder bump 4 is in a liquid state and bonded to the circuit pattern 2. Then, after the temperature rises to the maximum temperature, the substrate 1 is cooled, the solder bumps 4 are solidified, and then cooled to room temperature. As a result, the bonding of the solder bumps 4 and the circuit pattern 2 and the curing of the mixture 10 as a reinforcing agent are completed by the process of simply passing the substrate 1 through the reflow apparatus (FIG. 1).
(D)).

【0013】ここで、図1を図3と比較すると明らかな
ように、本実施例では、図3(d)に示されるフラック
スを除去する工程、図3(e)に示される樹脂6の注入
工程及び図3(e)の次工程としての樹脂6の硬化処理
工程に相当する工程が不要であって、工数を大幅に削除
することができる。
Here, as is apparent from comparison of FIG. 1 with FIG. 3, in this embodiment, the step of removing the flux shown in FIG. 3D, the injection of the resin 6 shown in FIG. The process and the process corresponding to the curing process of the resin 6 as the next process of FIG. 3E are not necessary, and the number of steps can be significantly reduced.

【0014】[0014]

【発明の効果】本発明の電子部品の半田付け方法は、半
田の溶融温度よりも高い硬化温度を有する熱硬化性樹脂
と半田活性剤との混合物を、基板に形成された回路パタ
ーンに塗布する工程と、回路パターン上に半田バンプが
位置するように、基板に電子部品を搭載する工程と、電
子部品が搭載された基板を熱硬化性樹脂の硬化温度以上
に加熱し、次いで半田の溶融温度以下まで冷却する工程
とを有するので、半田バンプに邪魔されることなく、半
田バンプの補強剤としての熱硬化性樹脂を、半田バンプ
の周囲に十分に充填することができ、半田バンプの損傷
を有効に防止できる。
According to the method for soldering an electronic component of the present invention, a mixture of a thermosetting resin having a curing temperature higher than the melting temperature of solder and a solder activator is applied to a circuit pattern formed on a substrate. Process, the process of mounting electronic components on the board so that the solder bumps are located on the circuit pattern, the substrate on which the electronic components are mounted is heated above the curing temperature of the thermosetting resin, and then the melting temperature of the solder Since it has a step of cooling to the following, the thermosetting resin as a reinforcing agent for the solder bumps can be sufficiently filled around the solder bumps without being hindered by the solder bumps, and damage to the solder bumps can be prevented. It can be effectively prevented.

【図面の簡単な説明】[Brief description of drawings]

【図1】(a)は本発明の実施例における電子部品の半
田付け方法を示す工程説明図 (b)は本発明の実施例における電子部品の半田付け方
法を示す工程説明図 (c)は本発明の実施例における電子部品の半田付け方
法を示す工程説明図 (d)は本発明の実施例における電子部品の半田付け方
法を示す工程説明図
FIG. 1A is a process explanatory diagram showing a soldering method of an electronic component according to an embodiment of the present invention. FIG. 1B is a process explanatory diagram showing a soldering method of an electronic component according to an embodiment of the present invention. Process explanatory drawing which shows the soldering method of the electronic component in the Example of this invention. (D) is a process explanatory drawing which shows the soldering method of the electronic component in the Example of this invention.

【図2】従来の半田バンプ付近の拡大図[Fig. 2] Enlarged view of the area around a conventional solder bump

【図3】(a)は従来の電子部品の半田付け方法を示す
工程説明図 (b)は従来の電子部品の半田付け方法を示す工程説明
図 (c)は従来の電子部品の半田付け方法を示す工程説明
図 (d)は従来の電子部品の半田付け方法を示す工程説明
図 (e)は従来の電子部品の半田付け方法を示す工程説明
3A is a process explanatory view showing a conventional electronic component soldering method. FIG. 3B is a process explanatory view showing a conventional electronic component soldering method. FIG. 3C is a conventional electronic component soldering method. (D) is a process explanatory diagram showing a conventional electronic component soldering method. (E) is a process explanatory diagram showing a conventional electronic component soldering method.

【符号の説明】[Explanation of symbols]

1 基板 2 回路パターン 3 電子部品 4 半田バンプ 10 混合物 1 substrate 2 circuit pattern 3 electronic component 4 solder bump 10 mixture

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】半田の溶融温度よりも高い硬化温度を有す
る熱硬化性樹脂と半田活性剤との混合物を、基板に形成
された回路パターンに塗布する工程と、 前記回路パターン上に半田バンプが位置するように、前
記基板に電子部品を搭載する工程と、 電子部品が搭載された前記基板を熱硬化性樹脂の硬化温
度以上に加熱し、次いで半田の溶融温度以下まで冷却す
る工程とを有することを特徴とする電子部品の半田付け
方法。
1. A step of applying a mixture of a thermosetting resin having a curing temperature higher than a melting temperature of solder and a solder activator to a circuit pattern formed on a substrate, and solder bumps on the circuit pattern. So as to be positioned, a step of mounting electronic components on the substrate, and a step of heating the substrate on which the electronic components are mounted to a temperature equal to or higher than the curing temperature of the thermosetting resin, and then cooling to a temperature equal to or lower than the melting temperature of the solder. A method for soldering an electronic component, comprising:
JP5278260A 1993-11-08 1993-11-08 Soldering method for electronic component Pending JPH07131145A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5278260A JPH07131145A (en) 1993-11-08 1993-11-08 Soldering method for electronic component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5278260A JPH07131145A (en) 1993-11-08 1993-11-08 Soldering method for electronic component

Publications (1)

Publication Number Publication Date
JPH07131145A true JPH07131145A (en) 1995-05-19

Family

ID=17594866

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5278260A Pending JPH07131145A (en) 1993-11-08 1993-11-08 Soldering method for electronic component

Country Status (1)

Country Link
JP (1) JPH07131145A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010258173A (en) * 2009-04-24 2010-11-11 Panasonic Corp Mounting method and mounting structure for semiconductor package component
US9331047B2 (en) 2009-04-24 2016-05-03 Panasonic Intellectual Property Management Co., Ltd. Mounting method and mounting structure for semiconductor package component

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010258173A (en) * 2009-04-24 2010-11-11 Panasonic Corp Mounting method and mounting structure for semiconductor package component
US9331047B2 (en) 2009-04-24 2016-05-03 Panasonic Intellectual Property Management Co., Ltd. Mounting method and mounting structure for semiconductor package component

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