JPH07114106B2 - Method for manufacturing electron-emitting device - Google Patents

Method for manufacturing electron-emitting device

Info

Publication number
JPH07114106B2
JPH07114106B2 JP10248888A JP10248888A JPH07114106B2 JP H07114106 B2 JPH07114106 B2 JP H07114106B2 JP 10248888 A JP10248888 A JP 10248888A JP 10248888 A JP10248888 A JP 10248888A JP H07114106 B2 JPH07114106 B2 JP H07114106B2
Authority
JP
Japan
Prior art keywords
electrode
electron
emitting device
forming layer
fine particles
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP10248888A
Other languages
Japanese (ja)
Other versions
JPH01276529A (en
Inventor
哲也 金子
一郎 野村
嘉和 坂野
俊彦 武田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP10248888A priority Critical patent/JPH07114106B2/en
Priority to DE3853744T priority patent/DE3853744T2/en
Priority to US07/218,203 priority patent/US5066883A/en
Priority to EP88111232A priority patent/EP0299461B1/en
Publication of JPH01276529A publication Critical patent/JPH01276529A/en
Priority to US08/366,430 priority patent/US5532544A/en
Priority to US08/479,000 priority patent/US5759080A/en
Priority to US08/487,559 priority patent/US5872541A/en
Priority to US08/474,324 priority patent/US5749763A/en
Publication of JPH07114106B2 publication Critical patent/JPH07114106B2/en
Priority to US08/657,385 priority patent/US5661362A/en
Priority to US09/384,326 priority patent/USRE40566E1/en
Priority to US09/570,375 priority patent/USRE39633E1/en
Priority to US09/587,249 priority patent/USRE40062E1/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2201/00Electrodes common to discharge tubes
    • H01J2201/30Cold cathodes
    • H01J2201/316Cold cathodes having an electric field parallel to the surface thereof, e.g. thin film cathodes
    • H01J2201/3165Surface conduction emission type cathodes

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は電子放出素子の製造方法に関するものである。The present invention relates to a method for manufacturing an electron-emitting device.

[従来の技術] 従来、簡単な構造で電子の放出が得られる素子として、
例えば、エム アイ エリンソン(M.I.Elinson)等に
よって発表された冷陰極素子が知られている。[ラジオ
エンジニアリング エレクトロン フィジィッス(Ra
dio Eng.Electron.Phys.)第10巻,1290〜1296頁、1965
年] これは、基板上に形成された小面積の薄膜に、膜面に平
行に電流を流すことにより、電子放出が生ずる現象を利
用するもので、一般には表面伝導形放出素子と呼ばれて
いる。
[Prior Art] Conventionally, as an element that can emit electrons with a simple structure,
For example, a cold cathode device announced by MI Elinson is known. [Radio Engineering Electron Physics (Ra
dio Eng. Electron. Phys.) Volume 10, pp. 1290-1296, 1965
This makes use of the phenomenon in which electron emission occurs when a current flows through a small-area thin film formed on a substrate in parallel to the film surface, and is generally called a surface conduction electron-emitting device. There is.

この表面伝導形放出素子としては、前記エリンソン等に
より開発されたSnO2(Sb)薄膜を用いたもの、Au薄膜に
よるもの[ジー・ディトマー“スイン ソリド フィル
ムス”(G.Dittmer:“Thin Solid Films"),9巻,317
頁,(1972年]、ITO薄膜によるもの[エム ハートウ
ェル アンド シー ジー フォンスタッド“アイ イ
ー イー イー トランス”イー ディー コンファレ
ンス(M.Hartwell and C.G.Fonstad:“IEEE Trans.ED C
onf.")519頁,(1975年)]、カーボン薄膜によるもの
[荒木久他:“真空",第26巻,第1号,22頁,(1983
年)]などが報告されている。
As the surface conduction electron-emitting device, one using a SnO 2 (Sb) thin film developed by Elinson et al., One using an Au thin film [G.Dittmer: “Thin Solid Films "), Volume 9, 317
Page, (1972), by ITO thin film [M. Hartwell and CGFonstad: “IEEE Trans.ED C”
onf. ") 519, (1975)], by carbon thin film [Hiraki Araki et al.," Vacuum ", Vol. 26, No. 1, p. 22, (1983).
Years)] etc. have been reported.

これらの表面伝導形放出素子の典型的な素子構成を第5
図に示す。同図において、13および14は電気的接続を得
る為の電極、15は電子放出材料で形成される薄膜、16は
基板、17は電子放出部を示す。
The typical device configuration of these surface conduction electron-emitting devices is described in Section 5.
Shown in the figure. In the figure, 13 and 14 are electrodes for obtaining electrical connection, 15 is a thin film formed of an electron emitting material, 16 is a substrate, and 17 is an electron emitting portion.

従来、これらの表面伝導形放出素子に於ては、電子放出
を行う前にあらかじめフォーミングと呼ばれる通電処理
によって電子放出部を形成する。即ち、前記電極13と電
極14の間に電圧を印加する事により、薄膜15に通電し、
これにより発生するジュール熱で薄膜15を局所的に破
壊、変形もしくは変質せしめ、電気的に高抵抗な状態に
した電子放出部17を形成することにより電子放出機能を
得ている。
Conventionally, in these surface conduction electron-emitting devices, an electron-emitting portion is formed in advance by an energization process called forming before electron emission. That is, by applying a voltage between the electrode 13 and the electrode 14, to energize the thin film 15,
The Joule heat generated thereby locally destroys, deforms or modifies the thin film 15 to form an electron emitting portion 17 in an electrically high resistance state, thereby obtaining an electron emitting function.

[発明が解決しようとしている課題] しかしながら、上記の様な従来の通電処理によるフォー
ミングには下記の様な問題があった。
[Problems to be Solved by the Invention] However, the conventional forming by the above-described energization treatment has the following problems.

通電の際、基板と薄膜の熱膨張係数の違いから、薄
膜が剥離する場合がある。このため、加熱温度の上限
や、基板材料、薄膜材料の選択の組み合わせに制限があ
る。
During energization, the thin film may peel due to the difference in thermal expansion coefficient between the substrate and the thin film. Therefore, there is a limit on the upper limit of the heating temperature and the combination of selection of the substrate material and the thin film material.

通電の際、基板も局所的に加熱されるため、致命的
な割れを生ずる場合がある。
Since the substrate is also locally heated during energization, a fatal crack may occur.

通電による膜の変化、例えば、局所的な破壊、変形
もしくは変質等の程度が同一基板内に形成される複数の
素子間にばらつきがちで、また、変化の生じる場所も一
定しない傾向がある。
The degree of change in the film due to energization, for example, the degree of local breakage, deformation or alteration, tends to vary among a plurality of elements formed in the same substrate, and the place where the change occurs tends to be inconsistent.

このため、電子放出素子として機能させた時、電流量や
効率、電子の放出場所、放出される電子ビームの形状な
どが素子毎にばらついていた。
For this reason, when the device is made to function as an electron-emitting device, the amount of current and efficiency, the electron emission location, the shape of the emitted electron beam, and the like vary from device to device.

フォーミングが完了するまでには、比較的大電力を
必要とする。このため、同一基板上に多数の素子を形成
し、同時にフォーミングを行なう場合、大容量の電源を
必要とする。
A relatively large amount of electric power is required until the forming is completed. Therefore, when a large number of elements are formed on the same substrate and forming is performed simultaneously, a large capacity power supply is required.

通電から冷却に至るまでの従来のフォーミング工程
は、比較的長い時間を必要とする。このため、多数の素
子をフォーミングするためには多大の時間を必要とす
る。
The conventional forming process from energization to cooling requires a relatively long time. Therefore, it takes a lot of time to form many elements.

以上のような問題点があるため、表面伝導形電子放出素
子は、素子構造が簡単であるという利点があるにもかか
わらず、産業上積極的に応用されるには至っていなかっ
た。
Due to the above-mentioned problems, the surface conduction electron-emitting device has not been positively applied industrially even though it has an advantage that the device structure is simple.

本発明は、上記の様な従来例の欠点を除去するためにな
されたものであり、前記の如き従来のフォーミングと呼
ばれる処理を施すことなく、フォーミング処理により得
られる電子放出素子と同等以上の品質を有し、特性のバ
ラツキの少ない新規な構造を有する電子放出素子を提供
することを目的とするものである。
The present invention has been made in order to eliminate the drawbacks of the conventional example as described above, and the quality equal to or higher than that of the electron-emitting device obtained by the forming process without performing the process called the conventional forming as described above. It is an object of the present invention to provide an electron-emitting device having a novel structure having the above-mentioned characteristics and less variation in characteristics.

[課題を解決するための手段] 本発明に係わる電子放出素子から電子が放出されるメカ
ニズムについては、従来例のフォーミングによる電子放
出素子とほぼ似ていると考えられる。即ち、従来のフォ
ーミングによる素子では、フォーミングによって膜の一
部が高抵抗化し、この部分では膜内に1μ以下の狭い亀
裂ができ、更に、亀裂の間に小さな島状構造を有する膜
となっている。フォーミングによる素子では、この亀裂
の形状、巾、及び島の形、大きさがフォーミングの条件
を一定にしても複雑に変化し、一定にすることは極めて
困難であった。
[Means for Solving the Problem] It is considered that the mechanism of electron emission from the electron-emitting device according to the present invention is substantially similar to that of the conventional electron-emitting device by forming. That is, in the conventional element formed by forming, a part of the film has a high resistance due to forming, and a narrow crack of 1 μm or less is formed in this part, and a film having a small island structure is formed between the cracks. There is. In the element formed by forming, the shape, width, and shape and size of the cracks change intricately even if the forming conditions are made constant, and it is extremely difficult to make them constant.

本発明は、第1にフォーミングという手段によらないで
上記、亀裂の形状、及び巾を一定に制御して、且つ容易
に製造する手段を提供し、特性のそろった電子放出素子
を提供するものである。
The present invention firstly provides a means for easily manufacturing by controlling the shape and width of the crack to be constant without resorting to forming means, and to provide an electron-emitting device having uniform characteristics. Is.

第2に、上記亀裂の中の島状構造に相当するものの構造
及び大きさを一定にする手段を提供し、且つ、それによ
って特性のそろった電子放出素子を提供するものであ
る。
Secondly, it provides a means for making the structure and size of the island-like structure in the crack constant, and thereby provides an electron-emitting device having uniform characteristics.

即ち、本発明は、基板上の一部に、導電性の微粒子を分
散した絶縁体からなる段差形成層を形成する工程と、 該段差形成層の側面の少なくとも一部において相対向す
る第1の電極と第2の電極を、夫々該基板上と該段差形
成層上に形成する工程と、 を有することを特徴とする電子放出素子の製造方法に関
する。
That is, according to the present invention, a step of forming a step forming layer made of an insulator in which conductive fine particles are dispersed is formed on a part of a substrate, and a first step facing at least a part of a side surface of the step forming layer. And a step of forming an electrode and a second electrode on the substrate and the step forming layer, respectively.

さらに、本発明は、基板上に第1の電極を形成する工程
と、 該第1の電極上に、導電性の微粒子を分散した絶縁体の
層を積層する工程と、 該絶縁体の層上に、電極材の層を積層する工程と、 該絶縁体の層と該電極材の層を夫々パターニングし、該
絶縁体からなる段差形成層を形成すると共に、該段差形
成層上の該電極材からなり、該段差形成層の側面の少な
くとも一部において上記第1の電極と対向する第2の電
極を形成する工程と、 を有することを特徴とする電子放出素子の製造方法に関
する。
Furthermore, the present invention provides a step of forming a first electrode on a substrate, a step of laminating an insulating layer in which conductive fine particles are dispersed on the first electrode, and a step of forming an insulating layer on the insulating layer. A step of laminating a layer of an electrode material, and patterning the layer of the insulator and the layer of the electrode material respectively to form a step forming layer made of the insulator, and the electrode material on the step forming layer. And a step of forming a second electrode facing the first electrode on at least a part of a side surface of the step forming layer, the manufacturing method of the electron-emitting device.

本発明の電子放出素子では、段差形成層の側面で対向す
る第1の電極と第2の電極の間隔部は、従来例のフォー
ミングによる素子における亀裂部に相当し、微粒子は島
に相当する構造となる。また、これら電極間隔の位置、
形状、大きさ及び微粒子の粒径、分散状態等の構造を制
御することができ、さらには材料の選択範囲も大幅に広
げることができる。
In the electron-emitting device of the present invention, the gap between the first electrode and the second electrode facing each other on the side surface of the step forming layer corresponds to a crack in the device formed by the conventional example, and the fine particles correspond to islands. Becomes Also, the position of these electrode intervals,
It is possible to control the shape, size, particle size of fine particles, and structure such as dispersion state, and it is also possible to significantly widen the selection range of materials.

以下本発明を詳細に説明する。The present invention will be described in detail below.

第1図(a),(b),(c)及び第2図は本発明の一
例を示す製造工程断面図及び素子平面図である。同図に
おいて、1および2は電気的接続を得るための電極、3
は基板、4は微粒子、5は微粒子4を分散含有する段差
形成層、6は段差形成層の段差部、7は電極間隔であ
る。
1 (a), (b), (c) and FIG. 2 are a manufacturing process sectional view and an element plan view showing an example of the present invention. In the figure, 1 and 2 are electrodes for obtaining electrical connection, and 3
Is a substrate, 4 is fine particles, 5 is a step forming layer containing fine particles 4 dispersed therein, 6 is a step portion of the step forming layer, and 7 is an electrode interval.

第1図(c)において本発明の電子放出素子は、第1の
電極1と第2の電極2は、導電性微粒子4が分散された
段差形成層5の側面、即ち段差部6において電極間隔7
を有して対向しており、電極1,2間に電圧を印加するこ
とにより、微粒子4より電子を放出するものである。
In FIG. 1 (c), in the electron-emitting device of the present invention, the first electrode 1 and the second electrode 2 have electrode gaps in the side surface of the step forming layer 5 in which the conductive fine particles 4 are dispersed, that is, in the step portion 6. 7
Electrons are emitted from the fine particles 4 by applying a voltage between the electrodes 1 and 2.

次に第1図(a),(b),(c)及び第2図により本
発明の製造方法の一例を述べる。
Next, an example of the manufacturing method of the present invention will be described with reference to FIGS. 1 (a), (b), (c) and FIG.

まず、ガラスやセラミックス等から成る基板3上に微粒
子を含んだ段差形成層5を液体コーティング法等により
堆積させる(第1図(a)参照)。
First, the step forming layer 5 containing fine particles is deposited on the substrate 3 made of glass or ceramics by a liquid coating method or the like (see FIG. 1A).

次にフォトリソエッチング法により段差形成層5を基板
3のほぼ中央部に段差部6を得るように形成する(第1
図(b)参照)。
Next, the step forming layer 5 is formed by the photolithography etching method so as to obtain the step 6 in the substantially central portion of the substrate 3 (first step).
See FIG. (B)).

さらに段差形成層5及び基板3の上へ、段差部6の側壁
の少なくとも一部がかくれない様に、電極1,2を堆積
し、電極間隔7を形成する(第1図(c)参照)。
Further, electrodes 1 and 2 are deposited on the step forming layer 5 and the substrate 3 so that at least a part of the side wall of the step 6 is not exposed, and an electrode interval 7 is formed (see FIG. 1 (c)). .

以上の工程により本発明の電子放出素子を得ることがで
きる。本素子を真空容器中に入れ、電極1,2へ電圧を印
加し、引き出し電極板(図示せず)を素子上面に対向し
て配置させ高電圧をかけることによって電極間隔7の附
近より電子が放出される。
The electron-emitting device of the present invention can be obtained by the above steps. This device is placed in a vacuum container, a voltage is applied to electrodes 1 and 2, and an extraction electrode plate (not shown) is arranged facing the upper surface of the device to apply a high voltage, so that electrons are emitted from near the electrode interval 7. Is released.

以上の工程によると、従来例のフォーミング素子におけ
る亀裂は電極間隔7に相当する。本発明における電極間
隔7は、段差部6の高さ、すなわち段差形成層5の膜厚
に対する、基板3上へ堆積する電極1の膜厚によって制
御される。一般に堆積による膜厚制御は比較的容易であ
り精度も高い。特に真空堆積法においては、数10Åの膜
厚までも堆積膜厚の制御は容易である。
According to the above steps, the crack in the forming element of the conventional example corresponds to the electrode interval 7. The electrode interval 7 in the present invention is controlled by the height of the step portion 6, that is, the film thickness of the electrode 1 deposited on the substrate 3 with respect to the film thickness of the step forming layer 5. Generally, film thickness control by deposition is relatively easy and highly accurate. Especially in the vacuum deposition method, it is easy to control the deposited film thickness up to several 10Å.

従って、電極間隔7は電極1の堆積膜厚を精度良く制御
することによって数10Å程度の間隔寸法を得たり、また
間隔寸法を高精度にすることができる。また電極間隔部
の位置及び形状はフォトリソエッチング法によって得ら
れる段差部6の位置及び形状によって制御できる。
Therefore, as for the electrode interval 7, it is possible to obtain an interval size of about several tens of Å by controlling the deposited film thickness of the electrode 1 with high accuracy and to make the interval size highly accurate. The position and shape of the electrode gap portion can be controlled by the position and shape of the step portion 6 obtained by the photolithographic etching method.

従来例のフォーミング素子における島構造は微粒子4の
構造に相当し、微粒粉や有機金属化合物等を段差形成層
5の形成材となる材料、例えば絶縁膜を得る液体コーテ
ィング剤等に混合、分散させて基板3上にスピンコート
又はディップコート等により塗布し、焼成することによ
って得られる。
The island structure in the forming element of the conventional example corresponds to the structure of the fine particles 4, and fine particle powder, an organometallic compound, or the like is mixed and dispersed in a material that forms the step forming layer 5, such as a liquid coating agent that forms an insulating film. It is obtained by coating the substrate 3 by spin coating, dip coating, or the like and baking.

従って、微粒子4の粒径、分散状態等は、微粒粉の粒径
や有機金属化合物の種類、焼成条件、液体コーティング
剤との混合比や分散条件等によって制御することが可能
である。
Therefore, the particle size, dispersion state, etc. of the fine particles 4 can be controlled by the particle size of the fine particles, the type of the organometallic compound, the firing conditions, the mixing ratio with the liquid coating agent, the dispersion conditions, and the like.

以上の例で示した本発明において電極の材料としては、
従来より表面伝導形電子放出素子として使用されている
広範囲のもの、例えばSnO2,In2O3,PbO等の金属酸化物、
Au,Ag等の金属、カーボンその他各種の半導体など、自
らが電子放出材料として適当なものが使用できる。しか
し本発明では電子放出にかかわる微粒子を別に配置させ
るため、電極材料としては前記以外にむしろ電極として
適当な材料を使用することができる。例えば耐電圧性、
耐熱性、加工性、耐酸化性、寿命、取り出せる電流量、
比抵抗等を考慮して電極材料を選び使用できる。例え
ば、Cu,Al,Ni,Pd,Pt,W,Ta,Mo,Cr,Ti等であるがこの限り
ではない。
In the present invention shown in the above examples, as the material of the electrode,
Widely used as surface conduction electron-emitting devices conventionally, for example, SnO 2 , In 2 O 3 , metal oxides such as PbO,
Metals such as Au and Ag, carbon, and various semiconductors that are suitable as the electron-emitting material can be used by themselves. However, in the present invention, since the fine particles relating to electron emission are separately arranged, a material suitable for the electrode can be used as the electrode material other than the above. For example, withstand voltage,
Heat resistance, workability, oxidation resistance, life, amount of current that can be taken out,
The electrode material can be selected and used in consideration of the specific resistance and the like. For example, Cu, Al, Ni, Pd, Pt, W, Ta, Mo, Cr, Ti and the like, but not limited thereto.

電極膜厚は、通常の表面伝導形電子放出素子に用いられ
る厚さが好ましく、使用される材料の種類により異なる
が、通常0.01〜5μm、好ましくは0.01〜2μm程度で
ある。
The film thickness of the electrode is preferably a thickness used for a normal surface conduction electron-emitting device, and it is usually 0.01 to 5 μm, preferably 0.01 to 2 μm, although it depends on the type of material used.

また、電子放出にかかわる微粒子材料としては、例えば
電子を電界放出し易い物質や、二次電子放出し易い物
質、或いは電子の衝撃によって電子を放出しやすく、且
つ耐熱性、耐腐蝕性に強い物質であれば良く、例えば、
仕事関数が低く、耐熱性の高いW,Ti,Au,Ag,Cu,Cr,Al,P
t,Pd等の金属やSnO2,In2O3等の酸化物、もしくはカーボ
ン或いは以上の混合物等であるが、この限りではない。
微粒子の大きさは通常直径が数十Åから数千Å程度が好
ましい。この大きさは前記方法によって容易に得られる
大きさである。
Further, as the fine particle material involved in electron emission, for example, a substance that easily emits an electric field from an electron, a substance that easily emits a secondary electron, or a substance that easily emits an electron by the impact of an electron and has high heat resistance and corrosion resistance If it is good, for example,
W, Ti, Au, Ag, Cu, Cr, Al, P with low work function and high heat resistance
Metals such as t and Pd, oxides such as SnO 2 and In 2 O 3 , carbon, or a mixture of the above, but not limited thereto.
The size of the fine particles is usually preferably several tens to several thousand Å in diameter. This size is a size easily obtained by the above method.

段差形成層の材料としては、絶縁性材料が用いられる。
例えばSiO2,Si3N4,MgO,TiO2,Ta2O5,Al2O3等あるいはこ
れらの積層物や、混合物でもよいが、材料としてこの限
りではない。
An insulating material is used as the material of the step forming layer.
For example SiO 2, Si 3 N 4, MgO, TiO 2, Ta 2 O 5, Al 2 O 3 or the like or a laminated material or may be a mixture, this does not apply as the material.

段差形成層の膜厚は、堆積する電極の膜厚によって異な
る。しかし単純に電極間隔の大きさが、段差形成層より
堆積電極膜厚を差し引いた値となると考えれば段差形成
層は所望の電極間隔寸法値と、堆積電極膜厚値より算出
される。
The film thickness of the step forming layer differs depending on the film thickness of the deposited electrode. However, if it is considered that the size of the electrode spacing is simply a value obtained by subtracting the deposited electrode film thickness from the step formation layer, the step formation layer is calculated from the desired electrode spacing dimension value and the deposited electrode film thickness value.

電極間隔の大きさとしては、数10Åから数μmで良い。
特に、電極間隔の大きさが狭くなるほど電子放出効率
(電極間に流れる電流に対する放出電子の電流量の比)
は向上する傾向にあった。また、本発明による素子では
微粒子は段差形成材により固定されている。よって電極
からの高電界による電子放出状態においても移動、変形
がおきにくい構成となっているため、安定した電子放出
が得られる。
The size of the electrode interval may be several tens of μm to several μm.
In particular, the smaller the gap between the electrodes, the higher the electron emission efficiency (the ratio of the amount of emitted electrons to the current flowing between the electrodes).
Tended to improve. Further, in the element according to the present invention, the fine particles are fixed by the step forming material. Therefore, even in the electron emission state due to the high electric field from the electrode, the structure is such that the movement and deformation do not easily occur, and stable electron emission can be obtained.

以上の説明から、容易に理解される様に、本発明による
電子放出素子では、まず、従来例の狭い亀裂に相当する
ものが段差部6での電極間隔7であり、電極膜厚によっ
て制御されるため、この電極間隔7は数10Åから数μm
程度まで容易に制御して均一に形成できる。また電極間
隔7部の位置及び形状は、フォトリソエッチング等で得
られる段差部6の位置及び形状で制御できる。さらに、
島状構造に相当するものは微粒子4であり、微粒粉や有
機金属化合物等により作製されるため、大きさや分散状
態等容易に制御することができ均一な構造を作ることが
できる。
As can be easily understood from the above description, in the electron-emitting device according to the present invention, first, what corresponds to the narrow crack of the conventional example is the electrode interval 7 in the step portion 6, which is controlled by the electrode film thickness. Therefore, this electrode interval 7 is from several tens of Å to several μm
It can be easily controlled to a certain degree and formed uniformly. Further, the position and shape of the electrode interval 7 portion can be controlled by the position and shape of the step portion 6 obtained by photolithography or the like. further,
Since the fine particles 4 correspond to the island-like structure and are made of fine particles or an organometallic compound, the size and dispersion state can be easily controlled and a uniform structure can be formed.

尚、本発明に係わる電子放出素子から電子が放出される
メカニズムについては定説はないが、ほぼ以下の如くで
あろうと考えられる。
Incidentally, there is no established theory about the mechanism of electron emission from the electron-emitting device according to the present invention, but it is considered that it is almost as follows.

即ち、狭い絶縁層間に電圧がかかることによる電界放出
や、電極等からの電子が、島状構造の微粒子又は対向電
極によって回折さたり、散乱されたり或いは衝突による
二次電子放出や、熱電子、ホッピング電子、オージェ電
子等による電子放出が考えられる。
That is, field emission due to application of a voltage between narrow insulating layers, electrons from electrodes, etc. are secondary electron emission due to diffraction, scattering, or collision by the island-shaped fine particles or counter electrodes, thermal electrons, Electron emission by hopping electrons, Auger electrons, etc. can be considered.

以上説明した電子放出素子は、従来例の狭い亀裂に相当
する電極間隔7は電極膜厚によって制御されたが、第3
図(c)に示す構造とすれば電極間隔11は、段差形成層
9の膜厚によって制御することができる。
In the electron-emitting device described above, the electrode interval 7 corresponding to the narrow crack in the conventional example is controlled by the electrode film thickness.
With the structure shown in FIG. 6C, the electrode spacing 11 can be controlled by the film thickness of the step forming layer 9.

本方法では、まず基板3上に電極8を堆積、形成し(第
3図(a)参照)、その後、微粒子4を含む段差形成層
9と、電極材12を堆積し(第3図(b)参照)、フォト
リソエッチング法により電極10と電極間隔11を形成し電
子放出素子を形成する(第3図(c)参照)。この方法
によれば、電極間隔11は段差形成層9の膜厚によって制
御できる。段差形成層9は一般に液体コーティング法等
によって得られるが、コーティング方法や、コーティン
グ剤の調製により、数100Åから数μ程度まで制御して
均一に作製することができる。また本方法における各材
料及び大きさは前述に説明したものと同様で良い。
In this method, first, the electrode 8 is deposited and formed on the substrate 3 (see FIG. 3 (a)), and then the step forming layer 9 containing the fine particles 4 and the electrode material 12 are deposited (see FIG. 3 (b)). )), The electrode 10 and the electrode gap 11 are formed by the photolithographic etching method to form an electron-emitting device (see FIG. 3 (c)). According to this method, the electrode interval 11 can be controlled by the film thickness of the step forming layer 9. The step forming layer 9 is generally obtained by a liquid coating method or the like, but can be uniformly manufactured by controlling from several hundred Å to several μ depending on the coating method and the preparation of the coating agent. Further, each material and size in this method may be the same as those described above.

[実施例] 実施例1 前述の第1図(a)〜(c)の製造工程に基づいて、第
2図に示す態様の電子放出素子を得た。
[Example] Example 1 An electron-emitting device having the embodiment shown in Fig. 2 was obtained based on the manufacturing steps shown in Figs. 1 (a) to 1 (c).

即ち、厚み約1mmの清浄な石英ガラス基板上にSiO2液体
コーティング剤(東京応化工業製OCD)に有機パラジウ
ム化合物を含む有機溶媒(奥野製薬工業製キャタペース
トCCP)を混合し、SiO2:Pdのモル比を約10:1に調製した
溶液を作り、スピンナーにより回転塗布した。その後約
400℃で1時間焼成し、膜厚約1500ÅのPd微粒子4を含
んだSiO2段差形成層5を得た(第1図(a)参照)。
That is, a SiO 2 liquid coating agent (OCD manufactured by Tokyo Ohka Kogyo Co., Ltd.) is mixed with an organic solvent containing an organopalladium compound (Catapaste CCP manufactured by Okuno Chemical Industries Co., Ltd.) on a clean quartz glass substrate having a thickness of about 1 mm, and SiO 2 : Pd is added. A solution having a molar ratio of about 10: 1 was prepared and spin-coated with a spinner. Then about
By firing at 400 ° C. for 1 hour, a SiO 2 step forming layer 5 containing Pd particles 4 having a film thickness of about 1500 Å was obtained (see FIG. 1 (a)).

次に、段差形成層5をフォトリソエッチング法によりフ
ッ酸水溶液でエッチングし基板3の中央部に高さ約1500
Åの段差部6を形成した(第1図(b)参照)。
Next, the step forming layer 5 is etched with a hydrofluoric acid aqueous solution by a photolithography etching method, and the height of about 1500
The step portion 6 of Å was formed (see FIG. 1 (b)).

その後、段差部6が完全に覆われない様にして膜厚約50
0ÅのNi電極1,2を第2図に示す形状にマスクEB蒸着によ
り堆積形成した。第2図中l=2mm,W=0.3mmの大きさと
した。この際、電極1,2はある間隔を有し、微粒子4を
含んだ段差形成層5の段差部6の側壁を介して対向した
構造となる。この間隔部を電極間隔7とする(第1図
(c)参照)。
After that, make sure that the step 6 is not completely covered and the film thickness is about 50.
0Å Ni electrodes 1 and 2 were deposited and formed in the shape shown in FIG. 2 by mask EB vapor deposition. In FIG. 2, the size is l = 2 mm and W = 0.3 mm. At this time, the electrodes 1 and 2 have a certain interval and are opposed to each other via the side wall of the step portion 6 of the step forming layer 5 containing the fine particles 4. This space is referred to as an electrode space 7 (see FIG. 1 (c)).

以上の工程で得られた電子放出素子の電子放出特性を測
定した結果、放出電流Ie=2.5μA,出力効率α=5×10
-3程度の電子放出が得られた。
As a result of measuring the electron emission characteristics of the electron-emitting device obtained in the above process, the emission current I e = 2.5 μA and the output efficiency α = 5 × 10 5.
An electron emission of about -3 was obtained.

実施例2 前述の第3図(a)〜(c)の製造工程に基づいて、第
4図に示す様に電極間に段差形成層をはさみ込んだ構成
の電子放出素子を作製した。
Example 2 An electron-emitting device having a structure in which a step forming layer was sandwiched between electrodes as shown in FIG. 4 was produced based on the manufacturing steps of FIGS. 3 (a) to 3 (c) described above.

即ち、厚さ約1mmの清浄な石英ガラス基板上に膜厚約500
ÅのNi電極をEB蒸着法により堆積し、フォトソリエッチ
ング法により第4図に示す形状に形成し電極8とした
(第3図(a)参照)。
That is, the film thickness is about 500 on a clean quartz glass substrate with a thickness of about 1 mm.
A Ni electrode of Å was deposited by the EB vapor deposition method and formed into a shape shown in FIG. 4 by the photo-sori etching method to form the electrode 8 (see FIG. 3 (a)).

次に、電極8、基板3表面上に実施例1と同様の方法に
より、Pd微粒子4を含んだSiO2段差形成層9をEB蒸着に
より膜厚約1000Åとなるよう堆積した。さらにSiO2段差
形成層9上に膜厚約1000ÅのNi薄膜をEB蒸着により堆積
し電極材12とした(第3図(b)参照)。
Next, an SiO 2 step forming layer 9 containing Pd particles 4 was deposited on the surface of the electrode 8 and the substrate 3 by the same method as in Example 1 by EB vapor deposition so as to have a film thickness of about 1000 Å. Further, a Ni thin film having a film thickness of about 1000 Å was deposited on the SiO 2 step forming layer 9 by EB vapor deposition to form an electrode material 12 (see FIG. 3 (b)).

その後、第4図に示す様にNi薄膜上に電極8と基板中心
部で少々重なる電極10の形状のフォトレジストを形成し
た。このフォトレジストの形状で、電極材12、段差形成
層9をエッチングし、その後レジスト剥離を行ない電極
10及び電極間隔11を形成した。各材料の膜厚以外の大き
さは実施例1と同様にした。
Then, as shown in FIG. 4, a photoresist having a shape of an electrode 10 slightly overlapping with the electrode 8 at the center of the substrate was formed on the Ni thin film. The electrode material 12 and the step forming layer 9 are etched in the shape of this photoresist, and then the resist is peeled off to form an electrode.
10 and electrode spacing 11 were formed. The size other than the film thickness of each material was the same as in Example 1.

以上の工程で得られた電子放出素子の電子放出特性を測
定した結果実施例1と同様な電子放出が得られた。
As a result of measuring the electron emission characteristics of the electron-emitting device obtained in the above steps, the same electron emission as in Example 1 was obtained.

また実施例2では、段差形成層9は、電極10と同じフォ
トレジストによってエッチングしたため、同じ形状とな
るが、電極10、段差形成層9を別の形状のフォトレジス
トでエッチング形成することも可能である。但しこの場
合、電極間隔11部を形成する場合に於てやはり実施例2
と同様に、同一レジストにて電極材12と段差形成層9を
同一形状でエッチングした方が好ましい。これは、電極
間隔11部での段差形成層9と電極10の側壁部にレジスト
パターニングのズレによる凹凸部を作らないためであ
る。
Further, in the second embodiment, the step forming layer 9 has the same shape because it is etched by the same photoresist as the electrode 10, but the electrode 10 and the step forming layer 9 can be formed by etching with a photoresist having another shape. is there. However, in this case, when the electrode interval of 11 parts is formed, the second embodiment is also used.
Similarly, it is preferable to etch the electrode material 12 and the step forming layer 9 in the same shape with the same resist. This is because no uneven portion is formed on the side wall portions of the step forming layer 9 and the electrode 10 at the electrode interval 11 by the resist patterning deviation.

以上、実施例1,2では微粒子材として有機金属化合物の
有機溶媒を用いたが、一次粒径が100Å程度のSnO2微粒
子を分散させたSiO2液体コーティング剤でも同様な電子
放出素子を得ることができた。
As described above, in Examples 1 and 2, the organic solvent of the organometallic compound was used as the fine particle material, but a similar electron-emitting device can be obtained even with a SiO 2 liquid coating agent in which SnO 2 fine particles having a primary particle size of about 100Å are dispersed. I was able to.

[発明の効果] 以上説明したように本発明は、導電性の微粒子が分散配
置された段差形成層の側面(即ち段差部)において電極
間隔を有して対向する第1の電極1と第2の電極を配置
し、該電極間に電圧を印加することにより電子を放出す
る電子放出素子であるため従来例の様なフォーミング処
理を施すことなく、電子放出素子を提供することができ
る。
EFFECTS OF THE INVENTION As described above, according to the present invention, the first electrode 1 and the second electrode 1 facing each other with an electrode interval on the side surface (that is, the step portion) of the step forming layer in which the conductive fine particles are dispersed and arranged. Since this is an electron-emitting device that emits electrons by arranging the electrodes and applying a voltage between the electrodes, the electron-emitting device can be provided without performing the forming treatment as in the conventional example.

従って本発明による電子放出素子では、フォーミング処
理に伴う従来の不都合な点は全く無く、特性のバラツキ
の少ない素子を多数個容易に製造でき産業上極めて有用
である。さらに電極間隔を電極膜厚か又は段差形成材膜
厚によって制御するために数100Åから数μm程度の大
きさを容易に制御して作製できるため、電子放出素子の
設計自由度が大幅にひろがった。また電子放出にかかわ
る微粒子と該微粒子へ電圧を印加する電極を別々に構成
するため、各々適切な材料が選択でき電子放出素子の性
能を向上させる上で極めて有用である。
Therefore, the electron-emitting device according to the present invention has no conventional disadvantages associated with the forming process, and can easily manufacture a large number of devices with little variation in characteristics, which is extremely useful in industry. Further, since the electrode spacing can be controlled by the electrode film thickness or the film thickness of the step forming material, the size of several hundred Å to several μm can be easily controlled, so that the degree of freedom in designing the electron-emitting device is greatly expanded. . Further, since the fine particles related to electron emission and the electrode for applying a voltage to the fine particles are separately configured, it is possible to select an appropriate material for each and it is extremely useful in improving the performance of the electron-emitting device.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の第1の実施例を示す製造工程の説明
図、第2図は第1の実施例を示す平面図、第3図は本発
明の第2の実施例を示す製造工程の説明図、第4図は第
2の実施例を示す平面図、第5図は従来の電子放出素子
の平面図である。
1 is an explanatory view of a manufacturing process showing a first embodiment of the present invention, FIG. 2 is a plan view showing a first embodiment, and FIG. 3 is a manufacturing process showing a second embodiment of the present invention. 4 is a plan view showing a second embodiment, and FIG. 5 is a plan view of a conventional electron-emitting device.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】基板上の一部に、導電性の微粒子を分散し
た絶縁体からなる段差形成層を形成する工程と、 該段差形成層の側面の少なくとも一部において相対向す
る第1の電極と第2の電極を、夫々該基板上と該段差形
成層上に形成する工程と、 を有することを特徴とする電子放出素子の製造方法。
1. A step of forming a step forming layer made of an insulating material in which conductive fine particles are dispersed on a part of a substrate, and first electrodes facing each other on at least a part of side surfaces of the step forming layer. And a step of forming a second electrode on the substrate and on the step forming layer, respectively.
【請求項2】基板上に第1の電極を形成する工程と、 該第1の電極上に、導電性の微粒子を分散した絶縁体の
層を積層する工程と、 該絶縁体の層上に、電極材の層を積層する工程と、 該絶縁体の層と該電極材の層を夫々パターニングし、該
絶縁体からなる段差形成層を形成すると共に、該段差形
成層上の該電極材からなり、該段差形成層の側面の少な
くとも一部において上記第1の電極と対向する第2の電
極を形成する工程と、 を有することを特徴とする電子放出素子の製造方法。
2. A step of forming a first electrode on a substrate, a step of laminating an insulating layer in which conductive fine particles are dispersed on the first electrode, and a step of laminating on the insulating layer. A step of laminating a layer of an electrode material, patterning the layer of the insulator and the layer of the electrode material respectively to form a step forming layer made of the insulator, and forming the step forming layer from the electrode material on the step forming layer. And a step of forming a second electrode facing the first electrode on at least a part of a side surface of the step forming layer.
JP10248888A 1987-07-15 1988-04-27 Method for manufacturing electron-emitting device Expired - Fee Related JPH07114106B2 (en)

Priority Applications (12)

Application Number Priority Date Filing Date Title
JP10248888A JPH07114106B2 (en) 1988-04-27 1988-04-27 Method for manufacturing electron-emitting device
DE3853744T DE3853744T2 (en) 1987-07-15 1988-07-13 Electron emitting device.
US07/218,203 US5066883A (en) 1987-07-15 1988-07-13 Electron-emitting device with electron-emitting region insulated from electrodes
EP88111232A EP0299461B1 (en) 1987-07-15 1988-07-13 Electron-emitting device
US08/366,430 US5532544A (en) 1987-07-15 1994-12-30 Electron-emitting device with electron-emitting region insulated from electrodes
US08/474,324 US5749763A (en) 1987-07-15 1995-06-07 Display device with electron-emitting device with electron-emitting region insulted from electrodes
US08/487,559 US5872541A (en) 1987-07-15 1995-06-07 Method for displaying images with electron emitting device
US08/479,000 US5759080A (en) 1987-07-15 1995-06-07 Display device with electron-emitting device with electron-emitting region insulated form electrodes
US08/657,385 US5661362A (en) 1987-07-15 1996-06-03 Flat panel display including electron emitting device
US09/384,326 USRE40566E1 (en) 1987-07-15 1999-08-26 Flat panel display including electron emitting device
US09/570,375 USRE39633E1 (en) 1987-07-15 2000-05-12 Display device with electron-emitting device with electron-emitting region insulated from electrodes
US09/587,249 USRE40062E1 (en) 1987-07-15 2000-06-02 Display device with electron-emitting device with electron-emitting region insulated from electrodes

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10248888A JPH07114106B2 (en) 1988-04-27 1988-04-27 Method for manufacturing electron-emitting device

Publications (2)

Publication Number Publication Date
JPH01276529A JPH01276529A (en) 1989-11-07
JPH07114106B2 true JPH07114106B2 (en) 1995-12-06

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ID=14328819

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JP10248888A Expired - Fee Related JPH07114106B2 (en) 1987-07-15 1988-04-27 Method for manufacturing electron-emitting device

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Country Link
JP (1) JPH07114106B2 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0703594B1 (en) * 1994-09-22 2001-02-21 Canon Kabushiki Kaisha Electron-emitting device and method of manufacturing the same

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* Cited by examiner, † Cited by third party
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