JPH07112069B2 - Display device - Google Patents
Display deviceInfo
- Publication number
- JPH07112069B2 JPH07112069B2 JP60204405A JP20440585A JPH07112069B2 JP H07112069 B2 JPH07112069 B2 JP H07112069B2 JP 60204405 A JP60204405 A JP 60204405A JP 20440585 A JP20440585 A JP 20440585A JP H07112069 B2 JPH07112069 B2 JP H07112069B2
- Authority
- JP
- Japan
- Prior art keywords
- display device
- thin film
- wirings
- liquid crystal
- wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136204—Arrangements to prevent high voltage or static electricity failures
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Nonlinear Science (AREA)
- Liquid Crystal (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Optics & Photonics (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Description
【発明の詳細な説明】 〔発明の技術分野〕 本発明は単純型あるいはアクティブ型のマトリックス表
示装置に関する。Description: TECHNICAL FIELD OF THE INVENTION The present invention relates to a simple or active matrix display device.
第３図（ａ），（ｂ）、第４図（ａ），（ｂ）は従来の
液晶表示装置の構成とその問題点を示す結線図および断
面図である。3 (a), (b), and FIGS. 4 (a), (b) are a wiring diagram and a cross-sectional view showing the configuration of the conventional liquid crystal display device and its problems.
第３図（ａ），（ｂ）は単純（ドッド）マトリックス型
液晶表示装置である。一方の基板にはアドレス配線（2,
21，22，23…）を他方の基板にはデータ配線（5,51，52
…）をそれぞれ透明導電体からなる配線パターンを形成
し、この２枚の基板を配線パターンが互いに対向するよ
うに所定のすき間を持って保持しこのすき間に液晶（1
0）を注入する。FIGS. 3A and 3B show a simple (dot) matrix type liquid crystal display device. Address wiring (2,
2 1 , 2 2 , 2 3 …) to the other board and data wiring (5, 5 1 , 5 2
...) are formed into wiring patterns made of transparent conductors, respectively, and the two substrates are held with a predetermined gap so that the wiring patterns face each other, and the liquid crystal (1
0) is injected.
この液晶（10）の電気信号印加で効率の良い光シャッタ
作用を高めるためにはこれらの配線パターン上に液晶の
配向膜（９）を形成し回転ラビング法等を用いて配向処
理を施こすことが必要である。In order to enhance an efficient optical shutter action by applying an electric signal of the liquid crystal (10), an alignment film (9) of liquid crystal is formed on these wiring patterns and an alignment treatment is performed by using a rotary rubbing method or the like. is necessary.
しかしながらこの配向処理工程に於いて、例えばアドレ
ス配線（2,21，22，23…）相互には極くわずかなキャパ
シタ成分（Cl）が存在するため何らかの電位差を持って
いる。また配向処理用の回転ドラム（12）は所定の電位
を持っており、基板に接する際に配線間に蓄えられた電
荷の急激な移動が起り配線が焼切れる問題があった。However, in this alignment treatment step, for example, there is a very small capacitor component (Cl) between the address wirings (2, 2 1 , 2 2 , 2 3, ...) And there is some potential difference. Further, the rotating drum (12) for orientation treatment has a predetermined electric potential, and when it comes into contact with the substrate, there is a problem in that the electric charge stored between the wirings abruptly moves and the wirings are burnt out.
また従来第４図（ａ），（ｂ）に示すようなアクティブ
・マトリックス型の液晶表示装置にも同様の欠陥が発生
していた。すなわち、この基板構造では同一基板上にア
ドレス配線（2,21，22，23…）と絶縁膜（３）を介して
交差するデータ配線（5,51，52…）が具備されている。
アドレス配線（2,21，22，23…）とデータ配線（5,51，
52…）の各交点には薄膜トランジスタ（８）が設けられ
ており、アドレス配線（2,21，22，23…）の信号走査で
薄膜トランジスタ（８）がONのときデータ配線（5,51，
52…）の画像情報がソース電極（51）から半導体薄膜パ
ターン（４）のチャンネルを通ってドレイン電極（52）
および画素電極（６）に送られる。そうして各薄膜トラ
ンジスタ（８）がOFFのときこの画素電極（６）と対向
電極（11）との間の液晶（10）に電荷が保持されスタテ
ィック表示が出来るのでアクティブマトリックス型の液
晶表示装置では対向基板は単なる透明導電膜からなるコ
モン電極だけでよくパターンを必要としない。Further, similar defects have occurred in the conventional active matrix type liquid crystal display device as shown in FIGS. 4 (a) and 4 (b). In other words, in this substrate structure, the address wirings (2, 2 1 , 2 2 , 2 3 ...) and the data wirings (5, 5 1 , 5 2 ...) intersecting with the insulating film (3) are provided on the same substrate. Has been done.
Address wiring (2,2 1 , 2 2 , 2 3 …) and data wiring (5,5 1 ,
A thin film transistor (8) is provided at each intersection of (5 2 ...), and when the thin film transistor (8) is ON by signal scanning of the address wiring (2, 2 1 , 2 2 , 2 3 ...), the data wiring (5 , 5 1 ,
5 2 ...) image information passes from the source electrode (51) through the channel of the semiconductor thin film pattern (4) to the drain electrode (52).
And to the pixel electrode (6). Then, when each thin film transistor (8) is turned off, the liquid crystal (10) between the pixel electrode (6) and the counter electrode (11) retains electric charges to enable static display. Therefore, in the active matrix type liquid crystal display device. The counter substrate is merely a common electrode made of a transparent conductive film and does not require a pattern.
しかしながらゲート電極（21）と半導体薄膜パターン
（４）およびソース電極（51）若しくはドレイン電極
（52）との間のゲート絶縁膜（３）はキャパシタ成分C
GS，CGDをもっているために、TFTアレイを形成した後に
液晶の配向処理を施こすと回転ラビング法等で発生する
静電気によってゲート絶縁膜（３）が破壊されやすく製
造歩留りが極めて悪った。However, the gate insulating film (3) between the gate electrode (21) and the semiconductor thin film pattern (4) and the source electrode (51) or the drain electrode (52) is a capacitor component C.
Since it has GS and C GD , if the alignment process of the liquid crystal is performed after the TFT array is formed, the gate insulating film (3) is easily destroyed by the static electricity generated by the rotating rubbing method and the manufacturing yield is extremely poor.
本発明は上述した従来の問題点を解決し、マトリックス
型液晶表示装置の製造工程や完成後に於ける取扱いの際
に発生する静電気に対し表示装置の欠陥を未然に防ぐこ
とのできる液晶表示装置を提供するものである。The present invention solves the above-mentioned conventional problems and provides a liquid crystal display device capable of preventing a defect of the display device against static electricity generated during the manufacturing process of the matrix type liquid crystal display device and the handling after completion. It is provided.
［発明の概要］ 本発明は、複数本のアドレス配線と、液晶もしくは絶縁
膜を介して前記アドレス配線と直交する複数本のデータ
配線により、マトリックス構成される表示装置におい
て、前記アドレス配線とデータ配線に接触して形成され
た半導体薄膜或いは金属薄膜の高抵抗接続体を有するこ
とを特徴とする表示装置を提供するものである。[Summary of the Invention] The present invention provides a display device in which a matrix is composed of a plurality of address wirings and a plurality of data wirings which are orthogonal to the address wirings via a liquid crystal or an insulating film. The present invention provides a display device having a high resistance connection body of a semiconductor thin film or a metal thin film formed in contact with the.
［発明の効果］ このように本発明ではマトリックス配線相互を接続する
高抵抗接続体を具備することにより、表示駆動の為の信
号走査時間よりも長い時間をかけた状態ではマトリック
ス配線相互の電気量の平衡が行なわれ、従って製造工程
中に於ける静電気発生でマトリックス配線の欠陥を発生
させないばかりでなく表示装置として完成した後の取扱
い上の静電気や表示装置の始動時に於ける電源投入のス
パイク発生に対しても欠陥となることを防止することが
でき、従って使用時において確実な動作の可能な表示装
置を提供することができる。[Effects of the Invention] As described above, according to the present invention, by providing the high resistance connection body for connecting the matrix wirings, the amount of electricity between the matrix wirings is increased in a state where a time longer than the signal scanning time for driving the display is taken. Therefore, not only the matrix wiring defects are not generated by the static electricity generated during the manufacturing process, but also the static electricity in handling after the display device is completed and the spike when the power is turned on at the time of starting the display device. Also, it is possible to prevent the occurrence of defects, and thus it is possible to provide a display device capable of reliable operation during use.
また、トランジスタを使用した保護回路に比べて構造を
シンプルにした表示装置を提供でき製造上の歩留り向上
に適した表示装置を提供することができる。Further, it is possible to provide a display device having a simpler structure than a protection circuit using a transistor, and to provide a display device suitable for improving the manufacturing yield.
さらに、線形素子を使用しており微弱な電流を流すこと
で配線間に高電圧が長時間印加されにくく、表示素子用
のトランジスタの閾値を変動させる心配がない高い信頼
性を持った表示装置を提供することができる。Furthermore, since a linear element is used and a weak current is made to flow, a high voltage is unlikely to be applied between wirings for a long time, and there is no need to worry about changing the threshold value of the transistor for the display element. Can be provided.
［発明の実施例］ 以下第１図の平面図および第２図の断面図を併用して本
発明の一実施例について説明する。[Embodiment of the Invention] An embodiment of the present invention will be described below with reference to the plan view of FIG. 1 and the sectional view of FIG.
先ず厚さ約1mmのガラス板からなる透明な絶縁基板
（１）上に例えばMo等の金属を真空蒸着法やスパッタ法
により約1000Å付着し、ホトレジストによってパターン
化してアドレス配線（２）およびゲート電極（21）を形
成する。次に例えばSiO2等の絶縁膜（３）をスパッタ法
やCVD法により約2000Åの膜厚でその表面を覆う。さら
にこのあと例えばプラズマ，光，マイクロ波，熱等によ
るCVD法により約2000Åのａ−Si（アモルファスシリコ
ン）と例えばフォスフィンをドープしたn+ａ−Siを約50
0Å連続付着し、絶縁膜（３）を介したゲート電極（2
1）上のチャンネル領域となる半導体薄膜パターン
（４）および基板周辺の部分上に高抵抗接続体（７）を
形成する。このあと例えば約1000ÅのITO等の透明導電
膜からなる画素電極（６）を形成し、次いで約500ÅのM
oと約１μｍのアルミニウムを連続的に付着しホトレジ
ストを用いてデータ配線（５），ソース電極（51），ド
レイン電極（52）およびアドレス配線（２）の周辺配線
パッド（22）を形成する。そしてソース電極（51）とド
レイン電極（52）の間の半導体薄膜パターン（４）上の
n+ａ−Siだけを除去してTFTのチャンネル領域を作れば
アクティブマトリックス型の表示基板が完成する。この
あとこの基板表面に配向膜例えば約1000Åのポリイミド
膜を形成しラビング法により処理を施こす。このラビン
ク処理に際し高抵抗接続体（７）から電極（70）を取り
出し、この電極（70）を接地しておくことで静電気によ
るゲート絶縁膜（３）やアドレス配線（２）およびデー
タ配線（５）の破壊が確実に防止できた。First, a transparent insulating substrate (1) made of a glass plate having a thickness of about 1 mm is coated with a metal such as Mo by a vacuum evaporation method or a sputtering method by about 1000Å and patterned by a photoresist to form an address wiring (2) and a gate electrode. Form (21). Next, the surface of the insulating film (3) such as SiO 2 is covered with a film thickness of about 2000 Å by a sputtering method or a CVD method. Further, after this, for example, about 2000Å a-Si (amorphous silicon) and, for example, about 50 phosphine-doped n + a-Si are formed by a CVD method using plasma, light, microwave, heat, or the like.
0Å Continuous adhesion and gate electrode (2
1) A high resistance connector (7) is formed on the semiconductor thin film pattern (4) which will be the upper channel region and on the peripheral portion of the substrate. After this, for example, a pixel electrode (6) made of a transparent conductive film such as ITO of about 1000 Å is formed, and then M of about 500 Å is formed.
O and aluminum having a thickness of about 1 μm are continuously adhered to form peripheral wiring pads (22) of the data wiring (5), the source electrode (51), the drain electrode (52) and the address wiring (2) by using a photoresist. Then, on the semiconductor thin film pattern (4) between the source electrode (51) and the drain electrode (52)
An active matrix type display substrate is completed by removing only n + a-Si to form a TFT channel region. After that, an alignment film, for example, a polyimide film having a thickness of about 1000 liters is formed on the surface of the substrate and treated by a rubbing method. In this Rabink process, the electrode (70) is taken out from the high resistance connection body (7) and the electrode (70) is grounded, whereby the gate insulating film (3), the address wiring (2) and the data wiring (5) due to static electricity. ) Could be reliably prevented.
尚、本発明の実施例では製造上簡略化する為に半導体薄
膜パターン（４）と同じ工程で作り上げているが、構造
上この位置にある必要はなく、任意な工程で作り上げる
ことができる。In the embodiment of the present invention, the semiconductor thin film pattern (4) is manufactured in the same process for simplification in manufacturing, but it is not necessary to be located at this position in the structure, and it can be manufactured in any process.
また、本発明の実施例では基板周辺の端子配設領域に高
抵抗体を設けているが結線上さしつかえない限り表示部
内に設けてもよい。更に、この高抵抗体の材料は半導体
薄膜に限らず金属のように比較的導電性の良い材料を使
う場合にあっては高抵抗となるように薄くしたりパター
ンを細くして得ることもできる。要するに本発明で定義
する高抵抗体とはマトリックス配線の端子に加える入力
信号が隣り合った端子からの信号量に影響されない値と
すればよい。Further, in the embodiment of the present invention, the high resistance body is provided in the terminal disposition region around the substrate, but it may be provided in the display section unless there is a problem in connection. Further, the material of the high resistance element is not limited to the semiconductor thin film, and when a material having relatively good conductivity such as metal is used, it can be obtained by thinning or thinning the pattern so as to have high resistance. . In short, the high resistance defined in the present invention may be a value that the input signal applied to the terminals of the matrix wiring is not affected by the signal amount from the adjacent terminals.
第１図，第２図は本発明による液晶表示装置の一実施例
を示す部分平面図および断面図、第３図は本発明の他の
実施例を示す図、第４図は従来の液晶表示装置を示す図
である。 １……絶縁性基板 2,21，22…2n……アドレス配線 21……ゲート電極 22……アドレス配線パッド ３……ゲート絶縁膜 ４……半導体薄膜パターン ５……データ配線 51……ソース電極 52……ドレイン電極 53……データ配線パッド ６……画素電極 ７……高抵抗接続体 70……高抵抗接続体の電極 ８……薄膜トランジスタ ９……配向膜 10……液晶 11……コモン電極 12……回転ラビング用ドラム CS,Cl,CGS，CGD……キャパシタ1 and 2 are partial plan views and sectional views showing an embodiment of the liquid crystal display device according to the present invention, FIG. 3 is a view showing another embodiment of the present invention, and FIG. 4 is a conventional liquid crystal display. It is a figure which shows an apparatus. 1 ... Insulating substrate 2, 2 1 , 2 2 ... 2 n ... Address wiring 21 ... Gate electrode 22 ... Address wiring pad 3 ... Gate insulating film 4 ... Semiconductor thin film pattern 5 ... Data wiring 51 ... Source electrode 52 ... Drain electrode 53 ... Data wiring pad 6 ... Pixel electrode 7 ... High resistance connection body 70 ... High resistance connection electrode 8 ... Thin film transistor 9 ... Alignment film 10 ... Liquid crystal 11 ... … Common electrode 12 …… Rotary rubbing drum C S , Cl, C GS , C GD …… Capacitor
Claims (3)
縁膜を介して前記アドレス配線と直交する複数本のデー
タ配線によりマトリックス構成される表示装置におい
て、 前記アドレス配線とデータ配線に接触して形成された半
導体薄膜或いは金属薄膜の高抵抗接続体を有することを
特徴とする表示装置。1. A display device comprising a matrix of a plurality of address wirings and a plurality of data wirings which are orthogonal to the address wirings via a liquid crystal or an insulating film, and is formed in contact with the address wirings and the data wirings. A display device having a high resistance connection body of a semiconductor thin film or a metal thin film.
スシリコン膜であることを特徴とする特許請求の範囲第
１項記載の表示装置。2. The display device according to claim 1, wherein the semiconductor thin film is a phosphorus-doped amorphous silicon film.
とを特徴とする特許請求の範囲第１項記載の表示装置。3. The display device according to claim 1, wherein the metal thin film is selected from Mo, Ta and Al.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60204405A JPH07112069B2 (en) | 1985-09-18 | 1985-09-18 | Display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60204405A JPH07112069B2 (en) | 1985-09-18 | 1985-09-18 | Display device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6265455A JPS6265455A (en) | 1987-03-24 |
| JPH07112069B2 true JPH07112069B2 (en) | 1995-11-29 |
Family
ID=16489998
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60204405A Expired - Lifetime JPH07112069B2 (en) | 1985-09-18 | 1985-09-18 | Display device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH07112069B2 (en) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH079506B2 (en) * | 1986-02-14 | 1995-02-01 | 富士通株式会社 | How to prevent the display device from being damaged by static electricity |
| JP2764139B2 (en) * | 1989-10-20 | 1998-06-11 | ホシデン・フィリップス・ディスプレイ株式会社 | Active matrix liquid crystal display |
| JPH081502B2 (en) * | 1993-06-21 | 1996-01-10 | インターナショナル・ビジネス・マシーンズ・コーポレイション | Liquid crystal display |
| JP2613015B2 (en) * | 1994-02-08 | 1997-05-21 | インターナショナル・ビジネス・マシーンズ・コーポレイション | Liquid crystal display |
| JP3007025B2 (en) * | 1995-08-25 | 2000-02-07 | シャープ株式会社 | Active matrix type liquid crystal display device and manufacturing method thereof |
| KR100362703B1 (en) * | 1999-11-11 | 2002-11-29 | 삼성전자 주식회사 | A METHOD OF FORMING TFTs |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58116573A (en) * | 1981-12-29 | 1983-07-11 | セイコーエプソン株式会社 | Manufacture of matrix display |
| JPS59126663A (en) * | 1983-01-11 | 1984-07-21 | Seiko Epson Corp | Semiconductor device |
| JPH0814667B2 (en) * | 1984-05-28 | 1996-02-14 | セイコーエプソン株式会社 | Method for manufacturing semiconductor device |
| JPS61121080A (en) * | 1984-11-19 | 1986-06-09 | 松下電器産業株式会社 | Manufacture of thin film transistor array |
-
1985
- 1985-09-18 JP JP60204405A patent/JPH07112069B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6265455A (en) | 1987-03-24 |
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