JP3719844B2 - Liquid crystal display element - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention, as a switching element for selectively driving the pixel electrodes, it relates to a TFT (Thin Film Transistor) element or the like is an active matrix type liquid crystal display element used.
[0002]
[Prior art]
Conventionally, in liquid crystal display elements, EL display devices, plasma display devices, etc., display patterns are formed on a screen by selecting display picture elements arranged in a matrix. As the display picture element selection method, individual picture elements are arranged with independent electrodes, a switching element is connected to each picture element electrode, and the picture element electrode is selected by the switching element to perform display driving. There is an active matrix drive system.
According to this active matrix drive system, high contrast display is possible, and it has been put to practical use in liquid crystal televisions, word processors, computer terminal displays, and the like.
[0003]
In recent years, a field effect transistor (FET) using amorphous silicon is generally used as a switching element provided for each pixel of a liquid crystal display device, and is applied between a picture element electrode and a counter electrode facing the pixel electrode. By switching the voltage, the optical modulation of the liquid crystal filled as a display medium in the meantime is visually recognized as a display pattern. Amorphous silicon FET has advantages such as being able to be uniformly formed on a transparent large substrate and having a large on / off current ratio, and is suitable as a switching element of this type of liquid crystal panel.
[0004]
Here, the prior art will be described with reference to the drawings.
5 and 6 are a plan view and a cross-sectional view of a liquid crystal display device manufactured by a conventional method.
First, a gate wiring film is formed on the insulating transparent substrate 1, and the gate electrode 2 , the gate bus line 20 ', and the auxiliary capacitance line 15 are formed by photolithography. Next, gate insulating layers 3 and 4 are formed on the gate electrode 2, followed by the formation of semiconductor layers 5 and contact layers 6 and 7, and patterns other than the gap portions 12 of the contact layers 6 and 7 are formed by photolithography. Pattern. Next, the gap portions 12 of the contacts 6 and 7 are patterned by photolithography. At this time, a manufacturing method in which an etching stopper layer is provided in the gap 12 between the semiconductor layer 5 and the contact layers 6 and 7 to form the gap 12 is also common.
Next, source and drain wirings and pixel electrode films are formed, and the source electrode 8, source bus line 10, drain electrode 11, and pixel electrode 9 are formed by photolithography, and this occurs in the liquid crystal panel state. As countermeasures against defects caused by static electricity, patterning is performed so as to form a so-called short ring structure 14 ' that connects source bus lines at the periphery of the liquid crystal panel. Subsequently, a protective film 13 for protecting layers other than the picture element electrodes 9 is formed and patterned by photolithography.
[0005]
[Problems to be solved by the invention]
However, even in the liquid crystal display element having the short ring structure, the function as a switching element is impaired due to destruction of the TFT portion due to static electricity generated in the liquid crystal panel manufacturing process and the influence of charging in each process. Therefore, the quality of the display device is remarkably impaired, and it is a big problem in terms of product yield.
In addition, electrostatic breakdown is concentrated in a portion of the TFT formed in a matrix shape near the source bus line, that is , the lead line of the signal line, and in particular, a protective film for protecting layers other than the pixel electrode is formed by photolithography. It occurred when patterning by technology.
[0006]
[Means for Solving the Problems]
The present invention, on Kitoi to solve the problem, the scanning line and signal lines arranged in a lattice insulation substrate, electrically connected to the TFT switching elements to the scanning lines and signal lines Oite the liquid crystal display element having the a short ring structure interconnecting all of the scanning lines and all of the signal lines, the display area outside the lead line of the signal lines, intensive electrostatic breakdown A dummy pattern gate electrode; an insulating layer formed on the dummy pattern gate electrode between the dummy pattern gate electrode and the signal line; and a semiconductor layer and a contact layer on the insulating layer. Has a dummy pattern of laminated films laminated in this order, and the dummy pattern is a liquid crystal display element having the same size as the TFT portion of the switching element .
[0007]
Delete [0008]
Delete [0009]
Delete [0010]
Delete [0011]
DETAILED DESCRIPTION OF THE INVENTION
(Example 1)
1 and 2 show an embodiment (Example 1) for explaining a liquid crystal display element of the present invention and a manufacturing method thereof.
A film of Al, Mo, Ta or the like is formed on a glass substrate 1 which is a transparent insulating substrate by sputtering, and then a gate bus line (scanning line) 20 and a gate electrode 20a and an auxiliary capacitance line 21 are formed by photolithography. To do. At this time, the dummy pattern gate electrode 22 is simultaneously formed outside the display area of the leader line of the signal line (source bus line) 25.
Next, the gate bus line 20, the gate electrode 20a and the dummy pattern for the gate electrode 22 surface, covered with a gate material oxide film 3 by using the anodic oxidation method to form a insulation Enmaku 4 further.
[0012]
In order to improve the ohmic contact between the semiconductor layer and the semiconductor layer and the source or drain electrode in succession to the gate insulating film 4, contact layers are laminated by using a plasma CVD method. Here, the semiconductor layer is an intrinsic semiconductor amorphous silicon film (hereinafter abbreviated as a-Si (i) layer), and the contact layer is n ⁺ type microcrystalline silicon (hereinafter a-Si (μc−) to which phosphorus is added. n ⁺ ) layer). At this time, it is also a general structure that an etching stopper layer is provided by patterning between the semiconductor layer and the constant layer.
[0013]
Next, the a-Si (i) layer and the a-Si (μc-n ⁺ ) layer are patterned by photolithography to form a semiconductor layer-contact layer pattern 23. At this time, the TFT gap portion 31 is not patterned. On the dummy pattern gate electrode 22 formed at the same time as the gate bus line 20 is formed, a dummy pattern 24 having the same size as the TFT is formed at the same time as the semiconductor layer-contact layer pattern 23 is formed.
[0014]
Since the respective gate and source bus lines 20 and 25 forming the signal lead-out terminal pad section 29 and 30, is etched into a predetermined pattern anodic oxide film / gate insulating film by photolithography.
As the source conductor, an ITO (Indium Tin Oxide) film that also serves as the pixel electrode 28 and a metal film such as Ti, Al, Cr, and Mo are continuously formed by vapor deposition, sputtering, etc., and patterned by photolithography, A source bus line 25, a source electrode 26, a drain electrode 27, and a pixel electrode 28 are sequentially formed. At this time, patterning is performed so that a part of the leader line of the signal line (source bus line) 25 covers the dummy pattern 24. The source electrode 26 may have a structure of only an ITO film that is a transparent electrode material.
[0015]
The TFT gap part 31 is formed by patterning the a-Si (μc-n ⁺ ) layer of the TFT part by dry etching. At this time, dry etching may be performed using photolithography or using the source electrode 26 and the drain electrode 27 as a mask. However, the dummy pattern 24 is not dry-etched.
Thereafter, a protective film 13 made of SiNx or the like is formed on the TFT gap portion 31.
In the figure, reference numeral 32 denotes a display area of the TFT panel, and reference numeral 33 denotes a non-display area of the TFT panel, which indicates a lead-out portion of the signal line 25 .
[0016]
(Example 2)
3 and 4 show another embodiment (Embodiment 2) for explaining the liquid crystal display element of the present invention and the manufacturing method thereof.
A film of Al, Mo, Ta or the like is formed on the glass substrate 1 which is a transparent insulating substrate by a sputtering method, and then a gate bus line 20 and a gate electrode 20a are formed by photolithography. At this time, a pattern (light-shielding body) 41 for shielding the outside of the display area is simultaneously formed.
[0017]
Next, the surface of the gate bus line 20 and the light shielding pattern 41 is covered with a gate material oxide film 3 by using an anodic oxidation method, and a SiNx film is laminated by a plasma CVD method or the like in order to further improve the insulation property. 4 is formed.
In order to improve the ohmic contact between the semiconductor layer and the semiconductor layer and the source or drain electrode in succession to the gate insulating film 4, contact layers are laminated by using a plasma CVD method. Here, the semiconductor layer is an a-Si (i) layer, and the contact layer is an a-Si (μc-n ⁺ ) layer. In this case, it is also a general structure that an etching stopper layer is provided by patterning between the semiconductor layer and the contact layer.
[0018]
Next, the a-Si (i) layer and the a-Si (μc-n ⁺ ) layer are patterned by photolithography to form a semiconductor layer-contact layer pattern 23. At this time, the TFT gap portion 31 is not patterned. Further, on the light shielding body 41 formed at the same time when the gate bus line 20 is formed, a dummy pattern 42 having substantially the same size as the TFT is formed at the same time when the semiconductor layer-contact layer pattern 23 is formed.
[0019]
Next, in order to form a signal lead-out terminal pad 29, 30 to the respective gate and source bus lines 20 and 25, is etched into a predetermined pattern anodic oxide film / gate insulating film by photolithography.
Next, as a source conductor, an ITO film that will later become a contact electrode and a metal film such as Ti, Al, Cr, and Mo are continuously formed by vapor deposition, sputtering, etc., patterned by photolithography, and source bus line 25 The contact electrode 43 for making contact with the source electrode 26, the drain electrode 27 and the upper pixel electrode 45 is sequentially formed.
[0020]
Next, the TFT gap portion 31 is formed by patterning the a-Si (μc-n ⁺ ) layer of the TFT portion by dry etching. At this time, dry etching may be performed using photolithography or using the source electrode 26 and the drain electrode 27 as a mask. However, the dummy pattern portion 42 is not dry etched.
Thereafter, the insulating resin layer 44 is patterned using photolithography, and an ITO film to be the pixel electrode 45 is formed on the insulating layer 44 by a sputtering method. Thereafter, the upper layer pixel electrode 45 is patterned by photolithography.
In the figure, reference numeral 32 denotes a display area of the TFT panel, and 33 denotes a non-display area of the TFT panel, which indicates a lead-out portion of the signal line (source bus line) 25.
[0021]
【The invention's effect】
Even in the case of a liquid crystal display device having a so-called short ring structure, static electricity and electrostatic breakdown caused by charging in each manufacturing process occur intensively in a dummy pattern outside the display area. Electrostatic breakdown is more reliably suppressed .
Since the dummy pattern has the same film configuration as that of the TFT portion, and is formed at the same time, a high yield and high display quality can be achieved without particularly increasing the number of manufacturing steps for the dummy pattern.
[Brief description of the drawings]
FIG. 1 is a plan view showing an embodiment for explaining a liquid crystal display element of the present invention and a manufacturing method thereof.
FIG. 2 is a cross-sectional view of a dummy pattern taken along the line BB ′ of FIG.
FIG. 3 is a plan view showing another embodiment for explaining the liquid crystal display element of the present invention and the manufacturing method thereof.
4 is a cross-sectional view of a dummy pattern taken along line CC ′ of FIG. 3;
FIG. 5 is a plan view showing a conventional liquid crystal display element.
6 is a cross-sectional view of the switching element taken along line AA ′ in FIG. 5;
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Glass substrate, 2, 20a ... Gate electrode, 3, 4 ... Gate insulating film , 5 ... Semiconductor layer, 6, 7 ... Contact layer, 8, 26 ... Source electrode, 9, 28 ... Pixel electrode, 10, 25 ... Source bus line, 11, 27 ... Drain electrode, 12 ... Gap portion, 13 ... Protective film, 14 , 14 ' ... Short ring structure, 15, 21 ... Auxiliary capacitance line, 20 , 20' ... Gate bus line, 22 ... Gate electrode for dummy pattern, 23 ... Semiconductor layer-contact layer pattern, 24, 42 ... Dummy pattern, 29 ... Signal lead terminal pad part of gate bus line, 30 ... Signal lead terminal pad part of source bus line, 31 ... TFT Gap portion, 32 ... TFT panel display region, 33 ... Signal line lead-out portion, 41 ... Light shielding pattern, 43 ... Contact electrode, 44 ... Insulating resin layer, 45 ... Upper layer picture element electrode.

Claims (1)

In a liquid crystal display element comprising scanning lines and signal lines wired in a grid pattern on an insulating substrate, and TFT switching elements electrically connected to the scanning lines and the signal lines, all the scanning lines and all the lines a short ring structure interconnecting said signal line, the display area outside the lead line of the signal lines, for generating intensive electrostatic breakdown, the gate electrode dummy pattern, a gate electrode for said dummy pattern Between the signal lines, there is an insulating layer formed on the dummy pattern gate electrode, and a dummy pattern of a laminated film in which a semiconductor layer and a contact layer are stacked in this order on the insulating layer. The liquid crystal display element , wherein the pattern has the same size as the TFT portion of the switching element.

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