JPH05142570A - Active matrix substrate - Google Patents

Abstract

PURPOSE:To form the active matrix substrate to a structure which can improve its contrast. CONSTITUTION:The substrate is made into the structure that picture element electrodes 111 and source wirings 108 as signal wirings do not overlap and that the adjacent picture element electrodes 111 and the ends of the metallic films 103 overlap each other. The constitution of the parasitic capacity between the picture element electrodes 111 and the source wirings 108 is made into the series constitution of the capacity by the picture element electrodes 111 and the metallic films 103 and the capacitors by the metallic films 103 and the source wirings 108. The parasitic capacity acting on the picture element electrodes 111 is thus decreased.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix substrate, and more particularly to an active matrix substrate used as a matrix type liquid crystal display device.

[0002]

2. Description of the Related Art Liquid crystal display devices, which have the characteristics of thinness and low power consumption, have been attracting attention as display devices replacing CRTs. Among them, thin film transistors (hereinafter referred to as TFT
The active matrix drive type liquid crystal display device using an array has advantages such as high response speed of liquid crystal and high display quality. In particular, since TFTs using amorphous silicon (abbreviated as a-Si) can be formed at low temperature, it is considered that the display device can have a large screen, high definition, and low cost. Is thriving.

Such a liquid crystal display device is constructed by disposing an active matrix substrate and a counter substrate so as to face each other and enclosing a liquid crystal between the two substrates. FIG. 8 shows an example of a conventional active matrix substrate, and FIG. 9 shows a sectional view taken along the line CC ′ of FIG.

The active matrix substrate of FIG. 8 is manufactured as follows. A metal thin film is formed on the transparent insulating substrate 401, the surface of the metal thin film is covered with a mask made of a photoresist film, and etching is performed to form a gate wiring as a scanning wiring and a gate electrode 402. Next, a SiNx film to be an insulating film 403 is continuously deposited over the entire surface, and then an a-Si layer 404 to be a semiconductor layer,
After the SiNx film to be the insulating film 405 is continuously deposited over the entire surface, the insulating film 40 is formed by photoetching.
5 is patterned as shown. Next, a P-doped a-Si film 406 is deposited over the entire surface, photolithography is performed to remove portions other than both sides of the insulating film 405, and a metal thin film is further deposited, followed by photoetching. Thus, the source wiring as the signal wiring, the source electrode 407, and the drain electrode 408 having the pattern as illustrated are formed. Thereby, the TFT
Is formed. Next, an insulating film is deposited over the entire surface to form an insulating film 409, and a contact hole 410 is formed in the insulating film 409 by photoetching. Finally, a transparent conductive film is deposited on the insulating film 409 so as to fill the contact hole 410 and partially overlap the gate wiring 402, and then photoetching is performed to form the pixel electrode 411.

[0005]

However, in the conventional structure, the pixel electrode 411 and the source wiring 407 partially overlap each other as shown in FIG. 10 (cross-sectional view taken along the line D-D 'in FIG. 8). Parasitic capacitance is generated between the pixel electrode 411 and the source wiring 407, and the potential of the pixel electrode 411 is affected by the signal applied to the source wiring 407 even when the TFT is in the OFF state. There was a problem that it would end up.

Further, in the conventional structure, the gate wiring 402
When 1H inversion driving in which the polarity of the signal to be written to the pixel electrode 411 is inverted every time, as shown in FIG. 8, the end portions of the adjacent pixel electrodes 411 face the same gate wiring 402, and the capacitance is formed at the opposite portion. Occurs, the interaction occurs between the adjacent pixel electrodes 411, and the electric field is disturbed. As a result, the liquid crystal molecules are disturbed, and light leakage occurs when displaying black in the normally white mode, for example, and there is a problem in that the contrast is lowered.

The present invention has been made to solve the above problems of the prior art, and an object of the present invention is to provide an active matrix substrate capable of improving contrast.

[0008]

An active matrix substrate of the present invention is formed with scanning wirings and signal wirings intersecting each other on a substrate, and a switching element and a pixel electrode in a region surrounded by both wirings. Are formed in a matrix,
In an active matrix substrate in which an insulating film is provided between the signal line and the pixel electrode, the signal line faces a portion between adjacent pixel electrodes without overlapping the widthwise end of the signal line with the pixel electrode. And a metal film for parasitic capacitance is provided on the side of the signal wiring opposite to the pixel electrode so as to overlap with at least a part of the signal wiring and through another insulating film between the signal wiring and the signal wiring. Since the metal film overlaps both end portions in the width direction with the end portions of the pixel electrodes on both sides of the portion where the signal wiring opposes, the above object can be achieved.

In the active matrix substrate of the present invention, the scanning wirings and the signal wirings are formed on the substrate so as to intersect with each other, and the switching elements and the pixel electrodes are arranged in a matrix in the region surrounded by both wirings. In the formed active matrix substrate, the scanning wiring is provided so as to face a portion between adjacent pixel electrodes, and two metal films are provided between the scanning wiring and the pixel electrode in the width direction of the scanning wiring. The metal films are arranged in parallel so that the entire metal film faces the pixel electrodes on both sides of the portion facing the scanning wiring, and the end on the portion side between adjacent pixel electrodes facing the scanning wiring is the pixel electrode. Since it is aligned with the end of each of the scanning lines, and each end part with the aligned ends is overlapped with both ends in the width direction of the scanning wiring,
Thereby, the above object can be achieved.

[0010]

According to the present invention, the pixel electrode and the signal line do not overlap each other, and the adjacent pixel electrode and the end portion of the metal film overlap each other. Therefore, the configuration of the parasitic capacitance between the pixel electrode and the signal wiring is a series configuration of the capacitance of the pixel electrode and the metal film and the capacitance of the metal film and the signal wiring, and the parasitic capacitance reaching the pixel electrode is reduced. be able to.

According to the third aspect of the present invention, since the metal film is provided so as to be aligned with the pixel electrode, the metal film conceals the portion causing the light leakage, thus preventing the light leakage. it can.

[0012]

EXAMPLES The present invention will be described in detail below with reference to examples.

FIG. 1 is a partial plan view showing an active matrix substrate of this embodiment, and FIG. 2 is a sectional view showing a TFT portion of the substrate. In this active matrix substrate, a plurality of gate wirings 102 as scanning wirings are formed in parallel in the lateral direction on a glass substrate 101 as an insulating substrate, and the gate wirings 102 intersect with the source wirings 108 as signal wirings. A plurality of them are formed in parallel.

A TFT 112 and a pixel electrode 111 are provided in each area surrounded by the gate wiring 102 and the source wiring 106. The TFT 112 has the same structure as the conventional one. Specifically, a gate electrode 102a integrated with a gate wiring 102 as a scanning wiring is formed in a certain area on a glass substrate 101, and an insulating film 104 is formed on the substrate 101 so as to cover the gate electrode 102a. There is. A semiconductor layer 105 is formed in a certain area on the insulating film 104 above the gate electrode 102a, and an insulating film 106 is formed on the semiconductor layer 105 along the center thereof. The semiconductor layers 107a and 107b are formed on the insulating film 106 by being divided into two.

A source wiring 108 as a signal wiring is formed over one semiconductor layer 107a and over the insulating film 104 on the side opposite to the other semiconductor layer 107b, and one semiconductor layer is formed over the other semiconductor layer 107b. The drain electrode 109 is formed over the insulating film 104 on the side opposite to the layer 107a.
Are formed. As a result, the TFT is formed.

The pixel electrode 111 is formed on the TFT 112 having the above-mentioned structure with the insulating film 110 interposed therebetween. Specifically, the contact hole 110a is formed in the insulating film 110 portion above the drain electrode 109, and the insulating film 11 is filled with the contact hole 110a and partially overlaps with the gate wiring 102.
It is formed on 0.

Further, the pixel electrode 111 has a structure shown in FIG.
(A ′ cross-sectional view), a metal film 1 for parasitic capacitance is provided above the source wiring 108 with an insulating film 110 interposed therebetween, and below the source wiring 108 with an insulating film 104 interposed therebetween.
03 is formed.

The active matrix substrate having the above structure is manufactured as shown in FIG. First, as shown in (a), a 3000 angstrom-thick Ta film is formed on a glass substrate 101, and the Ta film is patterned to form a gate wiring 102, a gate electrode 102a, and a metal film 103. Note that the metal film 103 may be formed at a different time from the gate wiring 102 and the gate electrode 102a.
When they are formed at the same time as in the embodiment, the steps can be omitted.

Next, as shown in (b), a 3000 Å thick SiNx film to be the insulating film 104 is deposited over the entire surface by, for example, sputtering or plasma CVD method, and then the semiconductor layer 105 is formed 30.
An a-Si layer having a thickness of 0 angstrom and a SiNx film having a thickness of 2000 angstrom to be the insulating film 106 are continuously deposited over the entire surface, and then the insulating film 106 is formed into a pattern as shown by photoetching. Before the insulating film 104 is deposited, the gate wiring 1
02 may be anodized to form the insulating film 104,
Alternatively, an insulating film other than SiNx may be used as the insulating film 104.

Next, as shown in (c), a P-doped a-Si film having a thickness of 500 angstrom is deposited over the entire surface by, for example, plasma CVD method, and then photo-etching is performed except for both sides of the insulating film 106. Are removed to form semiconductor layers 107a and 107b, and a Mo layer is deposited to a thickness of 3000 angstroms by sputtering. Then, the Mo layer is photoetched to form the source wiring 108 (see FIG. 1) having a pattern as shown in the drawing, The source electrode 108a and the drain electrode 109 are formed.
The P-doped a-Si film may be formed by an ion doping method. In addition, the source wiring 10
8, the source electrode 108a and the drain electrode 109 are T
Metals such as i and Al may be used.

Next, an organic protective film having a thickness of 1 μm is deposited on the entire surface of the above structure to form an insulating film 108, and a contact layer is formed.
A hole 110a is formed in the insulating film 110 by photoetching, and finally, the contact hole 110a is filled with the film and the ITO film of 1000 angstrom is sputtered on the insulating film 110 while partially overlapping the metal film 103 and the gate wiring 102. Then, the pixel electrode 111 is formed by photoetching.

As the organic protective film, JSS-7215 acrylic resin manufactured by Japan Synthetic Rubber or Hitachi Chemical PIX-8 is used.
A polyimide film such as 803 or a photosensitive polyimide film such as Toray S414 can be used. In addition, the insulating film 110
In addition to the organic film, an inorganic film such as SiNx or SiO ₂ may be used.

In the active matrix substrate of this embodiment manufactured in this way, as shown in FIG. 3, the pixel electrode 111 is provided on the source wiring 108, and the insulating film 110 is provided between them.
A metal film 103 for parasitic capacitance is formed below the source wiring 108 with an insulating film 104 interposed therebetween. In addition, the source wiring 108 does not overlap its width direction end portion with the pixel electrode 111, and the adjacent pixel electrode 1
The metal film 103 is provided so as to oppose the portion between 11 and the metal film 103 overlaps with a part of the source wiring 108, and the metal film 103 opposes the source wiring 108 at both ends in the width direction. The end portions of the pixel electrodes 111 on both sides of the portion are overlapped.

Therefore, the pixel electrode 111 and the source wiring 1
08, the parasitic capacitance between the pixel electrode 111 and the metal film 103, and the metal film 103 and the source wiring 1
It will be a serial configuration with the capacitance of 08. Therefore, it is possible to reduce the parasitic capacitance reaching the pixel electrode 111,
The contrast can be improved. Further, since the pixel electrode 111 and the source wiring 108 do not directly overlap with each other, it is possible to reduce a leak caused by a defect in the insulating film. In addition,
The metal film 103 may be formed over the entire length of the source semiconductor 108.

FIG. 5 is a partial plan view showing another embodiment of the present invention, and FIG. 6 is a sectional view taken along the line BB 'of FIG. This active matrix substrate is constructed in the same manner as in the previous embodiment except that it is a metal film. This example
The gate wiring 102 is provided so as to face a portion between the adjacent pixel electrodes 111, and the gate wiring 102 and the pixel electrode 11 are provided.
Two metal films 103a and 103b are provided in parallel with each other in the width direction of the gate wiring 102.

The active matrix substrate having this structure is manufactured as shown in FIG. First, as shown in (a), a 3000 angstrom thick Ta film is formed on a glass substrate 101 and patterned to form a gate wiring 102 and a gate electrode 102a.

Next, as shown in (b), a 3000 Å thick SiNx film to be the insulating film 104 is deposited over the entire surface by using, for example, sputtering or plasma CVD method, and then the semiconductor layer 105 is formed 30.
An a-Si layer having a thickness of 0 angstrom and a SiNx film having a thickness of 2000 angstrom to be the insulating film 106 are continuously deposited over the entire surface, and then the insulating film 106 is formed into a pattern as shown by photoetching. Before the insulating film 104 is deposited, the gate wiring 1
02 may be anodized to form the insulating film 104,
Alternatively, an insulating film other than SiNx may be used as the insulating film 104.

Next, as shown in (c), a P-doped a-Si film having a thickness of 500 angstroms is deposited over the entire surface by, for example, plasma CVD method, and then photo-etching is performed except for both sides of the insulating film 106. Are removed to form semiconductor layers 107a and 107b, and a Mo layer is deposited to a thickness of 3000 angstroms by sputtering. Then, the Mo layer is photoetched to form the source wiring 108 (see FIG. 1) having a pattern as shown in the drawing, The source electrode 108a and the two metal films 103a and 103b
To form. One metal film 103a also serves as the drain electrode 109 of the previous embodiment. Note that this metal film 103a
May be connected to a drain electrode provided separately. The P-doped a-Si film may be formed by an ion doping method. Further, the source wiring 108, the source electrode 108a, and the drain electrode 109 may be made of metal such as Ti or Al. Further, the two metal films 103a and 103b may be formed in a process different from that of the source wiring 108, but if they are formed simultaneously, the process can be omitted.

Next, an organic protective film having a thickness of 1 μm is deposited on the entire surface of the above structure to form an insulating film 110, and a contact layer is formed.
A hole 110a is formed in the insulating film 110 by photoetching, and finally, the contact hole 110a is filled with the hole 110a and the metal film 103a and 103b and the source wiring 108 are partially overlapped with each other.
After depositing 000 Å of ITO by sputtering, the pixel electrode 111 is formed by photoetching. As the organic protective film, the same material as in the previous example can be used.

In the active matrix substrate of this embodiment manufactured in this way, as shown in FIG.
The gate wiring 102 is provided so as to face a portion between the adjacent pixel electrodes 111, and the gate wiring 102 and the pixel electrode 11 are provided.
Two metal films 103a and 103b are provided in parallel with each other in the width direction of the gate wiring 102. In addition, each metal film 1
03a and 103b are arranged such that the whole thereof faces the pixel electrodes 111 on both sides of the portion facing the gate wiring 102, and the end on the portion side between the adjacent pixel electrodes 111 facing the gate wiring 102. , Pixel electrode 11
The end portions of the gate wiring 102 are aligned with one end, and the end portions with the aligned ends are overlapped with both end portions in the width direction of the gate wiring 102.

Therefore, in the present embodiment, since the metal films 103a and 103b are provided so as to be aligned with the pixel electrode 111, the metal films 103a and 103b conceal the portions where light leakage occurs. That is, it functions as a light-shielding film, so that the occurrence of light leakage can be prevented and the contrast can be improved.

In the above embodiment, the semiconductor layer made of P-doped a-Si is interposed between the semiconductor layer 105 made of a-Si and the source wiring 108 made of Mo and the drain electrode 109 (or the metal film 103a). Since 107a and 107b are provided, there is an advantage that ohmic contact can be established between them.

Needless to say, the present invention is not limited to the active matrix substrate having the above-mentioned structure, but can be applied to other structures.

[0034]

As is apparent from the above description, the active matrix substrate of the present invention can reduce the parasitic capacitance, so that it is possible to improve the contrast and display quality. In addition, since the pixel electrode and the source wiring can be directly overlapped with each other, leakage due to a defect in the insulating film can be reduced. Further, by forming the metal film in parallel with the scanning wiring and overlapping the pixel electrode with the insulating film interposed therebetween, the aperture ratio can be made higher than that of the conventional structure. In addition, since the process does not become complicated,
It is possible to prevent a decrease in yield due to an increase in the number of steps of the liquid crystal display device.

[Brief description of drawings]

FIG. 1 is a partial plan view showing an embodiment of an active matrix substrate of the present invention.

FIG. 2 is a sectional view showing a TFT portion of the active matrix substrate.

FIG. 3 is a sectional view taken along the line AA ′ of FIG.

4 (a) to 4 (d) are partial plan views showing the manufacturing method of the above embodiment.

FIG. 5 is a partial plan view showing another embodiment of the present invention.

6 is a cross-sectional view taken along the line BB ′ of FIG.

7A to 7D are partial plan views showing a manufacturing method of the other embodiment.

FIG. 8 is a partial plan view of an active matrix substrate having a conventional structure.

9 is a cross-sectional view taken along the line CC ′ of FIG.

10 is a cross-sectional view taken along the line DD ′ of FIG.

[Explanation of symbols]

 101 glass substrate 102 gate wiring 102a gate electrode 103 metal film 103a metal film 103b metal film 104 insulating film 106 insulating film 108 source wiring 109 drain electrode 110 insulating film 110a contact hole 111 pixel electrode

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Hiroshi Morimoto 22-22 Nagaike-cho, Abeno-ku, Osaka-shi, Osaka Inside Sharp Corporation

Claims (4)

[Claims] 1. A scanning wiring and a signal wiring are formed to intersect each other on a substrate, and switching elements and pixel electrodes are formed in a matrix in a region surrounded by both wirings.
In an active matrix substrate in which an insulating film is provided between the signal wiring and the pixel electrode, the signal wiring faces a portion between adjacent pixel electrodes without overlapping the width direction end portion of the signal wiring with the pixel electrode. And a metal film for parasitic capacitance is provided on the side of the signal wiring opposite to the pixel electrode so as to overlap with at least a part of the signal wiring and through another insulating film between the signal wiring and the signal wiring. An active matrix substrate in which the metal film overlaps both end portions in the width direction with end portions of pixel electrodes on both sides of the portion facing the signal wiring. 2. The active matrix substrate according to claim 1, wherein the metal film is formed of the same material as the scan wiring when the scan wiring is formed. 3. An active matrix substrate in which scanning wirings and signal wirings are formed so as to intersect with each other on a substrate, and switching elements and pixel electrodes are formed in a matrix in a region surrounded by both wirings. The scanning wiring is provided so as to face a portion between adjacent pixel electrodes, and two metal films are arranged side by side in the width direction of the scanning wiring between the scanning wiring and the pixel electrode. The whole is made to face each of the pixel electrodes on both sides of the portion facing the scanning wiring, and the end on the side of the portion between adjacent pixel electrodes facing the scanning wiring is aligned with the end of the pixel electrode, and An active-matrix substrate in which each end having the aligned ends is overlapped with both ends in the width direction of the scanning wiring. 4. The active matrix substrate according to claim 3, wherein the metal film is formed of the same material as the signal wiring.