JPH07110363A - Semiconductor device - Google Patents

Abstract

PURPOSE:To provide a semiconductor device which can simply conduct electrical connection inspection in a short time. CONSTITUTION:The semiconductor device 20 has wirings 24-29 provided on a TAB (tape automated bonding) boards 22, and a semiconductor chip 23 connected to the wirings 24-29 through a bump 32. A driving circuit 33 and an inspecting circuit 34 are assembled in the chip 23. The circuit 34 has switches 35, 36 connected to a wiring 39 for the circuit 33, a wring 38 and an electrical connection judging circuit 37. The device 20 receives, during the inspection, power, a cut signal (Cut) and a check signal (Check) from an external inspecting unit 21 through a lead 31, it disconnects the wirings in the device 20 from the circuit 33 by the switches 35, 36 connects to the circuit 37 to supply a power source voltage Vcc to the wirings and outputs an inspection result signal (Result) representing the connection state from the circuit 37 to the unit 21.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device in which a circuit element (hereinafter referred to as a chip) is mounted on a circuit board, and the conductive state of the circuit board is simplified. The present invention relates to a semiconductor device for detecting.

[0002]

2. Description of the Related Art Recently, with the progress of semiconductor technology, semiconductor devices have been mounted with chips such as semiconductor memories and drive circuits on a circuit board.

In such a semiconductor device, the wiring on the circuit board can be laminated due to the development of the photoengraving technique, and the circuit board itself uses a flexible substrate such as a resin film or a hard substrate such as ceramic. It has become.

Particularly, as a semiconductor device using such a resin film, for example, TAB (Tape Automated B
onding) method.

In this TAB type semiconductor device, bumps (protruding electrodes) are formed on a chip, inner bonding is performed on the upper surface of a flexible resin film (carrier tape) such as a polyimide film or a polyester film, and then a carrier tape and a wiring board. Is to connect with.

On the other hand, there is a COG method which is not mounted via a resin film like the TAB method, which is a panel made of glass with bumps formed on the surface of a chip using an anisotropic conductive adhesive. It is connected to an electrode such as the above ITO (transparent electrode).

In such a semiconductor device, it is important that the electrical continuity of the wiring on the circuit board and the electrical continuity between the wiring of the circuit board and the chip mounted on the circuit board are properly maintained. Problem.

Therefore, conventionally, in order to inspect the conduction state of the semiconductor device, as shown in FIG. 4, the inspection device 2 is connected to the semiconductor device 1 and the operation test of the semiconductor device 1 is performed to confirm the conduction state. Inspecting. In addition, in FIG.
6 illustrates a state of a conductivity test of a liquid crystal driving semiconductor device 1 formed by the AB method.

That is, the semiconductor device 1 includes the TAB substrate 3
A semiconductor chip 4 is mounted on the TAB substrate 3, and various wirings such as a printed wiring 5 for an input signal, a printed wiring 6 for an output signal, and a printed wiring 7 related to a power source are provided on the TAB substrate 3.

Further, the TAB substrate 3 is provided with a plurality of terminals 8 for connecting these printed wirings 5, 6 and 7 to an external circuit, and when conducting the semiconductor device 1 for conductivity inspection, Lead wires 9 from the inspection apparatus 2 are connected to all the terminals 8.

Then, on one surface of the semiconductor chip 4,
A plurality of bumps 10 are formed, and the bumps 10 and TA
The printed wirings 5, 6, and 7 on the B board 3 are connected by inner bonding. A drive circuit 11 for driving the liquid crystal is incorporated in the semiconductor chip 4.

In order to conduct the conductivity test of the semiconductor device 1 as described above, first, all the terminals 8 of the semiconductor device 1 are connected to the test device 2 and the power supply necessary for the operation of the semiconductor device 1 is supplied from the test device 2. The semiconductor device 1 is operated by supplying all the input signals I1 to In. Then, the inspection device 2 outputs the output signal O1 input via the output terminal 8 of the semiconductor device 1.
To Om are output signals O1 to O during normal operation of the semiconductor device 1.
Conductivity is checked by checking whether or not it matches m.

That is, when conducting the conductivity test, as shown in FIG. 5, the testing device 2 receives the input signals I1 to In for causing the semiconductor device 1 to perform the testing operation.
(Step K1).

On the other hand, the semiconductor device 1 receives the input signals I1 to In from the inspection device 2 (step H).
1), the normal liquid crystal driving operation corresponding to the input signals I1 to In is performed, and the output signals O1 to Om of the operation result are output to the inspection device 2
(Step H2).

When the output signals O1 to Om are input from the semiconductor device 1 (step K2), the inspection device 2 outputs the input output signals O1 to Om as the output signals O1 to Om corresponding to the input signals I1 to In. Whether or not there is a match is checked (step K3), and the conductivity check result is determined based on this check result (step K4).

That is, the inspection device 2 internally stores the data of the inspection input signals I1 to In and the data of the output signals O1 to Om corresponding to the input signals I1 to In during the normal operation of the semiconductor device 1. Therefore, when the output signals O1 to Om input from the semiconductor device 1 match the stored output signals O1 to Om, it is determined that the conductivity is good.

[0017]

However, in such a conventional semiconductor device, all the terminals are connected to the inspection device, and the operation test of the semiconductor device is performed by the inspection device to obtain the substrate of the semiconductor device. Since the continuity between the upper wirings and the continuity between the wirings on the substrate and the chip are inspected, the continuity inspection is complicated and requires more time than necessary. It is necessary to perform a preset operation test on, and to have a memory or the like for storing the circuits and data necessary for determining the conductivity of the semiconductor device from the operation result, and the inspection device is large-scale. There was a problem that it would be expensive.

Therefore, it is an object of the present invention to provide a semiconductor device which can easily and easily inspect the conductivity of the semiconductor device in a short time.

[0019]

The semiconductor device of the present invention comprises:
In a semiconductor device in which at least an input / output terminal and a wiring connected to the input / output terminal are provided on a circuit board and a circuit element is mounted by connecting to the wiring, an operation signal from an external device is supplied to the circuit element. The above object is achieved by incorporating a continuity inspection circuit that outputs an output signal of a different value according to the conduction state of the wiring on the circuit board and the conduction state between the wiring and the circuit element when input. is doing.

In this case, the continuity inspection circuit is, for example,
As described in claim 2, a continuity determination circuit that outputs an output signal having a different value depending on a conduction state of a wiring on the circuit board and a conduction state between the wiring and the circuit element, and an external device. Switching means for switching and connecting the wiring connected to the input / output terminal to the continuity determination circuit when an operation signal is input, and in this case, for example, it is described in claim 3. As described above, when the switching means receives the operation signal, the wiring connected to the input / output terminal is switched and connected to the continuity determination circuit, and a predetermined voltage is applied to each wiring on the circuit board. Then, the conduction determining circuit may compare the voltage of each wiring to which the predetermined voltage is supplied with a predetermined voltage value, and output the output signal based on the comparison result.

[0021]

According to the semiconductor device of the present invention, when an operation signal is input to the circuit element on the circuit board from the external device, the conductive state of the wiring on the circuit board and the connection between the wiring and the circuit element are established. Since a continuity inspection circuit that outputs an output signal having a different value depending on the conduction state is incorporated, the semiconductor device itself inspects these conduction states by inputting a simple operation signal from an external device, Output the result. as a result,
Without conducting a large-scale operation test as in the past, it is possible to perform a conductivity test easily and in a short time, and an external device for conducting a conductivity test is simple, and
It can be cheap.

[0022]

EXAMPLES Examples will be described below with reference to the drawings.

1 to 3 are views showing an embodiment of a semiconductor device of the present invention, and this embodiment is applied to a semiconductor device for driving a liquid crystal formed by a TAB method.

First, the structure will be described.

FIG. 1 is a diagram showing a conduction state when the semiconductor device 20 is inspected for conductivity by the inspection device 21.

In this semiconductor device 20, a semiconductor chip 23 is mounted on a TAB board 22, and on the TAB board 22, a printed wiring 24 for an input signal, a printed wiring 25 for an output signal, and a printed wiring 26 related to a power source. And various wirings such as inspection printed wirings 27, 28, 29 are provided.

Further, the TAB board 22 is provided with a plurality of terminals 30 for connecting the printed wirings 24 to 29 to an external circuit.

When conducting the conductivity test of the semiconductor device 20, only the terminals 30 of the test printed wirings 27, 28, 29 and the power-related printed wiring 26 among these terminals 30 are read as will be described later. Inspection device 21 by line 31
, And all other terminals 30 are commonly connected.

A plurality of bumps (connection members) 32 are formed on one surface of the semiconductor chip 23.
The bumps 32 and each printed wiring 24 on the TAB substrate 22
29 is connected by inner bonding. A drive circuit 33 for driving liquid crystal and an inspection circuit 34 are incorporated in the semiconductor chip 23.

The inspection circuit 34 includes switch circuits 35 and 3
6, a continuity determination circuit 37, various wirings 38, and the like.

The switch circuit 35 has one terminal connected to
The wiring 39 is connected, and the wiring 39 is connected to the printed wiring 24 for input signal and the printed wiring 25 for output signal of the TAB substrate 22 via the bump 32. The drive circuit 33 is connected to the other terminal of the switch circuit 35.
The wiring 40 connected to is connected.

Further, the inspection wiring 41 is connected to the cut input terminal of the switch circuit 35 via the inverter IN1, and the inspection wiring 41 is connected to the inspection printed wiring 28 via the bump 32. ing. The cut input terminal of the switch circuit 35 is the inverter IN1.
And is grounded via a resistor R1.

As will be described later, the switch circuit 35 opens its circuit when a cut signal (Cut) that changes to high and low is input to its cut input terminal and a high cut signal (Cut) is input. Then, the connection between the drive circuit 33 and the wiring 39 is cut off.

The wiring 38 of the inspection circuit 34 is connected to each wiring 39 connected between the switch circuit 35 and the bump 32, and the wiring 38 is connected to one terminal of the switch circuit 36. It is connected. Switch circuit 3
The other terminal of 6 has a power supply voltage V at its uppermost terminal.
cc is connected, and all other remaining terminals on the other side of the switch circuit 36 are connected to the continuity determination circuit 37 by the inspection wiring 42 and are also grounded via the resistors r1 to rn.

A check wiring 43 is connected to the check input terminal of the switch circuit 36 via the inverter IN2, and the test wiring 43 is printed on the TAB substrate 22 via the bumps 32. It is connected to the wiring 27. Further, a predetermined power supply voltage Vcc is applied to the check input terminal of the switch circuit 36 via the inverter IN2 and the resistor R2.

As will be described later, the switch circuit 36 closes its circuit when a check signal (Check) that changes to high and low is input to its check input terminal and a low check signal (Check) is input. Wiring 39
The power supply voltage Vcc is supplied to all the wirings in the semiconductor device 20 because the wiring 38 connected to is connected to the determination circuit 37 and the terminal 30 is commonly connected.

The determination circuit 37 is composed of a plurality of comparison circuits COP1.
To COPn and one AND circuit AND, and the inspection wiring 42 connected to the switch circuit 36 is connected to the plus side input terminals of the comparison circuits COP1 to COPn, respectively. A predetermined voltage VB is input to the negative side input terminals of the comparison circuits COP1 to COPn,
Each of the comparison circuits COP1 to COPn compares the voltage input to its plus side input terminal via the inspection wiring 42 with the predetermined voltage VB input to its minus side input terminal,
When the voltage input to the plus side input terminal is higher than the predetermined voltage VB input to the minus side input terminal, a high output is output to the AND circuit AND.

The predetermined voltage VB is the power supply voltage V
It is supplied from cc and is set to a voltage value smaller than the power supply voltage Vcc.

Each AND circuit AND has a comparator circuit COP.
The outputs of 1 to COPn are input, and the AND circuit AND
When the outputs of all the comparison circuits COP1 to COPn are high, a high inspection result signal (Resul) is output from the output terminals.
t) is output.

The inspection wiring 44 is connected to the output terminal of the AND circuit AND, and the inspection wiring 44 is connected to the inspection printed wiring 29 of the TAB substrate 22 via the bump 32.
It is connected to the.

The inspection device 21 has at least the printed wiring 26 related to the power source among the terminals 30 of the semiconductor device 20.
And 5 terminals 3 for inspection printed wiring 27, 28, 29
0 is provided with a terminal 45 connected to the lead wire 31,
A predetermined voltage Vcc is supplied from the power supply-related terminal 45 and a ground potential is supplied.

Although not shown, the inspection device 21 also generates a cut signal (Cut) and a check signal (Check) that switch between high and low and supplies them to the semiconductor device 20 via the lead wire 31.

Next, the operation of this embodiment will be described.

In order to conduct the continuity test of the semiconductor device 20 of this embodiment, as shown in FIG. 1, the printed wiring 26 related to the power source of the semiconductor device 20 and the printed wirings 27 and 2 for inspection are used.
The inspection device 21 for connecting the terminals 30 of 8 and 29 with the lead wire 31.
Connected to the terminal 45 of the other terminal 30 of the semiconductor device 20,
That is, the terminal for the input signal and the terminal for the output signal are in the common conduction state.

Thus, the semiconductor device 20 and the inspection device 21
In order to connect the probe blocks 50 and 51 to each other, for example, as shown in FIG. 2, the probe blocks 50 and 51 are attached to the portions of the TAB substrate 22 where the terminals 30 are formed.
The pins 50 a and 51 a of No. 1 are connected to the terminal 30.

Each probe block 50, 51 has a
Lead wires 52 and 53 connected to the pins 50a and 51a are connected, and the lead wires 52 and 53 are connected to the inspection device 21.
It is connected to the.

The inspection device 21 is connected to the pins 50a and 51a of the lead wires 52 and 53, which are connected to the terminals 30 of the power-related printed wiring 26 and the inspection printed wirings 27, 28 and 29 of the semiconductor device 20. Lead wires 52, 5
3 is connected to the terminal 45, supplies a predetermined voltage Vcc to the semiconductor device 20 from the terminal 45, and outputs a high cut signal (Cut) and a low check signal (Check).
k) is output. Inside the inspection device 21, wirings other than the printed wiring 26 related to the power source and the inspection printed wirings 27, 28, 29, that is, the printed wiring 24 for input signal and the printed wiring 2 for output signal are provided.
The lead wires 52 and 53 connected to the pins 50a and 51a connected to the terminal 30 of FIG. That is, the inspection device 21 supplies a power supply voltage and a ground potential to the semiconductor device 20, supplies a cut signal (Cut) and a check signal (Check) which are operation signals, and at the same time, a printed wiring 24 for an input signal and an output signal. All of the printed wirings 25 for are short-circuited.

In FIG. 2, the print wiring 24 for the input signal and the print wiring 25 for the output signal are commonly connected in the inspection device 21, but the invention is not limited to this.
For example, the terminals of the input signal printed wiring 24 and the output signal printed wiring 25 are connected to the probe blocks 50, 51.
In addition to the common connection inside, the common connection may be performed by connecting the commonly connected terminals of the probe block 50 and the probe block 51 with a lead wire.

The semiconductor device 20 has a high cut signal (C
ut) is input, the switch circuit 35 opens the circuit, disconnects the connection between the wiring 39 and the drive circuit 33, and when a low check signal (Check) is input, the switch circuit 36 opens the circuit. The wiring 38 and the continuity determination circuit 37 are closed and connected. That is, the semiconductor device 20 has a high cut signal (Cut) and a low check signal (Che).
ck) is input, the switch circuit 35 and the switch circuit 36 are operated to disconnect the drive circuit 33 from the main wiring group and the terminal group in the semiconductor device 20, and the continuity determination circuit 37.
Is connected to a main wiring group and a terminal group in the semiconductor device 20.

Then, the wiring 39 in the semiconductor chip 23
Is a printed wiring 24 for input signals and a printed wiring 25 for output signals on the TAB substrate 22 via the bumps 32.
And the wiring 39 is connected to the switch circuit 3
6 is closed and the input signal printed wiring 24 and the output signal printed wiring 25 are short-circuited, so that all the input signal and output signal wirings 24, 25, 39, 38.
Is supplied with the power supply voltage Vcc. And this wiring 38
Are connected to the continuity determination circuit 37 via the switch circuit 36 and the inspection wiring 42.

That is, when the switch circuit 35 is opened and the switch circuit 36 is closed, TA
The power supply voltage Vcc is supplied to the printed wiring 24 for the input signal, the printed wiring 25 for the output signal, the bump 32, and the wirings 38 and 39 in the semiconductor chip 23 on the B substrate 22,
The wiring to which the power supply voltage Vcc is supplied is connected to the continuity determination circuit 37 via the wiring 38, the switch circuit 36, and the inspection wiring 42.

Then, the continuity determination circuit 37 compares the voltage input from each inspection wiring 42 with the comparison circuits COP1 to COP.
n is compared with the predetermined voltage VB, the input voltage is the predetermined voltage VB
When the input voltage is smaller than the predetermined voltage VB, the low output is output to the AND circuit AND.

When conducting the continuity test, as described above, the terminals 30 of the input signal printed wiring 24 and the output signal printed wiring 25 are in a short-circuited state. 24, 25, terminals 30, wirings 39, 38 in the semiconductor chip 23, the switch circuit 36, and the inspection wiring 42, if there is a conduction failure anywhere in the circuit, the resistance value at the portion where the conduction failure occurs. The voltage input to the plus side input terminals of the comparison circuits COP1 to COPn from the inspection wiring 42 connected to the wiring having the conduction failure due to the increase or the infinite resistance value is higher than the predetermined voltage VB. Also becomes smaller.

Then, of the comparison circuits COP1 to COPn, the voltage input to the plus side input terminal is the predetermined voltage VB.
The one smaller than that outputs a low output to the AND circuit AND, and the AND circuit AND outputs a low inspection result signal (Result).

The printed wirings 24 and 25 of the TAB substrate 22, the terminals 30 and the wiring 3 in the semiconductor chip 23 are also provided.
When no conduction failure has occurred in any of the circuits of 9, 38, the switch circuit 36, the power supply line 42, and the inspection wiring 42, the comparison circuit COP1 from all the inspection wirings 42.
The voltage input to COPn is a voltage obtained by subtracting the contact resistance in the circuit from the power supply voltage Vcc, which is higher than the predetermined voltage VB.

Here, the comparison circuits COP1 to COPn are
The voltage input to the positive side input terminal is compared with the predetermined voltage VB input to the negative side input terminal, and when the voltage input to the positive side input terminal is higher than the predetermined voltage VB, that is, there is a conduction failure. And circuit A when not
The high output is output to ND, and the AND circuit AND outputs the high inspection result signal (Result).

That is, the inspection circuit 34 includes the semiconductor device 2
Conductivity is determined by comparing the electric resistances within 0.

This inspection result signal (Result) is output to the inspection device 21, and the inspection device 21 outputs the semiconductor device 2
Based on the inspection result signal (Result) input from 0, display output or the like is performed regarding whether or not the semiconductor device 20 has a conduction failure.

The flow chart of the inspection operation is as follows:
It can be shown as in FIG.

That is, when the inspection device 21 is connected to the semiconductor device 20 by the lead wire 31 as described above, the inspection command signal of the cut signal (Cut) and the check signal (Check) is sent to the semiconductor device 20. Output (step S1).

In the semiconductor device 20, when the inspection command signal is input (step P1), the switch circuit 35 and the switch circuit 36 operate as described above, and the inspection circuit 34 operates.
Inspect the continuity between each wiring and terminal in the semiconductor device 20,
The continuity determination circuit 37 determines the continuity (step P
2). Then, the inspection result is displayed as an inspection result signal (Resu
It is output to the inspection device 21 (step P).
3).

When the inspection result signal (Result) is input from the semiconductor device 20, the inspection device 21 takes in the inspection result signal (Result) and outputs a display output of information corresponding to the inspection result signal (Result). Perform (step S2).

In this way, the semiconductor device 20 of this embodiment is
Since the inspection circuit 34 is built therein, when the power supply is supplied from the inspection device 21 and a simple inspection signal is input, the semiconductor device itself inspects the conductivity inside the semiconductor device 20 and performs the inspection. The result is output to the inspection device 21.

Therefore, as in the conventional case, the inspection device 21
And all the terminals of the semiconductor device 20 are connected, a conductivity test can be performed easily and in a short time without performing a complicated operation test, and the inspection device 21 is simple.
And it can be made inexpensive.

Although the semiconductor device 20 is applied to the semiconductor device of the liquid crystal drive circuit in the above embodiment, the invention is not limited to this, and a semiconductor device in which a chip (circuit element) is mounted on a circuit board. Generally applicable.

Further, in the above-mentioned embodiment, the case where the invention is applied to the semiconductor device formed by the TAB method has been described. However, the invention is not limited to this. For example, the same is applied to the semiconductor device of the COG method. You can

[0067]

According to the semiconductor device of the present invention, the semiconductor device itself inspects the conduction state and outputs the result by simply inputting a simple operation signal from an external device. Easy,
In addition, the conductivity test can be performed in a short time, and the external device for performing the conductivity test can be made simple and inexpensive.

[Brief description of drawings]

FIG. 1 is a diagram showing a circuit configuration of a main part of a semiconductor device of the present invention and a state in which the semiconductor device is connected to an inspection device.

FIG. 2 is a perspective view showing a conductive state between the semiconductor device and the inspection device of the present invention.

FIG. 3 is a flowchart showing the semiconductor device continuity test of the present invention in correspondence with the inspection device side processing and the semiconductor device side processing.

FIG. 4 is a diagram showing a circuit configuration of a main part of a conventional semiconductor device and a state in which the semiconductor device is connected to an inspection device.

FIG. 5 is a flowchart showing a conventional semiconductor device continuity test in association with the processing on the inspection device side and the processing on the semiconductor device side.

[Explanation of symbols]

 20 semiconductor device 21 inspection device 22 TAB substrate 23 semiconductor chip 24, 25, 26 printed wiring 27, 28, 29 inspection printed wiring 30 terminal 31 lead wire 32 bump 33 drive circuit 34 inspection circuit 35, 36 switch circuit 37 continuity determination circuit 38, 39, 40 wiring 41, 42, 43 inspection wiring 44 inspection wiring IN1, IN2 inverters R1, R2 resistance COP1 to COPn comparison circuit AND AND circuit

Claims (3)

[Claims] 1. A semiconductor device in which at least an input / output terminal and a wiring connected to the input / output terminal are provided on a circuit board, and a circuit element is mounted by connecting to the wiring. A continuity inspection circuit that outputs an output signal having a different value depending on the conduction state of the wiring on the circuit board and the conduction state between the wiring and the circuit element when an operation signal is input from the device is incorporated. Characteristic semiconductor device. 2. The continuity inspection circuit includes a continuity determination circuit that outputs an output signal having a different value depending on a continuity state of a wiring on the circuit board and a conduction state between the wiring and the circuit element, and an external circuit. 2. The semiconductor device according to claim 1, further comprising switching means for switching and connecting the wiring connected to the input / output terminal to the conduction determination circuit when an operation signal is input from the device. 3. The switching means, when the operation signal is input, switches the wiring connected to the input / output terminal to the continuity determining circuit and connects the wiring to the wiring board. A voltage is supplied, the conduction determination circuit compares the voltage of each wiring to which the predetermined voltage is supplied with a predetermined voltage value, and outputs the output signal based on the comparison result. 2. The semiconductor device according to 2.