JPH07105408B2 - Method for manufacturing resin-encapsulated semiconductor device and molding die - Google Patents

Method for manufacturing resin-encapsulated semiconductor device and molding die

Info

Publication number
JPH07105408B2
JPH07105408B2 JP61084078A JP8407886A JPH07105408B2 JP H07105408 B2 JPH07105408 B2 JP H07105408B2 JP 61084078 A JP61084078 A JP 61084078A JP 8407886 A JP8407886 A JP 8407886A JP H07105408 B2 JPH07105408 B2 JP H07105408B2
Authority
JP
Japan
Prior art keywords
resin
molding die
lead frame
back surface
semiconductor chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP61084078A
Other languages
Japanese (ja)
Other versions
JPS62241344A (en
Inventor
裕 奥秋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP61084078A priority Critical patent/JPH07105408B2/en
Publication of JPS62241344A publication Critical patent/JPS62241344A/en
Publication of JPH07105408B2 publication Critical patent/JPH07105408B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909Post-treatment of the connector or wire bonding area
    • H01L2224/8592Applying permanent coating, e.g. protective coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Moulds For Moulding Plastics Or The Like (AREA)
  • Casting Or Compression Moulding Of Plastics Or The Like (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、パツケージ裏側に熱処理時のガス導出用の開
口部を有する樹脂封止型半導体装置の製造方法及び同製
造方法の実施に直接使用する成型金型に関するものであ
る。
DETAILED DESCRIPTION OF THE INVENTION [Industrial field of application] The present invention is directly used for a method of manufacturing a resin-sealed semiconductor device having an opening on the back side of a package for discharging gas during heat treatment, and for carrying out the method. The present invention relates to a molding die.

〔従来の技術〕 経済性に優れ、しかも高密度実装に適した構造の樹脂封
止型半導体装置(以後、樹脂封止ICと称する)は各種電
子機器に幅広く用いられている。しかしながら、樹脂封
止ICは本質的に吸湿し易いという難点を有している。実
際、半田付け等の高熱処理を施すと、吸湿された水分が
ガス化してその高水蒸気圧からパツケージに亀裂が生ず
るという問題が生ずる。この為、従来は放熱性及びガス
導出性を考慮して、パッケージ裏面にガス導出用の開口
部を設ける等の工夫がなされていた(特開昭55-77160号
公報、実開昭59-89547号公報、実開昭59-125312号、及
び特願昭59-63178号参照)。
[Prior Art] A resin-encapsulated semiconductor device (hereinafter, referred to as a resin-encapsulated IC) which is economical and has a structure suitable for high-density mounting is widely used in various electronic devices. However, the resin-sealed IC inherently has a drawback that it easily absorbs moisture. In fact, when a high heat treatment such as soldering is applied, a problem arises in that the absorbed moisture is gasified and the high water vapor pressure causes cracks in the package. For this reason, conventionally, in consideration of heat dissipation and gas derivation, a device such as an opening for gas derivation on the back surface of the package has been devised (Japanese Patent Laid-Open No. 55-77160, 59-89547). No. 59-125312 and Japanese Patent Application No. 59-63178).

第2図は、上述したガス導出用の開口部を有する従来の
樹脂封止型ICを示すものである。同図(a)は平面図、
同図(b)は底面図、また同図(c)はこれらの図のA
−A線断面図である。同図に基き、従来の製造方法を説
明する。まずアイランド23に共晶または樹脂ペーストか
ら成るダイスボンド材27を介して半導体チツプ24を搭載
する。次に金属細線25を用いて、半導体チツプ24の外部
導出パツト(図示せず)と、リードフレームの外部導出
リード22内方端部とを接続する。
FIG. 2 shows a conventional resin-encapsulated IC having the above-mentioned gas outlet opening. The figure (a) is a plan view,
The figure (b) is a bottom view, and the figure (c) is A of these figures.
FIG. A conventional manufacturing method will be described with reference to FIG. First, the semiconductor chip 24 is mounted on the island 23 via the die bond material 27 made of eutectic or resin paste. Next, the thin metal wire 25 is used to connect the external lead-out pad (not shown) of the semiconductor chip 24 and the inner end of the lead-out lead 22 of the lead frame.

次いで半導体チツプ24の表面にチツプコート28を塗布す
る。このチツプコート28は後述する開口部26、及び封止
樹脂21と外部導出リード22との界面から主に侵入してく
る水分、配線腐食性イオン等から半導体チツプ24を保護
する為のものである。しかる後に、後述する如き成型金
型に上記リードフレームを挿着し、キヤビテイ部にエポ
キシ樹脂を加圧注入して樹脂封止を行い、封止樹脂21の
裏面に開口部26を形成するようにする。この後リードフ
レームからの外部導出リード22の切り離し、更に折り曲
げ加工によるリード折り曲げ部22a形成等の工程を経
て、樹脂封止型ICを完成する。
Next, the chip coat 28 is applied to the surface of the semiconductor chip 24. The chip coat 28 is for protecting the semiconductor chip 24 from moisture, wiring corrosive ions, and the like that mainly enter from the openings 26 described later and the interface between the sealing resin 21 and the external lead 22. After that, the lead frame is inserted into a molding die as described later, and epoxy resin is pressure-injected into the cavity to perform resin sealing, so that the opening 26 is formed on the back surface of the sealing resin 21. To do. After that, the resin lead-out type IC is completed through the steps of separating the lead-out lead 22 from the lead frame and further forming the lead bent portion 22a by bending.

第3図は、従来の成型金型にリードフレームを挿着した
様子を示したものである。成型金型は上部金型31と下部
金型32から構成されており、下部金型32にはリードフレ
ーム挿着時にアイランド23裏面に当接する突起部33が設
けられている。このように、上部金型31及び下部金型32
間に半導体チツプ24の搭載されたリードフレームが挿着
された状態において、キヤビテイ部34にエポキシ樹脂を
加圧注入することによりモールドを完了する。
FIG. 3 shows a state in which a lead frame is inserted and attached to a conventional molding die. The molding die is composed of an upper die 31 and a lower die 32, and the lower die 32 is provided with a protrusion 33 that comes into contact with the back surface of the island 23 when the lead frame is inserted. In this way, the upper mold 31 and the lower mold 32
Molding is completed by injecting an epoxy resin into the cavity portion 34 under pressure with the lead frame having the semiconductor chip 24 mounted in between.

〔発明が解決しようとする問題点〕[Problems to be solved by the invention]

しかしながら上述した従来例においては、モールデイン
グする際に成型金型の突起部がアイランド裏面に十分密
着しなかつたり、また加圧注入により封止樹脂が密着部
に侵入する等によつて、アイランド裏面の開口部形成領
域には薄い樹脂被膜、所謂フラツシユが形成されてしま
う。このようなフラツシユが一定膜厚以上に形成される
と、高熱処理の際ガス化した吸湿水分の出口が塞がれる
ことになり、熱ストレスによりパツケージが破裂し易く
なるという問題があつた。
However, in the above-mentioned conventional example, the projection of the molding die does not sufficiently adhere to the back surface of the island during molding, or the sealing resin enters the adhesion part due to pressure injection. A thin resin film, a so-called flash, is formed in the opening forming region of the. If such a flush is formed to have a certain film thickness or more, the outlet of the gasified moisture absorbed during the high heat treatment is blocked, and the package tends to burst due to thermal stress.

従つて、本発明は以上述べた問題を解消し、フラツシユ
形成を回避できる樹脂封止型半導体装置の製造方法及び
成型金型を提供することを目的とする。
Therefore, it is an object of the present invention to solve the above-mentioned problems and to provide a method of manufacturing a resin-encapsulated semiconductor device and a molding die that can avoid flash formation.

[問題を解決するための手段] 第1の発明である樹脂封止型半導体装置の製造方法は、
半導体チップの搭載されたアイランドの裏面に、成型金
型の中空部を有する金型突起部を当接することによりリ
ードフレームを挾持し、この状態で樹脂封止を行うこと
によって得られたパッケージ裏面に開口部を形成し、前
記パッケージを前記成型金型から取り出す際に、前記金
型突起部の中空部内面に付着した樹脂バリも同時に取り
除くことにより、パッケージの裏面に開口部を有する樹
脂封止型半導体装置を形成するものである。
[Means for Solving the Problem] A method for manufacturing a resin-sealed semiconductor device according to the first invention is
The lead frame is held by abutting the mold protrusion with the hollow part of the molding die on the back surface of the island where the semiconductor chip is mounted, and on the back surface of the package obtained by resin sealing in this state. A resin-sealed mold having an opening on the back surface of the package by forming an opening and removing the resin burr adhering to the inner surface of the hollow portion of the mold protrusion when the package is taken out from the molding die. A semiconductor device is formed.

また、第2の発明である樹脂封止型半導体装置の製造方
法に使用する成型金型は、リードフレームを挾持するた
めにアイランド裏面に当接するように配設された、中空
部を有する金型突起部と、この中空部の形状と同一形状
部分を有する挿通用の突き出しピンとを具備したもので
ある。
A molding die used in the method for manufacturing a resin-encapsulated semiconductor device according to the second invention is a die having a hollow portion, which is arranged so as to be in contact with the back surface of the island for holding the lead frame. It is provided with a protrusion and an ejection pin for insertion having a portion having the same shape as the shape of the hollow portion.

〔作用〕[Action]

本発明によれば、半導体チツプの装着されたリードフレ
ームを成型金型に挾持して樹脂封止を行う際、アイラン
ド裏面と金型突起部との間隙に侵入する溶融樹脂は、金
型突起部が中空部を有している為、この中空部の内面に
樹脂バリとなつて付着する。この為、モールド工程によ
り得られるパツケージ裏面の開口部にフラツシユの形成
されることが回避される。
According to the present invention, when a semiconductor chip mounted lead frame is clamped in a molding die for resin sealing, the molten resin that enters the gap between the island back surface and the die protrusion is Has a hollow portion, it adheres to the inner surface of this hollow portion as a resin burr. Therefore, it is possible to avoid the formation of flash in the opening on the back surface of the package obtained by the molding process.

また上記成型金型は突き出しピンを備える為、上述の如
く金型突起部の中空部内面に付着した樹脂バリは、リー
ドフレーム取り出し工程において突き出しピンを中空部
に挿通して押し出すことにより容易に除去できる。
Further, since the above-mentioned molding die is provided with the ejection pin, the resin burr adhered to the inner surface of the hollow portion of the die protrusion as described above can be easily removed by inserting the ejection pin into the hollow portion and extruding it in the lead frame removing step. it can.

〔実施例〕〔Example〕

以下、第1図に基き本発明の一実施例をDIP型を例にと
り詳細に説明する。
An embodiment of the present invention will be described in detail below with reference to FIG. 1 by taking a DIP type as an example.

まず、樹脂ペースト(例えばAgペースト)または共晶等
のダイスボンド材7を用いて、半導体チツプ4をリード
フレームのアイランド3にダイスボンドする。次いで半
導体チツプ4の外部導出パツト(図示せず)と、リード
フレームの外部導出リード2内方端とをAuワイヤから成
る金属細線5を用いてワイヤボンデイングし、この後半
導体チツプ4の表面にシリコン系樹脂またはポリイミド
系樹脂から成る非透湿性のチツプコート材8をポツテイ
ング等の方法を用いて塗布する。以上の工程により、半
導体チツプ4の装着を終了する。そして、半導体チップ
4の装着されたリードフレームを成型金型9に挿着す
る。
First, the semiconductor chip 4 is die-bonded to the islands 3 of the lead frame using a die-bonding material 7 such as a resin paste (eg, Ag paste) or a eutectic. Then, the external lead-out pad (not shown) of the semiconductor chip 4 and the inner end of the lead-out lead 2 of the lead frame are wire-bonded by using the fine metal wire 5 made of Au wire, and then the surface of the semiconductor chip 4 is silicon-bonded. A non-moisture permeable chip coat material 8 made of a resin or a polyimide resin is applied by a method such as potting. Through the above steps, the mounting of the semiconductor chip 4 is completed. Then, the lead frame on which the semiconductor chip 4 is mounted is inserted into the molding die 9.

ここにおいて上記成型金型9は、第1図(a)に示す如
く上部金型9aと、パツケージ挿着時にアイランド3裏面
に当接する高さ及び位置を以つて、中空部10aを有する
円柱形状の金型突起部10の設けられた下部金型9b、それ
に中空部10aに挿通される突き出しピン12とで構成され
ている。このような成型金型9を用い、アイランド3裏
面の開口部型成領域に、中空部10aを有する金型突起部1
0を当接するようにしてリードフレームを挾持すると成
型金型9内には、図示のようにキヤビテイ部11が形成さ
れる。このキヤビテイ部11は、上部金型9aとリードフレ
ームとの間の上部キヤビテイ11a、及び下部金型9bとリ
ードフレーム間の下部キヤビテイ11bとにより成るもの
である。
Here, the molding die 9 is of a cylindrical shape having an upper die 9a and a hollow portion 10a with a height and a position for contacting the back surface of the island 3 when the package is inserted as shown in FIG. 1 (a). It is composed of a lower die 9b provided with a die protrusion 10 and an ejection pin 12 inserted into the hollow portion 10a. Using such a molding die 9, a die protrusion 1 having a hollow portion 10a in the opening forming region on the back surface of the island 3 is formed.
When the lead frame is held so as to make contact with 0, a cavity 11 is formed in the molding die 9 as shown in the figure. The cavity portion 11 is composed of an upper cavity 11a between the upper die 9a and the lead frame, and a lower cavity 11b between the lower die 9b and the lead frame.

そして、この状態で上部キヤビテイ11a及び下部キヤビ
テイ11bの封止空間にエポキシ系の溶融樹脂を加圧注入
し、更に硬化させることにより主要部分のモールドを完
了する。なおこのモールド工程にて溶融樹脂を加圧注入
する際、アイランド3裏面と金型突起部10との間隙に侵
入してくる溶融樹脂は、金型突起部10が中空部10aを有
している為、アイライド3裏面に被膜状として付着する
ことはなく、中空部10aの内面上部に塊状の樹脂バリ13
となつて付着する。上記樹脂バリ13は成型金型9を上下
に開放する、所謂リードフレーム取り出し工程におい
て、突き出しピン12を中空部10aに挿通して押し出すこ
とにより容易に除去される。
Then, in this state, the epoxy-based molten resin is injected under pressure into the sealing space of the upper cavity 11a and the lower cavity 11b, and further cured to complete the molding of the main part. When the molten resin is injected under pressure in this molding step, the molten resin entering the gap between the back surface of the island 3 and the mold protrusion 10 has a hollow portion 10a in the mold protrusion 10. Therefore, it does not adhere to the back surface of the eyelid 3 as a film, and a lump of resin burr 13 is formed on the inner surface of the hollow portion 10a.
It attaches to. The resin burr 13 is easily removed by inserting the ejection pin 12 into the hollow portion 10a and extruding it in a so-called lead frame taking out step in which the molding die 9 is opened vertically.

この後、封止樹脂から成るパツケージ1で封止された主
要部及び外部導出リード2をリードフレームから切り離
し、更に折り曲げ加工によりリード折り曲げ部14を形成
する等により、第1図(b)に示す如くパツケージ1裏
面にガス導出用の開口部6を有するDIP型の樹脂封止型I
Cを完成する。
After that, the main portion and the externally lead-out lead 2 sealed by the package 1 made of a sealing resin are separated from the lead frame, and the lead bending portion 14 is formed by bending work, and the like, as shown in FIG. 1 (b). As described above, the DIP type resin-sealed mold I having the opening 6 for discharging gas on the back surface of the package 1
Complete C.

ここにおいて上述した金型突起部10は、円柱形状の外に
角柱形状でも良く、その個数も開口部6の設定数に応じ
て複数個とすることができ、また配設位置もアイランド
3裏面に当接する位置であれば特に限定されるものでは
ない。また、中空部10aの形状も金型突起部10と同一形
状にできる外、特に限定されないことは勿論である。
The above-mentioned mold protrusion 10 may have a prism shape in addition to the column shape, and the number thereof may be plural according to the set number of the openings 6, and the arrangement position is also on the back surface of the island 3. The contact position is not particularly limited as long as it is in contact. Further, it goes without saying that the shape of the hollow portion 10a can be the same as that of the mold protrusion 10 and is not particularly limited.

更に、上記実施例ではDIP型について説明したが、本発
明はFLAT型等の樹脂封止型半導体装置に広く適用するこ
とができる。
Furthermore, although the DIP type has been described in the above embodiments, the present invention can be widely applied to resin-encapsulated semiconductor devices such as the FLAT type.

〔発明の効果〕〔The invention's effect〕

以上詳細に説明したように、本発明によれば、半導体チ
ツプが搭載されるアイランドの裏面に成型金型の中空部
を有する金型突起部を当接して樹脂封止を行うようにし
ているので、モールド後に得られるパツケージの上記金
型突起部に対応した形状の開口部にフラツシユの形成さ
れる事が回避できる。
As described in detail above, according to the present invention, the mold projection having the hollow portion of the molding die is brought into contact with the back surface of the island on which the semiconductor chip is mounted for resin sealing. Therefore, it is possible to avoid the formation of flash in the opening having a shape corresponding to the mold protrusion of the package obtained after molding.

従つて高熱処理の際には、上記開口部を通してのガス導
出が確実且つ容易となる為、熱ストレスが低減され樹脂
封止型半導体装置の信頼性を向上できるという効果があ
る。
Therefore, during the high heat treatment, the gas can be reliably and easily led out through the opening, so that the thermal stress can be reduced and the reliability of the resin-sealed semiconductor device can be improved.

また樹脂封止の際、金型突起部の中空部内面に付着する
樹脂バリは、挿通用の突き出しピンで押し出して簡単に
除去できる為、成型金型の保守を容易にできるという効
果もある。
Further, at the time of resin sealing, resin burrs adhering to the inner surface of the hollow portion of the mold protrusion can be easily removed by pushing out with a protruding pin for insertion, which also has the effect of facilitating maintenance of the molding die.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の一実施例を説明する要部断面図、第2
図は従来の樹脂封止型半導体装置を説明する概要図、第
3図は同従来の成型金型を説明する要部断面図である。 1……パツケージ(封止樹脂)、2……外部導出リー
ド、3……アイランド、4……半導体チツプ、5……金
属細線、6……開口部、7……ダイスボンド材、8……
チツプコート、9……成型金型、9a……上部金型、9b…
…下部金型、10……金型突起部、10a……中空部、11…
…キヤビテイ部、11a……上部キヤビテイ、11b……下部
キヤビテイ、12……突き出しピン、13……樹脂バリ、14
……リード折り曲げ部。
FIG. 1 is a sectional view of an essential part for explaining an embodiment of the present invention, and FIG.
FIG. 1 is a schematic diagram for explaining a conventional resin-sealed semiconductor device, and FIG. 3 is a cross-sectional view of a main part for explaining the conventional molding die. 1 ... Package (sealing resin), 2 ... External lead, 3 ... Island, 4 ... Semiconductor chip, 5 ... Metal wire, 6 ... Opening, 7 ... Dice bond material, 8 ...
Chip coat, 9 …… Molding die, 9a …… Upper die, 9b…
… Lower mold, 10 …… Mold projection, 10a …… Hollow part, 11…
… Cavity section, 11a …… Upper cavity, 11b …… Lower cavity, 12 …… Extrusion pin, 13 …… Resin burr, 14
...... Lead bending part.

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 B29L 31:34 ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 6 Identification code Internal reference number FI technical display location B29L 31:34

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】半導体チップと電気的に接続されたリード
フレームの一部と半導体チップ部とを一体化して樹脂に
より封止するようにした樹脂封止型半導体装置の製造方
法において、 前記半導体チップの搭載されたアイランドの裏面に、成
型金型の中空部を有する金型突起部を当接することによ
り前記リードフレームを挾持し、 この状態で樹脂封止を行なうことによって得られたパッ
ケージ裏面に開口部を形成し、 前記パッケージを前記成型金型から取り出す際に、前記
金型突起部の中空部内面に付着した樹脂バリも同時に取
り除くことを特徴とする樹脂封止型半導体装置の製造方
法。
1. A method of manufacturing a resin-sealed semiconductor device, wherein a part of a lead frame electrically connected to a semiconductor chip and a semiconductor chip portion are integrated and sealed with a resin. The lead frame is clamped by abutting the mold protrusion having the hollow part of the mold on the back surface of the island on which the package is mounted, and the resin is sealed in this state to open the back surface of the package. And a resin burr attached to the inner surface of the hollow portion of the mold protrusion is removed at the same time when the package is taken out from the molding die.
【請求項2】半導体チップと電気的に接続されたリード
フレームの一部と半導体チップ部とを一体化して樹脂に
より封止するようにした樹脂封止型半導体装置の製造方
法に使用する成型金型において、 前記リードフレームを挾持するためにアイランド裏面に
当接するように配設された、中空部を有する金型突起部
と、 この中空部の形状と同一形状部分を有する挿通用の突き
出しピンとを具備したことを特徴とする成型金型。
2. A molding die used in a method of manufacturing a resin-sealed semiconductor device, wherein a part of a lead frame electrically connected to a semiconductor chip and a semiconductor chip portion are integrated and sealed with a resin. In the mold, a mold protrusion having a hollow portion, which is arranged so as to abut on the back surface of the island for holding the lead frame, and an ejection pin for insertion having a portion having the same shape as the shape of the hollow portion are provided. Molding die characterized by having.
JP61084078A 1986-04-14 1986-04-14 Method for manufacturing resin-encapsulated semiconductor device and molding die Expired - Lifetime JPH07105408B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61084078A JPH07105408B2 (en) 1986-04-14 1986-04-14 Method for manufacturing resin-encapsulated semiconductor device and molding die

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61084078A JPH07105408B2 (en) 1986-04-14 1986-04-14 Method for manufacturing resin-encapsulated semiconductor device and molding die

Publications (2)

Publication Number Publication Date
JPS62241344A JPS62241344A (en) 1987-10-22
JPH07105408B2 true JPH07105408B2 (en) 1995-11-13

Family

ID=13820452

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61084078A Expired - Lifetime JPH07105408B2 (en) 1986-04-14 1986-04-14 Method for manufacturing resin-encapsulated semiconductor device and molding die

Country Status (1)

Country Link
JP (1) JPH07105408B2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0268953A (en) * 1988-09-02 1990-03-08 Matsushita Electron Corp Semiconductor device
JPH0287811A (en) * 1988-09-26 1990-03-28 Murata Mfg Co Ltd Production of piezoelectric parts
JP4024335B2 (en) * 1996-01-26 2007-12-19 ハリス コーポレイション Integrated circuit device having an opening exposing die of integrated circuit and manufacturing method thereof

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5480078A (en) * 1977-12-08 1979-06-26 Dai Ichi Seiko Co Ltd Method of forming semiconductor seal
JPS55134940A (en) * 1979-04-06 1980-10-21 Citizen Watch Co Ltd Resin sealing method for ic

Also Published As

Publication number Publication date
JPS62241344A (en) 1987-10-22

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