KR100600178B1 - Manufacturing method of semiconductor package - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor package, and an object of the present invention is to easily remove flashes and resins formed on a chip mounting plate and leads exposed through an encapsulation portion of a semiconductor package.

To this end, the present invention is a chip mounting plate is located in the center, the outer periphery of the chip mounting plate provides a lead frame in which a plurality of leads are located, the upper and lower surfaces of the lead frame, respectively, to improve the adhesive force with the encapsulant Providing a lead frame having an adhesion reinforcing layer further formed thereon, adhering a semiconductor die to an upper surface of the chip mounting plate through an adhesive, interconnecting the semiconductor die and the lead with conductive wires, and Encapsulating the mounting plate, the plurality of leads, the semiconductor die, and the plurality of conductive wires with an encapsulant to form an encapsulation part, wherein the adhesion reinforcing layer on the lower surface of the lead and the chip mounting plate is exposed to the bottom; Etching to a certain depth so that the flash and resin formed on the surface are removed together. It shall be.

Semiconductor Package, Lead Free Package, Leadframe, Flash, Resin

Description

Manufacturing method of semiconductor package

1A is a cross-sectional view showing a conventional semiconductor package, and FIG. 1B is a bottom view thereof.

2 is a sequential explanatory diagram showing a method for manufacturing a semiconductor package according to the present invention.

3A to 3E are cross-sectional views illustrating a method of manufacturing a semiconductor package corresponding to FIG. 2.

4 is an explanatory diagram sequentially showing another method of manufacturing a semiconductor package according to the present invention.

5A through 5E are cross-sectional views illustrating a method of manufacturing a semiconductor package corresponding to FIG. 4.

<Description of Symbols for Main Parts of Drawings>

110; Lead frame 112; Chip mounting plate

114; Lead 116; Adhesive Strengthening Layer

118; Sacrificial layer 120; glue

130; Semiconductor die
140; Conductive wire

150; Encapsulation
151; Flash and resin

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor package, and in more detail, flash and resin formed on a chip mounting plate and a lead exposed through an encapsulation portion of a semiconductor package can be easily removed. The present invention relates to a method for manufacturing a semiconductor package.

Referring to FIG. 1A, a cross-sectional view of a conventional semiconductor package is shown, and a bottom view thereof is shown with reference to FIG. 1B.

As illustrated, the conventional semiconductor package 100 'includes a chip mounting plate 112', a plurality of leads 114 'positioned at an outer periphery of the chip mounting plate 112', and the chip mounting plate ( 112 'and a plurality of conductive wires 140' electrically connecting the semiconductor die 130 'and the lead 114' to each other, and The chip mounting plate 112 ', the plurality of leads 114', the semiconductor die 130 'and the plurality of conductive wires 140' are wrapped around the bottom surface of the chip mounting plate 112 'and the leads 114'. The encapsulation portion 150 'is exposed to the lower portion.

Meanwhile, in the semiconductor package 100 ', the lead 114' and the chip mounting plate 112 'are free of lead and have a metal layer that can be directly mounted on an external device in accordance with a request of a leadfree package. (Not shown) is formed. In addition, in this case, due to the constant demand of the MRT test, an adhesion reinforcing layer 116 ′ is formed on the lead-free metal layer to improve the adhesion with the encapsulation portion 150 ′.

However, such an adhesion reinforcing layer 116 ′ is unnecessarily remaining under the chip mounting plate 112 ′ and the lead 114 ′ exposed under the encapsulation part 150 ′ after the encapsulation process. In the deflash process for removing the flash or the resin 151 ', there is a problem that the removal ability is significantly reduced. For example, as shown in FIG. 1B, after the encapsulation process, unnecessary flash or resin 151 'remains in a predetermined region of the chip mounting plate 112' and the lead 114 'adjacent to the encapsulation part 150'. This typically interrupts the electrical connection with external devices, thereby performing a deflash process to remove it. However, as described above, the flash or the resin 151 'is very firmly adhered to the adhesion reinforcing layer 116' due to the adhesion reinforcing layer 116 ', so that it is not easily removed. In other words, a conventional deflashing process is performed by etching or burning the flash or resin 151 'by chemical dipping or laser, and the flash or resin 151' is not completely removed by this method. Therefore, the electrical connection force with the external device is significantly reduced. Here, the "falsh" refers to a flaky material in which resin flows from a gap such as a parting line (flash line) or ejector pin of a mold and solidifies or hardens, as described in the "mold term dictionary". In addition, deflashing means removing the solidified or cured flake-like material that flows out as described above.

The present invention is to overcome the above-mentioned conventional problems, an object of the present invention is to provide a method of manufacturing a semiconductor package that can easily remove the flash and resin formed on the chip mounting plate and lead exposed through the encapsulation of the semiconductor package. It is.

In order to achieve the above object, a method of manufacturing a semiconductor package according to the present invention provides a lead frame in which a chip mounting plate is positioned at the center, and a plurality of leads are positioned at an outer circumference of the chip mounting plate. The method further includes providing a lead frame having an adhesion reinforcing layer further formed thereon to improve adhesion to an encapsulant, and bonding a semiconductor die to an upper surface of the chip mounting plate through an adhesive, wherein the semiconductor die and the lead are attached to each other. Interconnecting the conductive wires with each other, and encapsulating the chip mounting plate, the plurality of leads, the semiconductor die, and the plurality of conductive wires with an encapsulant to form an encapsulation part, wherein And the flash and resin formed on the surface by etching the adhesion enhancing layer to a predetermined depth. Characterized in that the step made to be removed.

In addition, the method for manufacturing a semiconductor package according to the present invention in order to achieve the above object is provided with a lead frame in which a chip mounting plate is located in the center, a plurality of leads are located on the outer periphery of the chip mounting plate, the lead frame In the upper and lower surfaces, an adhesion reinforcing layer is formed to improve adhesion to the encapsulant, respectively, and a lead frame having a sacrificial layer is further provided on the lower surface of the adhesion reinforcing layer, and an adhesive is interposed on the upper surface of the chip mounting plate. Bonding a semiconductor die, interconnecting the semiconductor die and the leads with conductive wires, and encapsulating the chip mounting plate, the plurality of leads, the semiconductor die, and the plurality of conductive wires with an encapsulant to form an encapsulation portion. And exposing the sacrificial layer on the lower surface of the lead and the chip mounting plate to a lower portion, and removing the sacrificial layer to form a surface of the sacrificial layer. And removing the flash and the resin together.

The sacrificial layer removing step may be performed using a chemical solution that reacts only with the sacrificial layer and does not react with the adhesion reinforcing layer and the encapsulant.

As described above, in the method of manufacturing a semiconductor package according to the present invention, by etching the adhesion reinforcing layer exposed under the encapsulation portion to a predetermined depth, the flash and the resin formed on the surface can be removed together.

In addition, the manufacturing method of the semiconductor package according to the present invention as described above further forms a sacrificial layer on the lower surface of the lead and the chip mounting plate exposed to the lower portion of the encapsulation, and by removing the sacrificial layer after the sealing process, The formed flash and resin can also be removed together.

In addition, the present invention has the effect of improving the solder connection between the external device and the lead and the chip mounting plate in the future by forming the sacrificial layer as described above.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings such that those skilled in the art may easily implement the present invention.

Referring to FIG. 2, a method of manufacturing a semiconductor package according to the present invention is shown as an explanatory diagram sequentially, and referring to FIGS. 3A to 3E, a method of manufacturing a semiconductor package corresponding to FIG. 2 is illustrated as a cross-sectional view.

As shown in the drawing, the method for manufacturing a semiconductor package according to the present invention includes providing a lead frame 110 having an adhesion reinforcing layer 116 formed on upper and lower surfaces (S1) (see FIG. 3A), and the lead frame 110. Attaching the semiconductor die 130 to the chip mounting plate 112 of FIG. 3 (see FIG. 3B), and the lead 114 of the semiconductor die 130 and the lead frame 110 to the conductive wire 140. Bonding to each other (S3) (see FIG. 3C), and encapsulating the chip mounting plate 112, the plurality of leads 114, the semiconductor die 130, and the plurality of conductive wires 140 with an encapsulant. The adhesive force reinforcing layer 116 formed on the lower surface of the chip mounting plate 112 and the lead 114 is exposed (S4) (see FIG. 3D), and the adhesive force reinforcing layer 116 is etched to a predetermined depth. Removal step S5 (see FIG. 3E).

First, in the lead frame 110 providing step (S1), the chip mounting plate 112 is positioned at the center, and the lead frame 110 at which the plurality of leads 114 are positioned at the outer periphery of the chip mounting plate 112. ), The lead frame 110 is formed on the upper and lower surfaces of the lead frame 110 (that is, the chip mounting plate 112 and the lead 114) is formed with a certain thickness of the adhesion reinforcing layer 116. .

Here, the lead frame 110, the lead-free metal layer (not shown) that can be attached to the external device without lead (Pb) may be formed on the upper and lower surfaces, and reinforces the adhesive force with the encapsulant on the surface again An adhesion reinforcing layer 116 may be formed. Of course, the lead-free metal layer may not be formed.

In addition, the lead frame 110 may be made of copper (Cu), copper alloy (Cu alloy), iron (Fe), or an equivalent thereof, and the material of the lead frame 110 is not limited thereto.

Furthermore, although the chip mounting plate 112 is illustrated in FIG. 3A, a lead frame 110 having only the lead 114 without the chip mounting plate 112 may be provided.

In the bonding step S2 of the semiconductor die 130, an epoxy die, an adhesive tape, or an equivalent thereof is interposed on an upper surface of the chip mounting plate 112 to bond the semiconductor die 130.

In this case, when the lead frame 110 without the chip mounting plate 112 is provided, the semiconductor die 130 may be bonded to the adhesive 120 by directly interposing the upper surfaces of the plurality of leads 114.

In the bonding step S3 of the wire 140, the semiconductor die 130 and the lead 114 are electrically connected to each other by the conductive wire 140.

Here, the conductive wire 140 may be a gold wire (Au wire), an aluminum wire (Al wire), a copper wire (Cu wire) or an equivalent thereof, and the material is not limited thereto.

In the encapsulation step (S4), the chip mounting plate 112, the plurality of leads 114, the semiconductor die 130, and the plurality of conductive wires 140 are encapsulated with an encapsulant, and the leads 114 and the chips. The lower surface of the mounting plate 112, that is, the adhesion reinforcing layer 116 is encapsulated so as to be exposed to the bottom to form a sealing portion 150 of a certain form. That is, only the adhesion reinforcement layer 116 formed on the lower surface of the lead 114 and the chip mounting plate 112 is exposed to the lower portion of the encapsulation portion 150, and the flash generated during the encapsulation process on the surface of the adhesion reinforcement layer 116. And resin 151 may remain.

Of course, the adhesion reinforcing layer 116 formed on the upper surface of the chip mounting plate 112 and the lead 114 is directly adhered to the encapsulation unit 150, so that moisture may be formed in the chip mounting plate 112 and the lead 114. It is difficult to penetrate through the interface between the upper surface and the encapsulation part 150.

In the step of removing and removing the adhesion reinforcing layer 116 to a predetermined depth (S5), the adhesion reinforcing layer 116 is removed to a certain thickness by a chemical solution that reacts only with the adhesion reinforcing layer 116.

Here, the remaining non-removable adhesion enhancing layer 116 protects the chip mounting plate 112 and the lead 114 thereon while being removed to a certain depth by the chemical solution, thereby preventing damage to the package itself. .

Of course, the flash and the resin 151 formed on the surface are also removed by removing some of the adhesion reinforcing layer 116, which causes the external device and the lead 114 and / or the chip mounting plate 112 to be separated. Solder connection is improved.

Referring to FIG. 4, another method for manufacturing a semiconductor package according to the present invention is shown as an explanatory diagram, and referring to FIGS. 5A to 5E, a method for manufacturing a semiconductor package corresponding to FIG. 4 is shown as a cross-sectional view. . Here, the same components will use the same reference numerals.

As shown in another manufacturing method of the semiconductor package according to the present invention, the upper and lower adhesive strength reinforcing layer 116 is formed, the lower surface of the adhesion reinforcing layer 116 is further provided with a lead frame 110, the sacrificial layer 118 is further formed ) S1 (see FIG. 5A), adhering the semiconductor die 130 onto the chip mounting plate 112 of the leadframe 110 (S2) (see FIG. 5B), and the semiconductor Bonding the die 130 and the lead 114 of the leadframe 110 to the conductive wire 140 (S3) (see FIG. 5C), the chip mounting plate 112, and the plurality of leads 114. The semiconductor die 130 and the plurality of conductive wires 140 are encapsulated with an encapsulant, but the sacrificial layer 118 formed on the lower surface of the chip mounting plate 112 and the lead 114 is exposed (S4) ( 5D) and removing the sacrificial layer 118 (S5) (see FIG. 5E).

First, in the lead frame 110 providing step (S1), the chip mounting plate 112 is positioned at the center, and the lead frame 110 at which the plurality of leads 114 are positioned at the outer periphery of the chip mounting plate 112. ), But the upper and lower surfaces of the lead frame 110 (that is, the chip mounting plate 112 and the lead 114) is formed with an adhesion reinforcing layer 116 of a predetermined thickness, and the adhesion reinforcing layer of the lower surface 116 is provided with a lead frame 110 in which a sacrificial layer 118 is further formed.

Here, the lead frame 110, the lead-free metal layer (not shown) that can be attached to the external device without lead (Pb) may be formed on the upper and lower surfaces, and reinforces the adhesive force with the encapsulant on the surface again An adhesion reinforcing layer 116 may be formed, and then a sacrificial layer 118 may be formed on the adhesion reinforcing layer 116 on the bottom surface. Of course, the lead-free metal layer may not be formed.

In addition, the lead frame 110 may be made of copper (Cu), copper alloy (Cu alloy), iron (Fe), or an equivalent thereof, and the material of the lead frame 110 is not limited thereto.

In addition, although the chip mounting plate 112 is illustrated in FIG. 5A, the lead frame 110 having only the lead 114 without the chip mounting plate 112 may be provided.

In the bonding step S2 of the semiconductor die 130, an epoxy die, an adhesive tape, or an equivalent thereof is interposed on an upper surface of the chip mounting plate 112 to bond the semiconductor die 130.

In this case, when the lead frame 110 without the chip mounting plate 112 is provided, the semiconductor die 130 may be bonded to the adhesive 120 by directly interposing the upper surfaces of the plurality of leads 114.

In the bonding step S3 of the wire 140, the semiconductor die 130 and the lead 114 are electrically connected to each other by the conductive wire 140.

Here, the conductive wire 140 may be a gold wire (Au wire), an aluminum wire (Al wire), a copper wire (Cu wire) or an equivalent thereof, and the material is not limited thereto.

In the encapsulation step (S4), the chip mounting plate 112, the plurality of leads 114, the semiconductor die 130, and the plurality of conductive wires 140 are encapsulated with an encapsulant, and the leads 114 and the chips. The lower surface of the mounting plate 112, that is, the sacrificial layer 118 is encapsulated so as to be exposed to the lower portion to form an encapsulation portion 150. That is, only the sacrificial layer 118 formed on the lower surface of the lead 114 and the chip mounting plate 112 is exposed to the lower portion of the encapsulation portion 150, and the flash and the resin generated during the encapsulation process on the surface of the sacrificial layer 118. 151 may remain.

Of course, the adhesion reinforcing layer 116 formed on the upper surface of the chip mounting plate 112 and the lead 114 is directly adhered to the encapsulation unit 150, so that moisture may be formed in the chip mounting plate 112 and the lead 114. It is difficult to penetrate through the interface between the upper surface and the encapsulation part 150.

In the step S5 of removing the sacrificial layer 118, the sacrificial layer 118 is removed by a chemical solution that reacts only with the sacrificial layer 118. That is, the chemical solution reacts only with the sacrificial layer 118 and does not react with the adhesion reinforcing layer 116 and the encapsulation part 150, thereby forming the bottom surface of the chip mounting plate 112 and the lead 114. The adhesion reinforcing layer 116 is exposed through the encapsulation portion 150 as it is.

Here, the adhesion reinforcing layer 116 protects the chip mounting plate 112 and the lead 114 thereon while the sacrificial layer 118 is removed by the chemical solution, thereby preventing damage to the package itself. Also

Of course, by removing the sacrificial layer 118, the flash and the resin 151 formed on the surface are also removed together, so that the solder connection between the external device and the lead 114 and / or the chip mounting plate 112 is subsequently performed. The power is improved.

As described above, in the method of manufacturing a semiconductor package according to the present invention, a sacrificial layer is further formed on the lower surface of the lead and the chip mounting plate exposed to the outside of the encapsulation portion, and the sacrificial layer is removed after the encapsulation process, thereby forming the sacrificial layer. Flash and resin can also be removed together.

In addition, the present invention has an effect of improving the solder connection between the external device and the lead and the chip mounting plate in the future by adopting the sacrificial layer as described above.

What has been described above is only one embodiment for carrying out the method of manufacturing a semiconductor package according to the present invention, the present invention is not limited to the above embodiment, as claimed in the following claims of the present invention Without departing from the gist of the present invention, one of ordinary skill in the art will have the technical spirit of the present invention to the extent that various modifications can be made.

Claims (3)

A chip mounting plate is positioned at the center, and a lead frame in which a plurality of leads are positioned is provided at the outer circumference of the chip mounting plate, and an adhesion reinforcing layer is provided on the upper and lower surfaces of the lead frame to improve adhesion to the encapsulant, respectively. Providing a formed leadframe, Bonding a semiconductor die to an upper surface of the chip mounting plate through an adhesive; Interconnecting the semiconductor die and the leads with conductive wires; Encapsulating the chip mounting plate, the plurality of leads, the semiconductor die, and the plurality of conductive wires with an encapsulant to form an encapsulation portion, wherein the adhesion reinforcing layer on the lower surface of the lead and the chip mounting plate is exposed downward; And etching the adhesive force reinforcing layer to a predetermined depth to remove the flash and the resin formed on the surface thereof. A chip mounting plate is positioned at the center, and a lead frame in which a plurality of leads are positioned at an outer circumference of the chip mounting plate is provided. And a lead frame having a sacrificial layer formed on the adhesion reinforcing layer on the lower surface thereof; Bonding a semiconductor die to an upper surface of the chip mounting plate through an adhesive; Interconnecting the semiconductor die and the leads with conductive wires; Encapsulating the chip mounting plate, the plurality of leads, the semiconductor die, and the plurality of conductive wires with an encapsulant to form an encapsulation portion, wherein the sacrificial layer on the lower surface of the lead and the chip mounting plate is exposed to the bottom; Removing the sacrificial layer to remove flash and resin formed on the surface thereof. The method of claim 2, wherein removing the sacrificial layer is performed using a chemical solution that reacts only with the sacrificial layer and does not react with the adhesion reinforcing layer and the encapsulant.

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