JPH07104314A - Manufacture of liquid crystal display device - Google Patents

Abstract

PURPOSE:To concurrently prevent the sort circuit and the display electrode defects due to the deterioration of the surface of the SiNx insulating film from occurring by performing the treatment for defect to the SiNx film with a Cr etchant just after the ITO film formation or just after the ITO film formation and the patterning. CONSTITUTION:When defects are present in the SiNx gate insulating film 12 and a contact hole through the SiNx film 12 is generated, the ITO 16 laminated on the SiNx film is also formed in the contact hole and while the film thickness of the ITO 16 is 500 to 1000Angstrom , that of the SiNx film 12 is greater, i.e., 2000 to 4000A, and therefore the ITO in the contact hole becomes a very thin film having coarse structure. Accordingly, the Cr etchant passes through this ITO thin film and infiltrates into the lower layer. Thus even at the time of generating the contact hole in a part of the SiNx film 12 on the Cr electrode 11, the corresponding part of the Cr electrode 11 is removed by the etching to prevent the short circuit between the ITO electrode 16 and the Cr electrode 11 from occurring.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a liquid crystal display device, and more particularly to a method of manufacturing a liquid crystal display device with improved defect processing.

[0002]

2. Description of the Related Art Liquid crystal display devices have advantages such as small size, thin shape, and low power consumption, and are being put to practical use in fields such as OA equipment and AV equipment. In particular, an active matrix type using a thin film transistor (hereinafter abbreviated as TFT) as a switching element can display a fine moving image and is used for a display. With the increase in size and definition of panel displays, the number of pixels has increased and countermeasures against defects have become important.

A conventional manufacturing method will be described below with reference to FIGS. 1 to 6.
Explain the method. First, on a transparent substrate (10) such as glass
As a gate metal, for example, Cr (11) is sputtered
Stacked to a thickness of about 1500Å with a ring, etc.
Part of the gate voltage of the TFT by patterning
Gate line to be the pole (11G) and auxiliary capacitance electrode
(11 SC) is formed (see FIG. 1 above). next,
SiN to be a gate insulating film_X(12) Plasma CVD
Layer to a thickness of 2000 to 4000Å, and pull
Then, a-Si (13) is 1000 Å by plasma CVD.
Degree, SiN_XAre sequentially laminated to a thickness of about 2500Å
It a-Si (13) is the channel layer and top layer of TFT
SiN_XIs patterned to the gate electrode (11G).
The etching stopper (1
4) (see FIG. 2 above). Next, for contacts
A-Si (hereinafter referred to as N⁺a-
Si) (15) is 500Å by plasma CVD
It is laminated to a thickness of about ⁺a-Si (15) and
a-Si (13) is TFT by the patterning of the same mask
Channel contact layer is formed by leaving
(See above, see FIG. 3).

Next, as a defect treatment, the substrate having the structure shown in FIG. 3 is dipped in a liquid Cr etchant containing a mixture of cerium ammonium nitrate, perchloric acid and water. As a result, when there is a defect in the gate insulating film, the etchant enters from the defective portion of the film and removes Cr in the lower portion by etching. Subsequently, ITO (16) as a transparent electrode material is laminated by sputtering or the like to a thickness of about 500 to 1000 Å and patterned to form a display electrode (16
P) is formed (see FIG. 4 above). Next, as the drain / source metal, for example, the lower layer of M with 1000 Å
o, a two-layer film (17) of Al having an upper layer of 7,000 Å is formed (see FIG. 5 above), and part of this is patterned as N ⁺ a-Si as a drain electrode (17D).
At the same time as connecting to the drain line covering one end of (15) and the display electrode (16P), N ⁺ a-Si (1
A source electrode (17S) that covers the other end of 5) is formed. Further, the drain electrode (17D) and the source electrode (17D
The center portion of N ⁺ a-Si (15) is removed by using S) as a mask, and the structure shown in FIG. 6 is obtained.

The gate line and drain line, and the auxiliary capacitance electrode (11SC) and the display electrode (16P) are made of Si.
Although it partially overlaps with the N _x (12) gate insulating film, since the defect treatment by the immersion of the Cr etchant is performed in advance at the stage of FIG. No short circuit occurs even if it occurs in the overlapping portion of the gate line and the drain line and the auxiliary capacitance electrode and the display electrode. That is, as shown in FIG. 7, Cr (1
The Cr etchant enters from the defective portion of the gate insulating film on the gate line and the auxiliary capacitance electrode made of 1), and as shown in FIG. 8, Cr in this portion is removed by etching. Therefore, as shown in FIG. 9 or 11, even if Al / Mo (17) in the drain line or ITO (16) in the display electrode is generated in the defective portion of the gate insulating film,
Insulation from Cr (11) is maintained.

[0006]

However, as is clear from the above description of the manufacturing method, since the defect treatment by immersion of the Cr etchant is performed before the film formation of the ITO (16), it becomes the base of the ITO. The gate insulating film of SiN _x (12) undergoes a chemical change due to a Cr etchant and its surface is altered. That is, when SiN _x reacts with cerium ammonium nitrate, which is used as a Cr etchant, perchloric acid, water, and the like to change the surface, abnormal etching shapes and poor adhesion are formed when ITO is formed and patterned later. Was occurring.

[0007]

The present invention has been made in view of the above-mentioned problems, and includes a step of laminating a first metal on a substrate,
A step of patterning the first metal; a step of forming a first insulating film on the substrate; a step of forming a semiconductor layer on the substrate; a step of patterning the semiconductor layer; A step of forming a transparent conductive film on the substrate, a step of patterning the transparent conductive film, a step of immersing the substrate in the etchant of the first metal, a step of laminating a second metal on the substrate, And a step of patterning a second metal, the step of forming a transparent conductive film on the substrate, or after the step of patterning the transparent conductive film, the substrate is made of the first metal. The above problem is solved by a manufacturing method provided with a step of immersing in an etchant.

[0008]

In general, when a foreign substance exists in the insulating film, the foreign substance is released during the subsequent etching for pattern formation or the stripping of the photoresist, and this becomes a contact hole, which leads to a short circuit between the upper and lower electrodes. In the case of the conventional example, the ITO electrode (16) and the Cr electrode (11) are vertically arranged on both sides of the SiN _x (12) in the display portion, and the Al / Mo wiring (17) is similarly formed at the gate / drain wiring intersection. Cr wiring (11)
, But the film thickness is 2000-400 of SiN _x .
In contrast to 0Å, ITO is formed as thin as 500 to 1000Å, so that the ITO becomes an extremely thin and rough film in the contact hole, and the connection with the Cr pattern is uncertain. Therefore, by performing the defect treatment due to the immersion of the Cr etchant immediately after the ITO film is formed or immediately after the film formation and patterning, the SiN _x film is prevented from being altered and the ITO electrode, the Cr electrode, and the Al / It is possible to eliminate the short circuit between the Mo wiring and the Cr wiring. That is, since the Cr etchant penetrates through the ultra-thin and rough ITO film in the contact hole, the corresponding Cr is removed by etching, so that the upper and lower patterns are prevented from being short-circuited.

[0009]

EXAMPLE Next, similar to the conventional example, an example of the present invention
1 to 6 will be described. On the transparent substrate (10)
As a metal, for example, Cr (11) is sputtered.
Layer to a thickness of about 1500Å using
Part of the gate electrode of the TFT by turning
(11G) gate line and auxiliary capacitance electrode (1
1SC) is formed (see FIG. 1 above). Next,
SiN to be the insulating film _X(12) by plasma CVD
Layered to a thickness of 2000 to 4000Å and continued.
A-Si (13) about 1000Å by plasma CVD
Degree, SiN_XAre sequentially laminated to a thickness of about 2500Å.
a-Si (13) is the channel layer of the TFT, S of the uppermost layer.
iN_XCorresponds to the gate electrode (11G) by patterning
Etching stopper (14)
(See above, see FIG. 2). Next, to improve contact
A-Si (hereinafter referred to as N⁺a-Si
(15) is about 500Å by plasma CVD
This N is laminated to the thickness of⁺a-Si (15) and a-
Si (13) on the TFT part by patterning with the same mask
By leaving it, the channel contact layer is formed.
(See Fig. 3 above). And as a transparent electrode material, I
500 to 1 by sputtering TO (16)
Laminate to a thickness of about 000Å and pattern this
As a result, the display electrode (16P) is formed (see above, FIG.
4).

Next, as a defect treatment, the substrate having the structure shown in FIG. 4 is immersed in a liquid etchant of Cr, which is a mixture of cerium ammonium nitrate, perchloric acid and water. As a result, when there is a defect in the gate insulating film of SiN _x (12) in the display part, the etchant enters from the defective part of the film and forms Cr (1 SC) forming the lower auxiliary capacitance electrode (11SC).
1) is removed by etching. That is, as shown in FIG. 10, when a contact hole penetrating the SiN _X film (12) has occurred, ITO was laminated on SiN _X film (1
6) occurs in the contact hole, but the film thickness of ITO is 500 to 1000 Å, but the film thickness of SiN _x is 2000 to 4
It is as thick as 000Å, and ITO is an extremely thin and rough film in the contact hole, so the Cr etchant is ITO.
It penetrates the lower layer through the thin film. As a result, as shown in FIG. 11, the SiN _x film (12) on the Cr electrode (11)
Even if a contact hole is formed inside, the corresponding portion of the Cr electrode is removed by etching, and the ITO electrode (16)
And a Cr electrode (11) can be prevented from short-circuiting. Further, since the display electrode (16P) is formed before the immersion of the Cr etchant, the surface of the underlying SiN _x film (12) is not deteriorated, and the abnormal etching shape of ITO and the poor adhesion of the display electrode are prevented. It

Further, in the non-display area, since the ITO is soaked in the Cr etchant with the ITO removed, the Cr etchant directly enters from the contact hole to remove Cr, as shown in FIG. become. The immersion treatment with the Cr etchant may be performed immediately after the film formation of the ITO (16) and before the patterning of the display electrode (16P).
Similarly, the ITO film (1
6) and the Cr electrode (11) can be prevented from being short-circuited. Then, after the patterning of the ITO (16), the ITO is removed in the non-display portion and the state shown in FIG. 8 is obtained.

Then, as drain / source metal,
For example, the lower layer is 1000Å Mo and the upper layer is 7000Å A.
A two-layer film (17) of 1 is formed (see FIG. 5 above), and by patterning this, a part of the drain electrode (1) is formed.
7D) is connected to the drain line covering one end of the N ⁺ a-Si (15) and the display electrode (16P), and at the same time, is connected to the other end of the N ⁺ a-Si (15) (1).
7S) is formed. Further, using the drain electrode (17D) and the source electrode (17S) as a mask, N ⁺ a-Si (15)
The center portion is removed to obtain the structure shown in FIG.

The gate and drain lines are SiN_X
Although it partially overlaps with the gate insulating film of (13),
Invasion of Cr etchant carried out in the step of FIG. 4 of substrate manufacturing
Due to the defect treatment by dipping, the film defects of the gate insulating film are
Even if it occurs in the overlapping part of the drain line and the drain line,
No short circuit will occur. In other words, in this part
As shown in FIG. 10, is a gate made of Cr (11).
SiN on the line _X(12) Contact hole
The Cr etchant enters and the corresponding Cr etches
After the ITO patterning,
It is in the state shown in FIG. Therefore, Al / Mo
By forming the film of (17), Al / Mo is contact hole
Even if it is generated in the
Insulation is maintained.

[0014]

As is apparent from the above description, SiN _x
By performing the defect treatment of the insulating film by the Cr etchant immediately after the ITO film is formed or immediately after the film formation and patterning, the Cr electrode and the ITO electrode, and the Cr wiring and the Al /
It was possible to prevent a short circuit with the Mo wiring and, at the same time, prevent a defect of the display electrode due to alteration of the surface of the SiN _x film.

[Brief description of drawings]

FIG. 1 is a cross-sectional view illustrating a method of manufacturing a liquid crystal display device.

FIG. 2 is a cross-sectional view illustrating a method of manufacturing a liquid crystal display device.

FIG. 3 is a cross-sectional view illustrating a method of manufacturing a liquid crystal display device.

FIG. 4 is a cross-sectional view illustrating a method of manufacturing a liquid crystal display device.

FIG. 5 is a cross-sectional view illustrating the method of manufacturing the liquid crystal display device.

FIG. 6 is a cross-sectional view illustrating the method of manufacturing a liquid crystal display device.

FIG. 7 is a cross-sectional view illustrating the function and effect of defect processing.

FIG. 8 is a cross-sectional view illustrating the function and effect of defect processing.

FIG. 9 is a cross-sectional view illustrating the function and effect of defect processing.

FIG. 10 is a cross-sectional view illustrating the function and effect of the defect processing of the present invention.

FIG. 11 is a cross-sectional view illustrating the function and effect of the defect processing of the present invention.

[Explanation of symbols]

10 Transparent Substrate 11 Cr 12 SiN _X 13 a-Si 14 Etching Stopper 15 N ⁺ a-Si 16 ITO 17 Al / Mo

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI Technical indication H01L 29/40 A 7376-4M 29/786

Claims (1)

[Claims] 1. A step of laminating a first metal on a substrate, a step of patterning the first metal, a step of forming a first insulating film on the substrate, and a semiconductor layer on the substrate. A step of forming a semiconductor layer, a step of patterning the semiconductor layer, a step of forming a transparent conductive film on the substrate,
A method for manufacturing a liquid crystal display device, comprising: a step of patterning the transparent conductive film; a step of laminating a second metal on the substrate; and a step of patterning the second metal. After the step of forming a film, or
A method for manufacturing a liquid crystal display device, comprising a step of immersing the substrate in an etchant of the first metal after the step of patterning the transparent conductive film.