KR20000021350A - Method for manufacturing lcd - Google Patents
Method for manufacturing lcd Download PDFInfo
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- KR20000021350A KR20000021350A KR1019980040372A KR19980040372A KR20000021350A KR 20000021350 A KR20000021350 A KR 20000021350A KR 1019980040372 A KR1019980040372 A KR 1019980040372A KR 19980040372 A KR19980040372 A KR 19980040372A KR 20000021350 A KR20000021350 A KR 20000021350A
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- film
- gate
- pad
- gate insulating
- insulating film
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- 238000000034 method Methods 0.000 title claims abstract description 13
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 8
- 238000002161 passivation Methods 0.000 claims abstract description 16
- 239000000758 substrate Substances 0.000 claims abstract description 13
- 229910004205 SiNX Inorganic materials 0.000 claims abstract description 8
- 238000001312 dry etching Methods 0.000 claims abstract description 7
- 238000005530 etching Methods 0.000 claims description 3
- 239000010408 film Substances 0.000 abstract description 42
- 239000010409 thin film Substances 0.000 abstract description 3
- 239000004973 liquid crystal related substance Substances 0.000 description 6
- 238000001039 wet etching Methods 0.000 description 5
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 230000000593 degrading effect Effects 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
- G02F1/13458—Terminal pads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Liquid Crystal (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Nonlinear Science (AREA)
- Computer Hardware Design (AREA)
- Crystallography & Structural Chemistry (AREA)
- Manufacturing & Machinery (AREA)
- Optics & Photonics (AREA)
- Chemical & Material Sciences (AREA)
- Mathematical Physics (AREA)
Abstract
Description
본 발명은 액정 표시 소자의 제조방법에 관한 것으로, 특히 패드 오픈시 데이터 라인의 오픈을 방지할 수 있는 액정 표시 소자의 제조방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a liquid crystal display device, and more particularly, to a method for manufacturing a liquid crystal display device that can prevent opening of a data line when a pad is opened.
액티브 매트릭스형 액정표시(active matrix-type liquid crystal display; AM-LCD) 장치는 얇아서 다양한 표시장치에 사용된다. 이러한 AM-LCD 장치에서, 박막 트랜지스터(thin film transistor; TFT)가 각 화소에 대한 스위칭 소자로서 제공되어, 개개의 화소전극들이 독립적으로 구동되기 때문에, 듀티(duty) 비의 감소에 기인하는 콘트라스트가 감소되지 않고, 또한 디스플레이 용량이 증가하여 라인수가 증가될 때에도 시야각이 감소되지 않는다.Active matrix-type liquid crystal display (AM-LCD) devices are thin and are used in various display devices. In such an AM-LCD device, a thin film transistor (TFT) is provided as a switching element for each pixel, so that individual pixel electrodes are driven independently, so that the contrast due to the reduction in the duty ratio is reduced. It does not decrease and also the viewing angle does not decrease even when the display capacity increases and the number of lines increases.
한편, 최근에는 공정을 단순화시키기 위하여 상기한 TFT-LCD를 5개의 마스크 패턴을 이용하여 형성한다. 즉, 게이트용 제 1 마스크 패턴, 에치스톱퍼용 제 2 마스크 패턴, 소오스 및 드레인용 제 3 마스크 패턴, 게이트 및 데이터 라인의 패드 오픈용 제 4 마스크 패턴, 및 화소전극용 제 5 마스크 패턴을 이용한다. 여기서, 제 3 마스크 패턴을 이용하여 소오스 및 드레인 뿐만 아니라 액티브층을 패터닝하기 때문에 마스크 공정이 감소되어 공정이 단순해진다. 또한, 제 5 마스크 패턴을 이용한 패드 오픈 공정은 BOE(Buffered Oxide Etchant)를 이용한 습식식각으로 진행하여, 패드 영역의 게이트 라인 및 데이터 라인을 오픈시킨다. 즉, 도시되지는 않았지만, 게이트 라인은 SiON으로 이루어진 게이트 절연막과 SiNx막으로 이루어진 패시배이션막의 이중막으로 덮혀져 있고 데이터 라인은 상기 게이트 절연막 상부에 형성되어 상기 패시배이션막으로만 덮혀져 있기 때문에, 건식식각을 진행하게 되면, 두 절연막의 식각속도 차이로 인하여 게이트 라인이 완전히 오픈되지 않으므로, 상기한 바와 같이 BOE를 이용하여 습식식각을 진행한다.On the other hand, in recent years, in order to simplify the process, the above-described TFT-LCD is formed using five mask patterns. That is, a first mask pattern for gate, a second mask pattern for etch stopper, a third mask pattern for source and drain, a fourth mask pattern for pad opening of gate and data lines, and a fifth mask pattern for pixel electrode are used. Here, since the active layer is patterned as well as the source and drain using the third mask pattern, the mask process is reduced and the process is simplified. In addition, the pad opening process using the fifth mask pattern is performed by wet etching using a buffered oxide etchant (BOE) to open the gate line and the data line of the pad region. That is, although not shown, the gate line is covered with a double layer of a gate insulating film made of SiON and a passivation film made of a SiNx film, and the data line is formed over the gate insulating film to cover only the passivation film. Therefore, when the dry etching is performed, the gate line is not completely opened due to the difference in etching rates of the two insulating layers, and as described above, the wet etching is performed using the BOE.
그러나, 상기한 습식식각을 이용한 패드 오픈 공정에서, 패드 오픈용 제 4 마스크 형성을 위해 사용되는 포토레지스트막에서 발생되는 소정의 보이드(void)로 습식각각 용액이 흡수되어, 패드 영역 뿐만 아니라 화소영역의 패시배이션막 및 게이트 절연막이 식각되어 데이터 라인의 오픈문제를 야기시킨다. 이에 따라, 제 5 마스크를 이용한 화소전극의 패터닝시, 화소영역에서 화소전극과 데이터 라인 사이에서 숏트가 발생되어, 결국 소자의 신뢰성이 저하된다.However, in the pad opening process using the wet etching, the wet etching solution is absorbed by a predetermined void generated in the photoresist film used to form the fourth mask for opening the pad, and thus not only the pad region but also the pixel region. The passivation film and the gate insulating film are etched, which causes a problem of opening of the data line. Accordingly, during patterning of the pixel electrode using the fifth mask, a short is generated between the pixel electrode and the data line in the pixel region, thereby degrading the reliability of the device.
따라서, 본 발명은 상기한 종래의 문제점을 해결하기 위한 것으로서, 패드 오픈시 화소영역의 데이터 라인의 오픈을 방지하여 소자의 신뢰성을 향상시킬 수 있는 액정 표시 소자의 제조방법을 제공함에 그 목적이 있다.Accordingly, an object of the present invention is to provide a method of manufacturing a liquid crystal display device which can improve the reliability of the device by preventing the data line of the pixel region from opening when the pad is opened. .
도 1은 본 발명의 실시예에 따른 액정 표시 소자의 제조방법을 설명하기 위한 단면도.1 is a cross-sectional view illustrating a method of manufacturing a liquid crystal display device according to an embodiment of the present invention.
〔도면의 주요 부분에 대한 부호의 설명〕[Description of Code for Major Parts of Drawing]
10 : 절연기판 20 : 게이트10: insulated substrate 20: gate
30 : 게이트 절연막 40 : 데이터 라인30 gate insulating film 40 data line
50 : 패시배이션막50: passivation film
상기 목적을 달성하기 위한 본 발명에 따른 액정 표시 소자는 절연기판 상에 형성된 게이트 라인과, 게이트 라인 상부에 형성된 게이트 절연막과, 게이트 절연막 상에 형성된 데이터 라인과, 기판 전면에 형성된 패시배이션막을 포함하는 게이트 라인 및 데이터 라인의 패드 영역을 구비한다. 여기서, 게이트 절연막은 SiNx막으로 형성하고, 게이트 라인 및 데이터 라인의 패드는 건식식각을 이용하여 오픈시키는 것을 특징으로 한다.A liquid crystal display device according to the present invention for achieving the above object includes a gate line formed on an insulating substrate, a gate insulating film formed on the gate line, a data line formed on the gate insulating film, and a passivation film formed on the entire substrate And pad areas of a gate line and a data line. Here, the gate insulating film is formed of a SiNx film, and the pads of the gate line and the data line are opened by dry etching.
또한, 패시배이션막은 게이트 절연막과 동일한 막으로 형성하거나 게이트 절연막보다 식각속도가 빠른 절연막으로 형성한다.In addition, the passivation film may be formed of the same film as the gate insulating film or an insulating film having an etching rate faster than that of the gate insulating film.
이하, 첨부된 도면을 참조하여 본 발명의 실시예를 설명한다.Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention.
도 1은 본 발명의 실시예에 따른 TFT-LCD의 제조방법을 설명하기 위한 단면도로서, 게이트 라인 및 데이터 라인의 패드 영역(P1, P2)을 각각 나타낸다.1 is a cross-sectional view illustrating a method of manufacturing a TFT-LCD according to an exemplary embodiment of the present invention, and shows pad regions P1 and P2 of a gate line and a data line, respectively.
도 1 및 도 2를 참조하면, 패드 영역(P1, P2) 및 화소영역(미도시)이 정의된 절연기판(20)을 준비한다. 그런 다음, 패드 영역(P1)까지 연장되도록 화소영역의 기판 상에 게이트용 제 1 마스크 패턴을 이용하여 게이트 라인(20)을 형성하고, 기판 전면에 게이트 절연막(30)을 형성한다. 이때, 게이트 절연막(30)은 SiNx막으로 형성한다. 그런 다음, 화소영역의 게이트 절연막(22) 상에 에치스톱퍼용 제 2 마스크 패턴 및 소오스 및 드레인용 제 3 마스크 패턴을 이용하여 박막 트랜지스터(미도시)를 형성함과 동시에, 패드영역(P1)까지 연장된 데이터 라인(40)을 형성한다.1 and 2, an insulating substrate 20 in which pad regions P1 and P2 and a pixel region (not shown) are defined is prepared. Then, the gate line 20 is formed on the substrate of the pixel region using the first mask pattern for the gate so as to extend to the pad region P1, and the gate insulating layer 30 is formed on the entire surface of the substrate. At this time, the gate insulating film 30 is formed of a SiNx film. Then, a thin film transistor (not shown) is formed on the gate insulating layer 22 of the pixel region using the second mask pattern for the etch stopper and the third mask pattern for the source and drain, and to the pad region P1. An extended data line 40 is formed.
그리고 나서, 기판 전면에 게이트 절연막(22)과 동일하게 SiNx막으로 패시배이션막(50)을 형성하거나, 게이트 절연막(22)보다 식각속도가 빠른 절연막으로 형성한다. 그 후, 패드 오픈용 제 4 마스크 패턴을 이용하여 패드 영역(P1)의 게이트 절연막(30) 및 패시배이션막(50)을 식각함과 동시에 패드 영역(P2)의 패시배이션막(50)을 건식식각으로 식각하여, 도 1에 도시된 바와 같이, 패드 영역(P1, P2)의 게이트 라인(20) 및 데이터 라인(40)을 오픈시킨다.Then, the passivation film 50 is formed on the entire surface of the substrate in the same manner as the gate insulating film 22 by the SiNx film, or the insulating film is faster than the gate insulating film 22. Thereafter, the gate insulating film 30 and the passivation film 50 of the pad region P1 are etched using the fourth mask pattern for opening the pad, and the passivation film 50 of the pad region P2 is etched. Is etched by dry etching to open the gate line 20 and the data line 40 of the pad regions P1 and P2 as shown in FIG. 1.
상기한 본 발명에 의하면, 게이트 절연막을 패시배이션과 동일한 SiNx막으로 형성함으로써, 건식식각으로 패드 오픈 공정을 진행할 수 있게 된다. 이에 따라, 습식식각으로 야기되는 패드 오픈용 제 4 마스크 패턴의 포토레지스트막이 하부층으로 스며드는 것이 방지됨으로써, 패드 오픈시 데이터 라인의 오픈이 방지된다. 따라서, 화소영역에서 화소전극과 데이터 라인 사이에서 숏트가 방지되어, 결국 소자의 신뢰성 및 수율이 향상된다.According to the present invention described above, by forming the gate insulating film with the same SiNx film as the passivation, the pad opening process can be performed by dry etching. Accordingly, the photoresist film of the pad opening fourth mask pattern caused by wet etching is prevented from penetrating into the lower layer, thereby preventing the opening of the data line when the pad is opened. Therefore, shorting is prevented between the pixel electrode and the data line in the pixel region, thereby improving the reliability and yield of the device.
또한, 본 발명은 상기 실시예에 한정되지 않고, 본 발명의 기술적 요지를 벗어나지 않는 범위내에서 다양하게 변형시켜 실시할 수 있다.In addition, this invention is not limited to the said Example, It can variously deform and implement within the range which does not deviate from the technical summary of this invention.
Claims (3)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019980040372A KR20000021350A (en) | 1998-09-28 | 1998-09-28 | Method for manufacturing lcd |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019980040372A KR20000021350A (en) | 1998-09-28 | 1998-09-28 | Method for manufacturing lcd |
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| KR20000021350A true KR20000021350A (en) | 2000-04-25 |
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| KR1019980040372A KR20000021350A (en) | 1998-09-28 | 1998-09-28 | Method for manufacturing lcd |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE10361649B4 (en) * | 2002-12-30 | 2016-10-13 | Lg Display Co., Ltd. | A method of manufacturing a liquid crystal display device |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62124530A (en) * | 1985-11-25 | 1987-06-05 | Sharp Corp | Liquid crystal display element |
| JPH07104314A (en) * | 1993-09-30 | 1995-04-21 | Sanyo Electric Co Ltd | Manufacture of liquid crystal display device |
| KR970016725A (en) * | 1995-09-28 | 1997-04-28 | 쯔지 하루오 | Transmissive Liquid Crystal Display and Manufacturing Method Thereof |
| KR19990040307A (en) * | 1997-11-17 | 1999-06-05 | 구자홍 | Liquid Crystal Display Using Molybdenum-Tungsten Alloy and Manufacturing Method Thereof |
-
1998
- 1998-09-28 KR KR1019980040372A patent/KR20000021350A/en not_active Application Discontinuation
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62124530A (en) * | 1985-11-25 | 1987-06-05 | Sharp Corp | Liquid crystal display element |
| JPH07104314A (en) * | 1993-09-30 | 1995-04-21 | Sanyo Electric Co Ltd | Manufacture of liquid crystal display device |
| KR970016725A (en) * | 1995-09-28 | 1997-04-28 | 쯔지 하루오 | Transmissive Liquid Crystal Display and Manufacturing Method Thereof |
| KR19990040307A (en) * | 1997-11-17 | 1999-06-05 | 구자홍 | Liquid Crystal Display Using Molybdenum-Tungsten Alloy and Manufacturing Method Thereof |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE10361649B4 (en) * | 2002-12-30 | 2016-10-13 | Lg Display Co., Ltd. | A method of manufacturing a liquid crystal display device |
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