JPH0695982A - Device driver with dma transfer debugging function - Google Patents

Abstract

PURPOSE:To easily judge whether a fault relating to DMA transfer is caused by hardware or software at the step of system development by providing this device driver with three kinds of transfer modes. CONSTITUTION:A user process 1 (or 2 or 3) issues a system call to an OS, either one of switch tables is referred in accordance with the contents of the system call, i.e., a block type I/O request or a character type I/O request, and a disk driver routine corresponding to the I/O request is called. Each routine in the disk driver 14 which is called by a switching table 12 executes processing inherent in the routine itself, and when it is necessary to control a disk controller 30 or a DMA controller 40, an interface driver 16 arranged as a slave device driver of the disk driver 14 is called.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a DMA (Direct Memory Acce) including a disk driver in a UNIX (UNIX is a registered trademark) operating system.
ss) The present invention relates to a device driver involving transfer, and more specifically, to a function of checking whether or not a DMA transfer is performed correctly.

[0002]

2. Description of the Related Art By developing a conventional computer system,
When porting a UNIX operating system as the system software, it is necessary to simultaneously develop a device driver for controlling I / O (input / output device) such as a hard disk or Ethernet according to the system. Further, among the device drivers, the transfer by the disk driver, which requires particularly high-speed data transfer, is not performed via the CPU, and the DMA transfer is performed.
Since it is generally performed by using, it is necessary to perform a process for performing DMA transfer in the device driver.

[0003]

However, in the case where the DMA controller is not particularly commercially available among the hardware and is newly developed according to the system, the data transfer does not go through the CPU. Familiar with the relationship between logical addresses and physical addresses because it is difficult to confirm whether or not each data is actually transferred correctly, and the physical address must be used to perform DMA transfer. Therefore, if a failure occurs in transfer, it is difficult to determine whether the failure is in hardware or software.

An object of the present invention is to solve such a problem, and in a device driver which requires DMA transfer, a CPU is used in addition to a normal DMA transfer mode. In the mode of transferring byte by byte [this is called non-DMA transfer mode (non-DMA transfer mode)], and when data is transferred from the device to the memory (data read), DMA transfer and no transfer are performed.
It supports three transfer modes of performing both n-DMA transfer and comparing the transfer data of both, and at the stage of developing the system, whether the failure related to the DMA transfer is in hardware or software is determined. It is to provide a device driver having a DMA transfer debug function capable of making a judgment.

[0005]

In order to achieve such an object, according to the present invention, a system call is accepted, each routine in the driver such as the called disk driver performs routine-specific processing, and at the same time, the hard disk In a device driver that calls an interface driver positioned as a lower device driver of a disk driver when it is necessary to control the controller or the DMA controller, the interface driver has a first transfer mode for performing DMA transfer, The second transfer mode in which data is transferred byte by byte by the CPU and the third transfer mode in which the data transfer is performed in the DMA transfer mode and the non-DMA transfer mode and the difference in the transfer result is detected are provided. O processing request In response, the first transfer mode, second
It is characterized in that it is configured such that either of the transfer mode of 1) and the transfer mode of the third transfer mode can be selected and executed.

[0006]

The interface driver performs the data transfer in the first transfer mode for performing the DMA transfer, the second transfer mode for transferring the data byte by byte by the CPU, and the data transfer in the DMA transfer mode and the non-DMA transfer mode. And a third transfer mode having a function of detecting a difference in. The three types of data transfer modes can be arbitrarily designated by the transfer mode parameter. Then, depending on the specified transfer mode, the disk controller or DM
The A controller is controlled. By providing the three types of transfer modes, it becomes easy to determine whether the hardware or the software has a failure related to the DMA transfer at the system development stage.

[0007]

The present invention will be described in detail below with reference to the drawings.
Here, a device driver for controlling the hard disk will be described as an example. FIG. 1 is a configuration diagram of an embodiment showing a configuration of a peripheral portion related to a device driver according to the present invention. In the figure, 1, 2, 3 are user processes, 10
Is a UNIX kernel, 20 is a hard disk, 30 is a disk controller, and 40 is a DMA controller. In the kernel 10, 11 is a system call accepting unit that accepts a system call from a user process. As the system call, for example, a file stored in the disk 20 is opened (open), a file is closed (close), a file is read (read),
These include file writing (write) and input / output control (ioctl).

Reference numerals 12 and 13 are switch tables, and bd if the content of the system call is a block type I / O request.
If a character type I / O request is made to the evsw switch table, the cdevsw switch table is referred to, and the routine of the corresponding driver is called. As the driver, a disk driver 14, an Ethernet driver 15, etc. are prepared. Reference numeral 16 denotes an interface driver, which is called by the higher-level disk driver 14 to issue a command for accessing the hard disk 20 to the disk controller 30 or DMA for an I / O request requiring DMA transfer. Controller 4
It has a function of controlling 0, and further receiving an I / O end interrupt from the disk controller 30 when the I / O processing ends, and returning control to the disk driver. Note that the disk controller 30 and the DMA controller 40 are well known and have a normal configuration, and the functions and operations of the disk controller 30 and the DMA controller 40 are not directly related to the present invention, and a description thereof will be omitted.

The operation of such a configuration will be described below. In order to perform I / O processing on the hard disk, first, the user process 1 (or 2 or 3) is the OS.
A system call is issued to the switch, and if any one of the switch tables is referenced depending on whether the content is a block type I / O request or a character type I / O request,
The disk driver routine corresponding to the / O request is called. For example, the open routine is used for file open processing, and the close routine is used for file close processing. In addition to the disk driver in the OS, there are device drivers for controlling other devices. These devices identify the device to which the request is made by referring to the parameter called the major device number, and the device Call the device driver corresponding to. Further, each routine in the disk driver 14 called by the switch table 12 performs processing unique to each routine, and at the same time, if it is necessary to control the disk controller 30 or the DMA controller, Call the interface driver 16 which is positioned as a lower device driver.

The interface driver 16 is called by the upper disk driver 14 to issue a command for accessing the hard disk to the disk controller 30 and I / O which requires DMA transfer.
If it is an O request, it controls the DMA controller 40, and when the I / O processing is completed, it receives an I / O end interrupt from the disk controller 30 and returns control to the disk driver. That is, the DMA transfer debug function of the present invention is applied to the disk controller 30 and the DMA controller 4.
0 is directly implemented within the interface driver 16 that directly controls 0, and whether data transfer is performed by DMA (this transfer mode is referred to as a first transfer mode) or non-DMA transfer (this transfer mode). The second
Of the transfer mode), or whether to compare the results of the transfer performed by both (this transfer mode is called the third transfer mode) is selected and operated in this driver.

Next, the operation of the interface driver will be described with reference to the operation flow of FIG. First, with reference to the transfer mode parameters, the disk controller 30 and the DMA controller 4 according to the respective transfer methods.
Control 0. This transfer mode parameter defines the transfer method when performing I / O processing, and depending on its value, supports three modes: non-DMA transfer, DMA transfer, and comparison mode. The comparison mode can be selected only when the data transfer direction is from the disk to the memory (read operation), and cannot be transferred by this method when the data is transferred from the memory to the disk (write operation). The transfer mode can be changed by changing the value of the transfer mode parameter using the input / output control function (ioctl function).

Each transfer mode will be described below. Non-DMA Transfer First, the disk controller 30 is set up in the non-DMA transfer mode, and then I / O is activated to transfer 1 byte of data. By repeating this for the length of the transfer data, all data is transferred. DMA Transfer First, after setting up the DMA controller 40, the disk controller 30 is set up in the DMA transfer mode, and I / O is activated to transfer data by DMA. Comparison mode First, I / O is activated and transferred by the above non-DMA transfer, and then DM is executed by the above DMA transfer method.
A transfer. At this time, the data obtained by each transfer are stored in different areas in the driver for later comparison. After that, the data in those areas are compared, and if all the data are equal, 0 is returned as a return parameter, and if there is not even one byte, 1 is returned. The disk driver 14, which is a higher-level device driver, receives the return parameter, and when the return parameter is 1 (that is, when they are not equal in the data comparison), an error is displayed to perform DMA transfer and non-DMA transfer. The difference in the behavior when it is determined is judged.

With such a debug mechanism of the present invention,
For example, the following failures can be confirmed. Depending on the DMA controller, the function of chaining the DMA addresses (for the divided areas, by giving the start address of each area to the DMA controller, all the divided areas can be processed by one data transfer. Although there is a function of performing data transfer), it is possible to easily detect a failure in which a part of the device driver that controls the chain has a failure and data is not normally transferred. If a processor with a built-in cache is used and the cache is erroneously operated in the device driver during DMA transfer, coherency cannot be maintained between the cache and memory in that processor, and the operation is normal. It does not work, but you can confirm the failure occurrence.

Also, if it is confirmed that the DMA controller has a fatal failure, and it is not corrected, DM
If A transfer is not possible, set the data transfer mode to no.
The system can be operated by switching to n-DMA. Even if the DMA transfer debug function of the present invention is realized in the Ethernet driver,
The same effect as that described for the disk driver can be obtained.

[0015]

As described above, according to the present invention, D
Inside the device driver that requires MA transfer, in addition to the normal DMA transfer mode, a non-DMA transfer mode in which the CPU is used to transfer 1 byte at a time, and a DMA when data is further transferred from the device to the memory
Transfers and non-DMA transfers are both performed, and three transfer modes of comparing the transfer data of the two are supported, and whether the DMA transfer failure is due to hardware or software during the system development stage. Can be easily determined.

[Brief description of drawings]

FIG. 1 is a configuration diagram showing an embodiment of a device driver according to the present invention.

FIG. 2 is an operation flow of an interface driver.

[Explanation of symbols]

 1 Process A 2 Process B 3 Process C 10 UNIX Kernel 11 System Call Reception Unit 12, 13 Switch Table 14 Disk Driver 15 Ethernet Driver 16 Interface Driver 20 Hard Disk 30 Disk Controller 40 DMA Controller

Claims (1)

[Claims] 1. When a system call is accepted and each routine in the driver such as the called disk driver performs routine-specific processing and, at the same time, it is necessary to control the hard disk controller or the DMA controller, it is a subordinate of the disk driver. In a device driver adapted to call an interface driver positioned as a device driver, the interface driver performs a DMA transfer for performing a data transfer using a first DMA transfer.
Transfer mode, a second transfer mode for performing non-DMA transfer in which data transfer is performed using a CPU, and the DMA transfer mode for one I / O request when the data transfer direction is from device to memory And non-DMA transfer mode, data transfer is performed twice,
A third transfer mode having a function capable of comparing the results and detecting a difference in the transfer results is provided, and the first transfer mode, the second transfer mode, and the third transfer mode are provided in response to an I / O processing request. 1. A device driver with a DMA transfer debug function, characterized in that it is configured to be able to select and execute one of the above transfer modes.