JPH011039A - In-circuit emulator - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an in-circuit emulator intended for a microprocessor having a built-in memory management circuit.

In computer technology, virtual memory technology is one of the technologies that increases the efficiency of memory usage by allowing a large program to be executed using a small amount of memory without sacrificing speed when executing a computer program.

When a CPU executes a program, the addresses of the main memory that the CPU accesses are not random, but tend to concentrate on a portion of addresses near a certain time during program execution.

Virtual memory technology utilizes this property to store the entire program to be executed in secondary memory such as a hard disk, and then loads only the parts necessary for program execution into main memory and executes it. , is a technology that efficiently executes large programs with little memory and simultaneously executes multiple programs (multi-programming). In other words, a program is divided into blocks of a certain size, and during a series of executions of a program consisting of multiple blocks, blocks that are currently needed are loaded into main memory, and unnecessary blocks are loaded into secondary memory. remains stored. As the program progresses and a block that has not been loaded into main memory is to be executed, the CPU temporarily suspends program execution and transfers control to O5 (operating system). At this time, the O8 searches for a block that has not been accessed repeatedly, such as the most recently accessed block among the active blocks loaded in main memory, and this process is unnecessary. A free area is secured in the main memory by storing the block determined to be in the secondary memory again or discarding it. Next, O8 moves the block to be subsequently executed from the secondary memory to a free area of the main memory and loads it there, thereby resuming execution of the interrupted program. As mentioned above, even though the program is actually being executed in a small amount of main memory, it appears as if there is a large virtual main memory in which the entire program is stored and running. Storing data in this virtual main memory is called virtual memory.

In order to realize this virtual memory technology, a circuit is required that converts addresses in virtual memory (virtual addresses) and addresses in main memory (real addresses) where part of the program is stored.

This circuit is called a memory management circuit. memory·
The management circuit converts a virtual address into a real address by referring to a correspondence table in which the real address determined when the O8 loads a desired block in the program into the main memory is stored. The memory management circuit has a TLB (
Translation Look-aside Bu
ffer), and the contents of this TLB are always updated with information converted by referring to the correspondence table. The memory management circuit does not always refer to the correspondence table to perform conversion, but refers to the TLB and performs direct conversion when conversion is possible, and refers to the correspondence table only when there is no conversion information in the TLB. This reduces the number of memory accesses.

That is, a virtual address is an address before being translated by the memory management circuit, and a real address is an address after being translated. Normal programs are designed to operate at this virtual address.

Traditionally, this memory management circuit was commercialized as an LSI separate from the microprocessor chip, but recently Intel's 5!80386 and Nippon Electric V
In VLSI microprocessor chips such as VLSI 60, a memory management circuit is built into the microprocessor chip in order to improve the speed of conversion from virtual addresses to real addresses. Therefore, one virtual address of a microprocessor with a built-in memory management circuit is converted from a virtual address to a real address inside the microprocessor chip, so that only the real address is output from the microprocessor chip. It has become.

An in-circuit emulator is a type of software and hardware development equipment used to efficiently develop a system that uses a microprocessor (hereinafter referred to as a target system).
Used to debug Progera J1 included in the system.

The target system is composed of a microprocessor, a memory in which programs and data are stored, an I10 board that controls the register J1, and the like. The microprocessor of a target system at the development stage is designed to be mounted on a printed circuit board using a socket and to be removable, rather than being directly attached.

When debugging the programmer 11 included in this target system using an in-circuit emulator, the microprocessor of the target system is removed from the socket and the plug of the in-circuit emulator is connected to the socket instead. An in-circuit emulator has a built-in microprocessor that is equivalent to the microprocessor that should originally be installed in the target system, and is used for debugging programs included in the target system. This debugging is performed on behalf of a microprocessor inside the in-circuit emulator, and this microprocessor is called an emulation microprocessor or emulation processor. That is, the emulation processor executes the target system's programs in place of the original microprocessor. Furthermore, in-circuit emulators have a break function that suspends program execution at any location specified by the user, a start function that restarts execution, and a memory function that stores the program execution process to enable program debugging. It has a trace function to display, a function to refer to or change the contents of memory and registers, and an emulation memory to emulate the memory functions of the target system. Users use these functions to debug programs on the target system.

The most important function of an in-circuit emulator is the break function. Bugs in the program result in abnormal operation of the target system. It is difficult for the user to discover whether there is a bug in the program when an abnormality appears, but it is difficult for the user to discover whether there is a bug in the program when an abnormality occurs, but when the user sees that there is at least one output in the final result, it is easy to realize that there is a bug somewhere. Know. Therefore, when debugging, the final location of the bug is discovered by repeatedly interrupting program execution at an arbitrary location and checking the contents of registers and memory at that time. Therefore, the break function depends on the position of the program,
Use an address to specify the data location, specify the location where you want to break using the address, and
Generally, a break occurs when U accesses a specified address.

[Prior Art] FIG. 3 shows a block diagram of a conventional in-circuit emulator. A conventional in-circuit emulator will be explained using drawings.

Emulation processor 7 is originally a target
This is a microprocessor used in System 5. The control signal J, data bus b, and real address d of the emulation processor 7 are connected via the buffer circuit 3 and the bus g to the CPU socket 4ζ of the target system 5, in which the microprocessor should originally be installed. . The full rake detection circuit 6 inputs the real address d of the emulation processor 7 and outputs a break request signal f. Break request signal f is connected to emulation processor 7.

The in-circuit emulator configured in this way is
The emulation processor 7 executes the program by accessing the target system 5 connected through the buffer circuit 3 and the CPU socket 4. A break request signal f output when the real address d, which is constantly monitored by the break detection circuit 6 during execution of the program, reaches a preset value causes the emulation processor 7 to stop execution.

[Problems to be Solved by the Invention] However, such in-circuit emulators have the following problems.

(1) It was not possible to debug a program designed using virtual addresses for a microprocessor with a built-in memory management circuit. This is because the address output from the emulation processor is a real address after being converted by the memory management circuit built into the emulation processor, so breakpoints cannot be set at virtual addresses.

(2) Furthermore, when an abnormality occurs in the execution of a program due to a failure of the emulation processor, it is difficult to immediately determine whether it is an operational abnormality in the emulation processor or a bug in the program.

[Means for Solving the Problems] The present invention was made to solve these problems, and uses two emulation processors instead of the conventional one emulation processor. These are operated in parallel and simultaneously. At this time, one emulation processor outputs a real address, the other emulation processor outputs a virtual address at the same timing that the real address would originally be output, and this virtual address and the break point set in advance are A comparison circuit is provided to enable a break based on a virtual address by comparing the virtual address values, and to constantly compare the control signals output by the two emulation processors and output an operation error signal when they differ. Accordingly, it is an object of the present invention to provide an in-circuit emulator that notifies a user that there is an abnormality in the operation of an emulation processor.

The two emulation processors used here both have an internal mode that outputs real addresses and a mode that outputs virtual addresses, and are used for general use so that these modes can be set externally. It is a microprocessor.

Set one of the two emulation processors to normal mode (outputs real addresses) and the other to debug mode.
mode (output virtual address) and operate in parallel and simultaneously. A microprocessor set to debug mode operates to output a virtual address corresponding to a real address output by a microprocessor set to normal mode.

[Example] FIG. 1 is a block diagram showing one embodiment of the present invention.

An embodiment of the present invention will be specifically described using FIG.

In FIG. 1, the first emulation processor l is set to normal mode and is originally connected to the target system 5.
This microprocessor is the same as the microprocessor to be inserted into the CPU socket 4 of , and outputs the real address d. The second emulation processor 2 is the same as the first emulation processor l, but is set to debug mode, bypassing the memory management circuit inside the chip and outputting the real address at the same timing as originally. directly outputs the virtual address e.

The methods for setting a microprocessor into normal or debug mode vary depending on the microprocessor used. Here, mode setting terminals ml, m
2, a method is adopted in which a specific logic signal is given to the controller, but there are other methods such as giving a specific command and a method of giving a special pattern of control signals. In this in-circuit emulator, mode setting is performed according to a mode setting method specified for the microprocessor of the target system.

Input control signal a, output control signal C, data bus b, and real address d of the first emulation processor l
Each signal line is connected to a target system 50 CPU socket 4 through a buffer circuit 3 and a bus g. The second emulation processor 20 input control signal and data signal lines are respectively connected to the input control signal a and data bus b of the first emulation processor l. The virtual address e of the second emulation processor 2 is connected to a break detection circuit 6, and the break detection circuit 6 is connected to the second emulation processor 2.
The virtual address e of the processor 2 is monitored and a break request signal f is output.

The break request signal r is connected to the first emulation processor 1 and the second emulation processor 2.

The break detection circuit 6 emulates and emulates a break request signal f when a preset break setting signal el and one reflection address e from the processor 2 match.
Output to processors l and 2.

The operation of the in-circuit emulator configured in this way will be explained. The state when the first emulation processor 1 set to the normal mode accesses the target system 5 and the state of the second emulation processor operating at the same time will be explained using Table 1.

The first emulation processor 1 accesses the target system 5 at a real address.

When reading data, target system 5
puts data on data bus b, and first emulation processor 1 takes in the data. When writing data, the first emulation processor l puts the data on the data bus b and writes it to the memory or Ilo in the target system 5. On the other hand, the second emulation processor 2 accesses the virtual address corresponding to the real address.

When reading data, the second emulation processor 2 reads the same data as the first emulation processor 1 because the data bus b is connected to the first emulation processor 1. At the time of writing, the second emulation processor 2 is set to debug mode, so
Operates to electrically disconnect the data bus and does not output data to the data bus.

That is, the first emulation processor 1 accesses the target system through the buffer circuit 3 and executes the program of the target system. The second emulation processor 2
While executing the same program in the system simultaneously with the first emulation processor 1, the first emulation processor l outputs a virtual address e corresponding to the real address d output.

Table 1 Table 2 shows an example of the correspondence between real addresses and virtual addresses in the order of program execution, using the bimonics of instructions and the virtual and real addresses expressed in hexadecimal numbers.

Table 2 In this example, the lower 12 bits are common to both the virtual and real addresses, and the upper bits are converted from the virtual address to the real address by the memory management circuit.

In other words, if we look at the upper two digits of the virtual address and the upper one digit of the real address, we can see that 11 is converted to 2, 12 is converted to 1, and 10 is converted to 5.

Further, the second and third lines of Table 2 are continuous in terms of virtual addresses, but are discontinuous in terms of real addresses.

It is impossible to infer a virtual address from a real address in this way.

Furthermore, the virtual address is uniquely determined at the time the program is created. However, the real address is determined when the block of program is loaded into main memory by the O8. Therefore, the real address does not always have a fixed value, but may have a different value each time a block is reloaded into main memory.

The break detection circuit 6 outputs a break request signal f when the virtual address e reaches a value el set in advance as a break point, and the break detection circuit 6 outputs a break request signal f to the first emulation processor l.
and stops the execution of the program in the second emulation processor 2.

According to this embodiment, even if the virtual address of a block that has not been loaded into main memory, that is, the real address of a block whose real address has not yet been determined, is set in advance as a break point, the point at which the block is loaded into main memory and executed It can be easily inferred that a break can be caused by

FIG. 2 shows another embodiment of the invention. The difference from the embodiment shown in FIG. 1 is that a comparator 8 is added.

By comparing the difference in operation between an emulation processor set to normal mode and an emulation processor set to debug mode, the user is notified of abnormal operation of the emulation processor.

Comparison circuit 8 includes first emulation processor 1
The output control signal C from the second emulation processor 2 is used as the first input, and the output control signal C from the second emulation processor 2 is used as the second input.
The control signals C and h are input to compare the two, and when there is a difference in the logical values of the control signals C and h, an operation error signal l is output.

Further, if a difference occurs between the operation of the first emulation processor l and the operation of the second emulation processor 2, the comparison circuit 8 outputs an operation error signal i, indicating that the operation of the emulation processor is abnormal. Inform the user. The reason why the operation of the first emulation processor l and the operation of the second emulation processor 2 are different is that the input control signal a input to both emulation processors 1 and 2 or the contents of the data bus b are different. It is clear from the basic operation of a microprocessor that a difference will appear in the output control signals C and h as a result. It is.

Further, the present invention can be combined with a tracer, which is an additional function of an in-circuit emulator, that is, a function of displaying the progress of program execution. In this case, by specifying the virtual address, it is possible to easily specify the trace start point using the virtual address, and to display the tracing result using the virtual address by tracing the virtual address itself.

[Effects of the Invention] As described above, according to the present invention, (1) Break points can be set at virtual addresses, so a program designed using virtual addresses can be debugged.

(2) Even in the unlikely event that an abnormality occurs in the operation of the emulation processor, it is possible to know that the abnormality has occurred from the operation error signal, so it is possible to determine whether it is a bug in the program or an abnormality in the operation of the emulation processor. Be able to judge instantly.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a block diagram showing another embodiment of the invention, and FIG. 3 is a block diagram showing an example of a conventional in-circuit emulator. In the figure, 1 is the first emulation processor, 2
is the second emulation processor, 3 is the buffer circuit, 4 is the CPU socket, 5 is the target system, 6 is the break detection circuit, 7 is the emulation processor, 8 is the comparator, a is the input, l/control signal, b is data, C is the output control signal of the normal mode proxy microprocessor, d is the real address, e is the virtual address, el is the break setting signal, f is the break request signal, g is the bus, h
is the output control signal of the second emulation processor,
■ indicates operation error 1, J indicates control signal, rn+ and rn
2 is a mode setting terminal.

Claims (1)

[Claims] 1. CPU socket (4) of target system (5)
) via a bus (g), the first emulation processor (1) operates in a normal mode and executes a program for operating the target system. ) and; the input control signal (a), output control signal (c), data bus (b), and real address (d) signal lines of the first emulation processor are connected, and C.P.
Buffer circuit that forms the bus connected to the U socket (
3) a second emulation processor connected to each signal line of the input control signal and data bus and operating in a debug mode outputting a virtual address (e) corresponding to the real address output by the first emulation processor; an emulation processor (2); and a break detection circuit (6) that receives the virtual address and outputs a break request signal (f) to the first emulation processor and the second emulation processor. An in-circuit emulator characterized in that break points can be specified by virtual addresses. 2. CPU socket (4) of target system (5)
) via a bus (g), the first emulation processor (1) operates in a normal mode and executes a program for operating the target system. ) and; the input control signal (a), output control signal (c), data bus (b), and real address (d) signal lines of the first emulation processor are connected, and C.P.
Buffer circuit that forms the bus connected to the U socket (
3) a second emulation processor connected to each signal line of the input control signal and data bus and operating in a debug mode outputting a virtual address (e) corresponding to the real address output by the first emulation processor; an emulation processor (2); a break detection circuit (6) that inputs the virtual address and outputs a break request signal (f) to the first emulation processor and the second emulation processor; a comparator circuit (8) that takes an output control signal of the first emulation processor as a first input, takes an output control signal of the second emulation processor as a second input, and outputs an operation error signal (1); An in-circuit emulator characterized in that break points can be specified by virtual addresses.