JPH0682913B2 - Method for manufacturing hybrid integrated circuit device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an element mounting method in a method of manufacturing a hybrid integrated circuit device (hybrid IC), and more particularly to improving a mounting position accuracy of a laminated ceramic chip capacitor or the like. The special mark is attached to a specific place.

Conventional Technology Conventionally, when manufacturing a hybrid IC, as shown in FIG.
As shown in FIG. 4, conductive pastes 3a and 3b are printed on the pair of lands 2a and 2b, which are the element mounting portions on the surface mounting substrate 1, by a screen mask printing method, respectively, and the conductive pastes 3a and 3b are printed as shown in FIGS.
As shown in FIG. 5, the monolithic ceramic chip capacitor 4 is mounted as an example of the device so that the electrodes 5a and 5b of the device come to the lands 2a and 2b. In addition, in a normal hybrid IC, in addition to the above-mentioned elements, an IC, a resistance chip, and the like are mounted by the same method. Further, only the monolithic ceramic chip capacitor 4 may be mounted on another line in the solder bonding direction, but this is not preferable from the viewpoint of cost increase. When mounting, the multilayer ceramic chip capacitor 4 is sucked and held by a vacuum suction pen (not shown) called a collet, moved to the lands 2a and 2b, and mounted at a fixed position.

For mounting on such a localization value, the surface of the surface mounting substrate 1 and the lands 2a and 2b are distinguished by a binary image camera,
Based on the positions of the lands 2a and 2b recognized in this way, the mounting position is set so that the central portion of the multilayer ceramic chip capacitor 4 is located at the center between the pair of lands 2a and 2b.

Here, the land 2a, 2b is used as a reference because the surface has few irregularities, is flat, and the end of the land is relatively steep, so that the surface mounting board 1 can be easily binarized. is there.

DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention By the way, in the above-mentioned conventional element mounting method, the lands 2a, 2
The element 4 based on the binarized image of the surface mount board 1 for b
The mounting position of the element 4 is determined and the element 4 is mounted so that the central portion of the element 4 is located at the central portion between the pair of lands 2a and 2b. Therefore, when the conductive pastes 3a and 3b cause printing deviation, Four
As shown in FIGS. A and b, for example, one conductive paste 3b
Since the electrode 5b of the element of the element 4 comes to a position away from,
There was an initial open or reliability issue.

In order to avoid this, there is a method in which the binarized image identification is based on the conductive pastes 3a and 3b.
As shown in FIG. 3, the surface of the conductive pastes 3a and 3b has irregularities, and the edges of the conductive pastes 3a and 3b have sagging, which causes a new problem that the error in binarized image identification becomes large, which is not practical.

Means for Solving the Problems In order to solve the above problems, the present invention prints a conductive paste on a land of a surface mounting substrate, identifies an element by a binary image identification camera system, and mounts it on a predetermined land. In the assembly process, the conductive paste for electrode connection is printed on the land on which the element is mounted, and simultaneously the dummy pattern for position recognition is printed, and the mounting position of the element is recognized and mounted by this dummy pattern for position recognition. The present invention provides a method for manufacturing a hybrid integrated circuit device characterized by the above.

Operation According to the above configuration, in the binary image identification camera, first,
A pair of position recognition dummy patterns serving as a reference are discriminated from each land and binarized. Then, when the element is mounted, it may be set such that the central portion thereof is located at the central position of the pair of position identifying dummy patterns.

By doing so, even if the pair of conductive patterns and the pair of identification dummy patterns are misaligned, they are printed at the same time and are misaligned by the same amount. The element is mounted in the center of the conductive paste of (1) to prevent the electrode of the element from opening.

Embodiments FIGS. 1a and 1b are diagrams after completion of printing of a conductive paste in a method of manufacturing a hybrid integrated circuit device according to an embodiment of the present invention, and FIGS. 1 in each figure
Is a surface-mounting substrate, 2a and 2b are lands, 3a and 3b are printed conductive pastes, 6a and 6b are a pair of conductive pastes 3a and 3b, and a pair of position identification dummy patterns are printed at the same time, and 4 is Multilayer ceramic chip capacitors, 5a and 5b, are the electrode parts of the device. Here, the size of the position identification dummy patterns 6a and 6b is not so large, that is, the unevenness error is small, and the binary image camera can sufficiently recognize the size. Further, the place of installation is provided where the centers of the pair of identification dummy patterns 6a and 6b coincide with the centers of the pair of conductive pastes 3a and 3b. This can be easily performed by applying the screen mask printing method.

According to this embodiment, even if the center position of the pair of conductive pastes 3a, 3b deviates from the land 2a, 2b at the time of printing, the binarization identification is for position identification with the same deviation as the conductive pastes 3a, 3b. Since this can be done with dummy patterns 6a and 6b,
There is an advantage that the a and 5b are not separated from the conductive pastes 3a and 3b, and the open can be prevented.

EFFECTS OF THE INVENTION As described above, according to the present invention, a pair of binary image position identification dummy patterns are simultaneously printed at the time of printing the conductive paste, and the center thereof coincides with the central position of the pair of conductive pastes. As described above, by disposing on the land portion, an element such as a laminated ceramic chip capacitor can be mounted near the center of the conductive paste, and there is an effect that an open defect of the electrode of the element can be prevented.

[Brief description of drawings]

1A and 1B are views showing a state at the time of completion of printing a conductive paste in the method for manufacturing a hybrid integrated circuit device according to an embodiment of the present invention, wherein FIG. 1A is a plan view and FIG. Is a vertical sectional view. 2a and 2b are views showing a state after mounting the monolithic ceramic chip capacitor, and FIG. 2a is a plan view,
FIG. 2b is a vertical sectional view. FIGS. 3a, 3b and 4a, b are views corresponding to FIGS. 1a, b and 2a, b for explaining the conventional method, respectively.
3a is a plan view, FIG. 3b is a vertical cross-sectional view, FIG. 4a is a plan view, and FIG. 4b is a vertical cross-sectional view. 1 ... Surface mount substrate, 2a, 2b ... Land, 3a, 3b ... Conductive paste, 4 ... Element (multilayer ceramic chip capacitor), 5a, 5b ... Electrode part of element, 6a, 6b ... Dummy pattern for position identification.

Claims (1)

[Claims] 1. An electrode is mounted on a land on which an element is mounted in an assembly process in which a conductive paste is printed on a land of a surface-mounting substrate, the element is identified by a binary image identification camera system, and the element is mounted on a predetermined land. At the same time as printing the conductive paste for connection, print the dummy pattern for position recognition,
A method of manufacturing a hybrid integrated circuit device, wherein the mounting position of an element is recognized and mounted by the dummy pattern for position recognition.