JPH0434990A - Manufacture of hybrid integrated circuit device - Google Patents

Abstract

PURPOSE:To prevent the unsatisfactory open of the electrodes of an element by a method wherein with a conductive paste for electrode connection use printed on element mounting lands, dummy patterns for position recognition use are printed and an element mounting position is recognized by these dummy patterns and the element is mounted in the position. CONSTITUTION:A pair of dummy patterns 6a and 6b for position recognition use, which are used as a reference, and respective lands 2a and 2b are first discriminated and binarized by a binary-coded image discriminating camera. At the time of mounting of an element 4, the element 4 has only to be installed in such a way that the its central part comes to the center position between the patterns 6a and 6b. According to such a way, even if the shift of printing is caused in a pair of conductive patterns and a pair of the dummy patterns, the patterns are simultaneously printed, are shifted by the same amount and the central positions between the patterns are not shifted. Thereby, the element is mounted in the center between a pair of conductive pastes and the unsatisfactory open of electrodes of the element is prevented.

Description

[Detailed Description of the Invention] This invention relates to an element mounting method in a method of manufacturing a hybrid integrated circuit device (hybrid IC), and in particular, to improve the accuracy of the mounting position of a multilayer ceramic chip capacitor, etc. A special mark is placed at a specific location.

Conventional Q Technique Criticism Conventionally, when manufacturing hybrid ICs, Fig. 3a
, b, conductive pastes (3a, 3b) are printed on a pair of lands 2a, 2b, which are the element mounting parts on the surface mount board 1, respectively, by a screen mask printing method, and As shown in FIG. 1, as an example of an element, a multilayer ceramic chip capacitor 4 is mounted such that electrodes 5a and 5b of the element are located on lands 2a and 2b. Note that in a normal hybrid IC, in addition to the above-mentioned elements, I
C, resistor chips, etc. are mounted in a similar manner. Also,
Although only the multilayer ceramic chip capacitor 4 may be mounted on a separate line using a solder bonding method, this is not preferable from the standpoint of increasing costs. When mounting, the multilayer ceramic chip capacitor 4 is attracted and held by a vacuum suction pen (not shown) called a collet, moved to the lands 2a and 2b, and mounted in a fixed position.

Mounting in a fixed position like this is done by identifying the surface of the surface mount board and the lands 2a and 2b using a binary image camera, and then mounting the board using the positions of the lands 2a and 2b recognized by the cracks as a reference. The position is such that the center of the multilayer ceramic chip capacitor 4 is located in the center between the pair of lands 2a and 2b.

The reason why the lands 2a and 2b are used as a reference is because their surfaces are flat with little unevenness, and the ends of the lands are relatively steep, making it easy to perform binarization with the surface mount board 1. be.

By the way, in the above conventional device mounting method, the land 2a
, 2b, the mounting position of the element 4 is determined based on the binarized image of the surface mount board 1, and the element 4 is mounted so that the center of the element 4 is located in the center between the pair of lands 2a and 2b. If the conductive pastes 3a and 3b have misaligned printing, for example, as shown in FIGS. This caused problems with initial opening or reliability.

In order to avoid this, there is a method of using the conductive paces (3a and 3b) as standards for binary image identification, but the fourth
As shown in the figure, the surfaces of the conductive pastes 3a and 3b are uneven, and the edges have sag, which creates a new problem of increasing errors in binary image identification, which impedes feasibility. poor.

In order to solve the above-mentioned problems, this invention prints a conductive paste on the land of a surface mount board, identifies the device using a binary image identification camera method, and mounts the device on a predetermined land in the assembly process. , a conductive paste for electrode connection is printed on the land on which the element is mounted, and a dummy pattern for position recognition is printed at the same time, and the mounting position of the element is recognized by this dummy pattern for position recognition, and the element is mounted. The present invention provides a method for manufacturing a hybrid integrated circuit device.

1. According to the above configuration, in the binary image identification camera, first,
A pair of reference dummy patterns for position recognition and each land are identified and binarized. Then, when mounting the element, it is only necessary to set the element so that its center is located at the center of the pair of position identification dummy patterns.

In this way, even if a pair of conductive patterns and a pair of identification dummy patterns are misaligned, they are printed at the same time and are misaligned by the same amount, and their center positions will not shift. The element is mounted in the center of the conductive paste, and the electrodes of the element are prevented from opening.

Figures 1a and 1b show the state at the time of completion of conductive paste printing in the method for manufacturing a hybrid integrated circuit device, which is an embodiment of the present invention.
Figures 2a and 2b are views after the same element is mounted. In each figure, 1 is a surface mount board, 2a and 2b are lands, 3a and 3
(b is a printed conductive paste), and 6a and 6b are a pair of position identification dummy patterns printed simultaneously with a pair of conductive pastes 3a and 3b.

4 is a multilayer ceramic chip capacitor, and 5a and 5b are electrode parts of the element. Here, the size of the position identification dummy patterns Eia and Gb is not very large, that is, the size is made so as to reduce the unevenness error and to be sufficiently large enough to be recognized by the binarized image camera. Further, the installation location is such that the center of the pair of identification dummy patterns 6a and 6b coincides with the center of the pair of conductive pastes 3a and 3b. This can be easily accomplished by applying a screen mask printing method.

According to this embodiment, a pair of conductive pastes 3a, 3b
Even if the center position with respect to the lands 2a, 2b is shifted during printing, the binarization identification can be performed using the position identification dummy patterns Ga, Eib which have the same shift as the conductive paste (3a, 3b). 5b is conductive paste 3a
, 3b, and has the advantage of preventing an open.

As described above, according to the present invention, a pair of dummy patterns for identifying the position of a binary image are printed at the same time when printing conductive pastes, and the center of the dummy patterns is aligned with the position of the pair of conductive pastes. By arranging it on the land so as to coincide with the center position, an element such as a multilayer ceramic chip capacitor can be mounted near the center of the conductive paste, which has the effect of preventing open defects in the electrodes of the element.

2a, 2b... Land, 3a, 3b... Conductive paste, 4... Element (multilayer ceramic chip capacitor), 5
a, 5b... Electrode part of the element, Ba, 6b = Dummy pattern for position identification.

[Brief explanation of drawings]

1A and 1B are diagrams showing the state after mounting a conductive paste ramic chip capacitor in a method for manufacturing a hybrid integrated circuit device which is an embodiment of the present invention, and FIG. 2A is a plan view; The figure is a longitudinal sectional view. 3 a, b and 4 a, b correspond to FIGS. 1 a, b and 2 a, b, respectively, for explaining the conventional method, and FIG. 3 a is a plan view; Figure 3 is a longitudinal sectional view;
FIG. 4a is a plan view, and FIG. 4a is a longitudinal sectional view. 1...Surface mount board, ■ O

Claims (1)

[Claims] In the assembly process, a conductive paste is printed on the land of the surface mount board, the device is identified using a binary image recognition camera method, and the device is mounted on the designated land. At the same time as printing
1. A method for manufacturing a hybrid integrated circuit device, comprising printing a position recognition dummy pattern, and using the position recognition dummy pattern to recognize and mount an element.