JP3627450B2 - Electronic component mounting method - Google Patents

Electronic component mounting method Download PDF

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Publication number
JP3627450B2
JP3627450B2 JP15887297A JP15887297A JP3627450B2 JP 3627450 B2 JP3627450 B2 JP 3627450B2 JP 15887297 A JP15887297 A JP 15887297A JP 15887297 A JP15887297 A JP 15887297A JP 3627450 B2 JP3627450 B2 JP 3627450B2
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JP
Japan
Prior art keywords
silver paste
electronic component
circuit board
shape
mounting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP15887297A
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Japanese (ja)
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JPH118268A (en
Inventor
祐司 大谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
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Denso Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
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Priority to JP15887297A priority Critical patent/JP3627450B2/en
Publication of JPH118268A publication Critical patent/JPH118268A/en
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Publication of JP3627450B2 publication Critical patent/JP3627450B2/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/17—Structure, shape, material or disposition of the bump connectors after the connecting process of a plurality of bump connectors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives

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  • Wire Bonding (AREA)

Description

【０００１】
【発明の属する技術分野】
本発明は、電子部品を回路基板上に実装する電子部品の実装方法に関する。
【０００２】
【従来の技術】
従来、焼成されたセラミック積層基板などの回路基板に、フリップチップＩＣなどの電子部品を実装する場合、まず、導体ランドが形成された回路基板の導体ランド上に、導電性接着剤として銀ペーストをスクリーン印刷する。
この後、電子部品のはんだバンプを銀ペーストが形成された導体ランド上に位置合わせする。この状態での断面構成を図３（ａ）に示す。なお、図３（ａ）において、１は回路基板、２は導体ランド、３は銀ペースト、４は電子部品、５は電子部品４のバンプ電極、６ははんだバンプである。
【０００３】
このようにして、電子部品４を回路基板上に搭載した後、はんだを溶融・硬化させて、電子部品４を回路基板１上に実装する。
【０００４】
【発明が解決しようとする課題】
上述した従来の実装構造においては、はんだバンプ６のばらつき、導体ランド２の高さばらつき、回路基板１の反りばらつきなどによって、はんだバンプ６と導体ランド２間の間隙が大きくなるものが存在する。このため、導体ランド２上に形成する銀ペースト３の量が少ないと、図３（ｂ）に示すようにように、銀ペースト３が薄くなり、はんだバンプ６と銀ペースト３が接触できずにオープン不良を起こす可能性がある。逆に、銀ペースト３の量が多いと、図３（ｃ）に示すようにように、銀ペースト３が厚くなり、図中の白抜き矢印に示すように銀ペースト３がダレて、隣接する導体ランド２間でショートを起こす可能性がある。
【０００５】
本発明は上記問題に鑑みたもので、上述したオープン不良あるいは導体ランド間のショートをなくすことを目的とする。
【０００６】
【課題を解決するための手段】
上記目的を達成するため、請求項１〜３に記載の発明においては、銀ペースト（３）を、外側に向けて突出する複数の突出部（３ｂ）を有する形状にて印刷形成することを特徴としている。このことにより、電子部品（４）の電極部（５、６）と接触する銀ペースト（３）の量を複数の突出部（３ｂ）で補うことができ、また銀ペースト（３）の量を外周部で少なくして銀ペースト（３）のダレを防止することができる。従って、オープン不良あるいは導体ランド間のショートといった問題をなくすことができる。
【０００７】
【発明の実施の形態】
以下、本発明を図に示す実施形態について説明する。なお、以下の説明において、図３に示すものと同じ構成部分については同一の符号を用いて説明する。
本実施形態においても、従来のものと同様、焼成されたセラミック積層基板などの回路基板１で、表面に導体ランド２が形成されたものに、フリップチップＩＣなどの電子部品４を実装する場合、まず、回路基板１の導体ランド２上に銀ペースト３をマスクを用いてスクリーン印刷する。この後、バンプ電極５にはんだバンプ６が形成された電子部品４を回路基板１上に搭載し、はんだを溶融・硬化させて、電子部品４を回路基板１上に実装する。
【０００８】
本実施形態では、回路基板１の表面に導体ランド２を形成する場合、図２に示すように、３００μｍ□の導体ランド２を１００μｍ間隔で回路基板１上に形成している。また、銀ペースト３の厚さを、電子部品４のはんだバンプ６と導体ランド２間のギャップが最大３３μｍ、銀ペースト３とはんだバンプ６のオーバーラップが１０μｍ、銀ペースト３の印刷ばらつきが１０μｍあるとして、７３μｍになるように設定している。
【０００９】
さらに、本実施形態では、導体ランド２上に印刷する銀ペースト３の形状を、図１に示すように、円形状部分３ａと、先端が尖った複数の突出部３ｂからなる星形状にしている。なお、円形状部分３ａの半径は、印刷精度Ｐおよびマウント精度Ｍの和として設定し、本実施形態では、Ｐ＝５０μｍ、Ｍ＝４０μｍとしている。また、スクリーン印刷を行う場合のマスクパターンを星形状にすることにより、その転写形状として、銀ペースト３を星形状にすることができる。
【００１０】
ここで、銀ペースト３の印刷面積を最小に抑え、はんだバンプ６の先端を銀ペースト３と接触させるためには、銀ペースト３を円形状部分３ａだけに形成すれればよいが、そのようにすると銀ペースト３の量が少なくなりすぎるため、本実施形態では、円形状部分３ａに複数の突出部３ｂを有する形状とし、その複数の突出部３ｂにて銀ペースト３の量を補うようにしている。また、複数の突出部３ｂでは、その量が円形状部分３ａに比べて少ないため、銀ペースト３が図３（ｃ）のようにダレることはない。
【００１１】
このように、銀ペースト３を星形状にすることにより、導体ランド２上に形成する銀ペースト３を必要最小限の量として、従来問題となっていたオープン不良あるいは導体ランド２間のショートをなくすことができる。
なお、銀ペースト３において、突出部３ｂの数が多すぎるとスクリーン印刷時に銀ペースト３の抜けが悪くなり、逆に少なすぎると銀ペースト３の供給量を補うことができないため、突出部３ｂの数は４〜１２程度が好ましい。
【００１２】
また、銀ペースト３の形状は、外側に向けて突出する複数の突出部を有する形状であれば、上述した星形状（この星形状には十字形状も含む）以外の形状であってもよい。
また、電子部品の電極部として、バンプ電極５およびはんだバンプ６にて構成するものを示したが、電子部品としてモールドＩＣを用いる場合には、リードフレームによる電極部がそれに相当する。
【００１３】
さらに、導電性接着剤として銀ペースト３を用いるものを示したが、それ以外の導電性接着剤を用いてもよい。
【図面の簡単な説明】
【図１】導体ランド２上に印刷形成する銀ペースト３の形状を示す図である。
【図２】回路基板１上に形成する導体ランド２のパターンを示す図である。
【図３】従来の問題点を説明するための図である。
【符号の説明】
１…回路基板、２…導体ランド、３…銀ペースト、４…電子部品、
５…バンプ電極、６…はんだバンプ。[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an electronic component mounting method for mounting an electronic component on a circuit board.
[0002]
[Prior art]
Conventionally, when mounting an electronic component such as a flip-chip IC on a circuit board such as a fired ceramic laminated substrate, first, a silver paste as a conductive adhesive is applied on the conductor land of the circuit board on which the conductor land is formed. Screen print.
Thereafter, the solder bumps of the electronic component are aligned on the conductor land on which the silver paste is formed. FIG. 3A shows a cross-sectional configuration in this state. In FIG. 3A, 1 is a circuit board, 2 is a conductor land, 3 is a silver paste, 4 is an electronic component, 5 is a bump electrode of the electronic component 4, and 6 is a solder bump.
[0003]
In this way, after the electronic component 4 is mounted on the circuit board, the solder is melted and cured, and the electronic component 4 is mounted on the circuit board 1.
[0004]
[Problems to be solved by the invention]
In the conventional mounting structure described above, there is a structure in which the gap between the solder bump 6 and the conductor land 2 becomes large due to variations in the solder bumps 6, variations in the height of the conductor lands 2, warpage variations in the circuit board 1, and the like. For this reason, when the amount of the silver paste 3 formed on the conductor land 2 is small, as shown in FIG. 3B, the silver paste 3 becomes thin and the solder bumps 6 and the silver paste 3 cannot be contacted. Open failure may occur. On the contrary, when the amount of the silver paste 3 is large, as shown in FIG. 3C, the silver paste 3 becomes thick, and the silver paste 3 sags and adjoins as shown by the white arrow in the figure. There is a possibility of causing a short circuit between the conductor lands 2.
[0005]
The present invention has been made in view of the above problems, and an object of the present invention is to eliminate the above-described open failure or short circuit between conductor lands.
[0006]
[Means for Solving the Problems]
In order to achieve the above object, in the inventions according to claims 1 to 3 , the silver paste (3) is printed and formed in a shape having a plurality of protruding portions (3b) protruding outward. It is said. Thereby, the amount of the silver paste (3) in contact with the electrode portions (5, 6) of the electronic component (4) can be supplemented by the plurality of protrusions (3b), and the amount of the silver paste (3) can be reduced. It is possible to prevent sagging of the silver paste (3) by reducing it at the outer periphery. Therefore, problems such as open defects or shorts between conductor lands can be eliminated.
[0007]
DETAILED DESCRIPTION OF THE INVENTION
DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments shown in the drawings will be described below. In the following description, the same components as those shown in FIG. 3 will be described using the same reference numerals.
Also in this embodiment, when mounting an electronic component 4 such as a flip-chip IC on a circuit board 1 such as a fired ceramic laminated substrate having a conductor land 2 formed on the surface, as in the conventional case, First, the silver paste 3 is screen-printed on the conductor land 2 of the circuit board 1 using a mask. Thereafter, the electronic component 4 in which the solder bump 6 is formed on the bump electrode 5 is mounted on the circuit board 1, the solder is melted and cured, and the electronic component 4 is mounted on the circuit board 1.
[0008]
In this embodiment, when the conductor lands 2 are formed on the surface of the circuit board 1, as shown in FIG. 2, the conductor lands 2 of 300 μm □ are formed on the circuit board 1 at intervals of 100 μm. Further, the thickness of the silver paste 3 is such that the gap between the solder bump 6 and the conductor land 2 of the electronic component 4 is 33 μm at maximum, the overlap between the silver paste 3 and the solder bump 6 is 10 μm, and the printing variation of the silver paste 3 is 10 μm. Is set to be 73 μm.
[0009]
Furthermore, in this embodiment, the shape of the silver paste 3 printed on the conductor land 2 is made into a star shape composed of a circular portion 3a and a plurality of protruding portions 3b with sharp tips as shown in FIG. . The radius of the circular portion 3a is set as the sum of the printing accuracy P and the mounting accuracy M. In this embodiment, P = 50 μm and M = 40 μm. Further, by making the mask pattern for screen printing into a star shape, the silver paste 3 can be made into a star shape as its transfer shape.
[0010]
Here, in order to minimize the printing area of the silver paste 3 and bring the tip of the solder bump 6 into contact with the silver paste 3, the silver paste 3 may be formed only on the circular portion 3a. Then, since the amount of the silver paste 3 is too small, in the present embodiment, the circular portion 3a has a plurality of protrusions 3b, and the plurality of protrusions 3b compensate for the amount of the silver paste 3. Yes. Further, since the amount of the plurality of protruding portions 3b is smaller than that of the circular portion 3a, the silver paste 3 does not sag as shown in FIG.
[0011]
In this way, by forming the silver paste 3 into a star shape, the silver paste 3 formed on the conductor land 2 is reduced to the minimum necessary amount, and the open defect or the short circuit between the conductor lands 2, which has been a problem in the past, is eliminated. be able to.
In addition, in the silver paste 3, if the number of the protrusions 3b is too large, the silver paste 3 is not easily removed during screen printing. Conversely, if the number is too small, the supply amount of the silver paste 3 cannot be compensated. The number is preferably about 4-12.
[0012]
Further, the shape of the silver paste 3 may be a shape other than the above-described star shape (this star shape includes a cross shape) as long as it has a plurality of protruding portions protruding outward.
In addition, the electrode part of the electronic component is constituted by the bump electrode 5 and the solder bump 6. However, when a mold IC is used as the electronic part, the electrode part by the lead frame corresponds to it.
[0013]
Furthermore, although what uses the silver paste 3 as a conductive adhesive was shown, you may use other conductive adhesives.
[Brief description of the drawings]
FIG. 1 is a diagram showing the shape of a silver paste 3 printed on a conductor land 2. FIG.
FIG. 2 is a diagram showing a pattern of conductor lands 2 formed on a circuit board 1;
FIG. 3 is a diagram for explaining a conventional problem.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Circuit board, 2 ... Conductor land, 3 ... Silver paste, 4 ... Electronic component,
5 ... Bump electrode, 6 ... Solder bump.

Claims (3)

導体ランド（２）が形成された回路基板（１）を用意し、前記導体ランド（２）上に銀ペースト（３）を印刷形成し、この印刷形成された銀ペーストの形状を保ったまま、前記銀ペースト（３）が形成された前記導体ランド（２）上に電子部品（４）の電極部（５、６）を位置合わせして、前記電子部品（４）を前記回路基板（１）上に実装する電子部品の実装方法において、
前記銀ペースト（３）を、外側に向けて突出する複数の突出部（３ｂ）を有する形状にて印刷形成することを特徴とする電子部品の実装方法。A circuit board (1) on which a conductor land (2) is formed is prepared, a silver paste (3) is printed on the conductor land (2), and the shape of the printed silver paste is maintained , The electrode parts (5, 6) of the electronic component (4) are aligned on the conductor land (2) on which the silver paste (3) is formed, so that the electronic component (4) is placed on the circuit board (1). In the mounting method of electronic components to be mounted on,
The method of mounting an electronic component, wherein the silver paste (3) is printed and formed in a shape having a plurality of protrusions (3b) protruding outward. 前記銀ペーストを、円形状部分（３ａ）と、その径方向に前記複数の突出部（３ｂ）が放射状に形成された形状にて印刷形成することを特徴とする請求項１に記載の電子部品の実装方法。2. The electronic component according to claim 1, wherein the silver paste is printed and formed in a shape in which a circular portion (3 a) and the plurality of protrusions (3 b) are radially formed in a radial direction thereof. How to implement 前記円形状部分（３ａ）の半径は、印刷精度およびマウント精度の和であることを特徴とする請求項２に記載の電子部品の実装方法。The method of mounting an electronic component according to claim 2, wherein the radius of the circular portion (3a) is a sum of printing accuracy and mounting accuracy.
JP15887297A 1997-06-16 1997-06-16 Electronic component mounting method Expired - Fee Related JP3627450B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15887297A JP3627450B2 (en) 1997-06-16 1997-06-16 Electronic component mounting method

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Application Number Priority Date Filing Date Title
JP15887297A JP3627450B2 (en) 1997-06-16 1997-06-16 Electronic component mounting method

Publications (2)

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JPH118268A JPH118268A (en) 1999-01-12
JP3627450B2 true JP3627450B2 (en) 2005-03-09

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JP4765804B2 (en) * 2006-07-14 2011-09-07 株式会社デンソー Manufacturing method of semiconductor device
JP2014072241A (en) * 2012-09-27 2014-04-21 Rohm Co Ltd Chip component

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